Commit graph

158107 commits

Author SHA1 Message Date
Dylan Baker
f21688aeda docs: Add sha256 sum for 22.2.5 2022-12-09 16:15:42 -08:00
Dylan Baker
eef77e355a
VERSION: update to 22.2.5 2022-12-09 16:00:21 -08:00
Dylan Baker
c130b2dd42 docs: add release notes for 22.2.5 2022-12-09 16:00:21 -08:00
Roman Stratiienko
5ff1f429c3 meson: Enable system_has_kms_drm for android
This allows to build libgbm when  system = 'android'  is set in
the cross_file.

Cc: "22.3" "22.2" mesa-stable
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Acked-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20033>
(cherry picked from commit 09ac29cca9)
2022-11-30 09:16:13 -08:00
Karol Herbst
ab71151624 nir/lower_int64: fix shift lowering
Starting with !19748 lowered 64 bit shifts were showing wrong results for
shifts with insignificant bits set.

nir shifts are defined to only look at the least significant bits. The
lowering has take this into account.

So there are two things going on:
1. the `ieq` and `uge` further down depend on `y` being masked.
2. the calculation of `reverse_count` actually depends on a masked `y` as
   well, due to the `(iabs (iadd y -32))` giving a different result for
   shifts > 31;

Fixes: 41f3e9e5f5 ("nir: Implement lowering of 64-bit shift operations")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19995>
(cherry picked from commit 5398dd04bf)
2022-11-30 09:16:12 -08:00
Sajeesh Sidharthan
f73fc14feb radeonsi/vcn: set current pic index correctly
video corruption observed while running decode test for av1
content in chromeos.

solution is when target buffer is found in render pic list and when
target codec is null, set curr_pic_indx as index to the
pic in render pic list.

Cc: mesa-stable
Signed-off-by: Sajeesh Sidharthan <sajeesh.sidharthan@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20000>
(cherry picked from commit 8b99e96dc8)
2022-11-30 09:16:11 -08:00
Jessica Clarke
c837ae5027 panfrost/blend: Fix invalid const values leading to NIR validation errors
Using a designated initializer like this leaves padding bits, which form
part of the aliasing u64/f64 member of the union, uninitialised, but a
nir_const_value must always have the unused bits zeroed out. Thus, use
the nir_const_value_for_float helper instead like everywhere else which
will do a memset 0 for us first.

Without this, using the pan_blend shader in a build with validation
enabled fails with:

  NIR validation failed after nir_lower_vars_to_ssa
  ...
            vec4 32 ssa_58 = load_const (0x3f7cfcfd /* 0.988235 */, 0x3f7cfcfd /* 0.988235 */, 0x3f7cfcfd /* 0.988235 */, 0x3f800000 /* 1.000000 */)
  error: memcmp(val, &cmp_val, sizeof(cmp_val)) == 0 (../src/compiler/nir/nir_validate.c:976)

Fixes: 1378c67bcf ("panfrost/blend: Inline blend constants")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20071>
(cherry picked from commit 750325730b)
2022-11-30 09:16:10 -08:00
Connor Abbott
17914b1785 ir3: Don't save/restore disasm string pointer
It's not in the key, so it randomly may or may not be present, and if it
is present then we don't actually save/restore the contents, so we will
save/restore random pointer values from the last run. Turnip already
disables searching the shader cache when assembly is requested, but
still wrote the final ir3_shader_variant which resulted in trying to
save random stale pointers when saving off the executable if a
subsequent compile hit that cache entry.

This fixes flakes in
dEQP-VK.pipeline.pipeline_library.shader_module_identifier.pipeline_from_id.*
for me.

Fixes: 56909868cd ("turnip: implement VK_KHR_pipeline_executable_properties")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20056>
(cherry picked from commit 8ba2d612d5)
2022-11-30 09:16:09 -08:00
Dylan Baker
8c982c7f97 .pick_status.json: Update to cf841cdd0b 2022-11-30 09:16:04 -08:00
Christopher Egert
d1716fe20e virgl: add missing members in virgl_caps_v2 in 22.2
The cherry pick 3ae1f012 adds max_uniform_block_size to the virgl_caps_v2 struct
without the video_caps, so max_uniform_block_size contains the wrong
data which regresses OpenGL 4.3 down to 3.0.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20065>
2022-11-29 19:13:11 +01:00
Lucas Stach
2cfea392a7 etnaviv: fix wrong surface TS clear size
Clearing ts_size - ts_offset bytes in a level means we are clearing the
TS region of all layers in the level starting from the surface layer, so
clearing one surface might corrupt all other layers of a resource level.
Use the correct size to clear only the requested TS region.

Cc: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19814>
(cherry picked from commit b6fa3cdb0e)
2022-11-28 13:01:17 -08:00
Lucas Stach
5f0859c9b8 etnaviv: blt: use correct TS offset in clear operations
Using the ts_offset from the level means we are always clearing the
TS region of layer 0 of the level. Use the correct offset which takes
into account the layer offset.

Cc: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19814>
(cherry picked from commit d9e2a7d6ad)
2022-11-28 13:01:17 -08:00
Sviatoslav Peleshko
52fcbca256 driconf/intel: Use fake vendor to WA bad detection in Source engine games
Source engine uses flawed device detection in Linux native OpenGL backend,
which causes it to use bad configurations for Intel devices and thus
not always render correctly. Workaround this by using vendor string that
does not include "Intel" in it.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7725
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19828>
(cherry picked from commit 478ffe7127)
2022-11-28 13:01:17 -08:00
Bas Nieuwenhuizen
78ad580508 vulkan: Remove asserts that weren't valid for RADV ETC2 emulation.
Wasn't caught when radv was modified to use these helpers ...

Tried to move the aspects assert so it still checks application inputs.

Fixes: d9048e31a0 ("radv: Use vk_image_view as the base for radv_image_view")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19914>
(cherry picked from commit 13d755441c)
2022-11-28 13:01:16 -08:00
Bas Nieuwenhuizen
8d358aa936 radv: Fix sampler types in ETC2 decode.
Otherwise we'd have a type mismatch vs texture fetches, which
is asserted upon these days.

Fixes: 1153db23f5 ("radv: Add ETC2 decode shader.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19914>
(cherry picked from commit eab61863c0)
2022-11-28 13:01:16 -08:00
Bas Nieuwenhuizen
db92251976 radv: Use correct init order for ETC2 image views
Fixes: d9048e31a0 ("radv: Use vk_image_view as the base for radv_image_view")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19914>
(cherry picked from commit c6ec4925c0)
2022-11-28 13:01:16 -08:00
Rhys Perry
8fe5aa95cb ac/nir: mask shift operands
NIR shifts are defined to truncate the shift amount to the number of bits
needed to represent the bit-size of the value shifted. LLVM treats large
shifts as poison. This fix achieves NIR semantics for shifts.

As an example, a|(b << 32), where "a" is 32bits, should produce a|b
according to NIR (because 32&31 == 0).

This caused LLVM to incorrectly optimize "(a >> c) | (b << (32 - c))" to a
u2u32(pack_64_2x32(a, b) >> c) (v_alignbit_b32), when the original NIR
should have returned "a | b" if c==0.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19966>
(cherry picked from commit 064336d359)
2022-11-28 13:01:16 -08:00
Erik Faye-Lund
19e4daa0d1 mesa: treat unsupported queries as dummies
It's legal in OpenGL to start a query even if the result will have zero
valid bits. It's not enough to just report zero bits, We need to also
prevent calling down into the driver with these invalid queries.

Because ARB_ES3_compatibility adds ANY_SAMPLES_PASSED and
ANY_SAMPLES_PASSED_CONSERVATIVE to the set of queries that support zero
bits, we also need to check for the corresponding indices.

Fixes: 0186e9e1c5 ("mesa: always support occlusion queries")
Reviewed-by: Soroush Kashani <soroush.kashani@imgtec.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19750>
(cherry picked from commit 1b1e8873fe)
2022-11-28 13:01:16 -08:00
Erik Faye-Lund
22325e5f7c docs/zink: add missing required device-feature
Seems I forgot to add this to the list of required features.

Fixes: eb0195358c ("zink: only inspect dual-src limit if feature enabled")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19779>
(cherry picked from commit a2a0ac21e4)
2022-11-28 13:01:16 -08:00
Erik Faye-Lund
161bb574c9 zink: fix incorrect requirements
These were in the wrong list all along.

Fixes: a466c2a783 ("zink: check for stores and atomics features")
Fixes: 2644835f03 ("zink: add missing required feature")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19779>
(cherry picked from commit 754353c417)
2022-11-28 13:01:16 -08:00
Alyssa Rosenzweig
074803832b pan/mdg: Fix out-of-order execution
We can go up to 15 instructions out of order (performance fix) but we
can't go past a branch (bug fix).

Fixes: 30a393f458 ("pan/mdg: Enable out-of-order execution after texture ops")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19762>
(cherry picked from commit 044428211c)
2022-11-28 13:01:16 -08:00
Hans-Kristian Arntzen
9154a88b11 vk/runtime: Fix narrowing of timeline signal and wait value to u32.
They are u64. Fixes deadlock in
dEQP-VK.wsi.xcb.present_id_wait.wait.past_no_timeout.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Fixes: 9bffd81f1c ("vulkan: Add common implementations of vkQueueSubmit
and vkQueueWaitIdle")

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19951>
(cherry picked from commit f2e535e4fe)
2022-11-28 13:01:16 -08:00
Lionel Landwerlin
2a77b08cea blorp: support negative offsets in addresses
Similar to anv_address

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9c1c1888d9 ("intel/fs: put scratch surface in the surface state heap")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19946>
(cherry picked from commit 20e8e1eb06)
2022-11-28 13:01:16 -08:00
Lionel Landwerlin
406624f017 intel/fs: improve Wa_22013689345 workaround
The initial implementation is a pretty big hammer. Implement the HW
recommendation to minimize cases in which we need a fence.

This improves by 10FPS on some of the Sascha Willems RT demos.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 6031ad4bf6 ("intel/fs: Add Wa_22013689345")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19322>
(cherry picked from commit 945637514e)
2022-11-28 13:01:16 -08:00
Dylan Baker
136f5893d6 .pick_status.json: Mark e74d989a69 as backported 2022-11-28 13:01:15 -08:00
Marek Olšák
5c8e184b0a st/mesa: suppress async glthread flushing for GLX_EXT_texture_from_pixmap
This might fix some window system issues.

Fixes: 3da170faae - glthread: change when glFlush flushes asynchronously

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19809>
(cherry picked from commit d871958702)
2022-11-28 13:01:15 -08:00
Lucas Stach
2e6fd24b7c etnaviv: fix tile status interaction with write mappings
This fixes a longstanding bug in the interaction between TS and a write
mapping. The write does not update TS regardless of the way the update
is done. Update via etna_copy_resource would just set the target ts_valid
to false without actually writing back any dirty TS to the resource.
Writes via the CPU would update the resource, but keep ts_valid at true
even if the tile status may now not match the actually written tiles of
the resource anymore.

Fix this by writing back a dirty TS to the target resource if needed
before updating the level with the write data. Always invalidate TS,
even when the update is done by the CPU.

Cc: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19846>
(cherry picked from commit 0fb813526e)
2022-11-28 13:01:15 -08:00
Gert Wollny
39e9ea1419 virgl: don't a use staging when a resources created with the shared flag
There seems to be a problem with running firefox by using Xwayland that
results in a shared resources being not always tagged as using staging.

As a result one process tries to map the resource that was allocated as
one that uses staging without actually using the staging resource, and
hence the mapped range only accounts for the small region that we have
to allocated because a zero-allocation doesn't work, but the application
mapping the resource assumes that a properly sized range is mapped, and
consequently this results in invalid memory access.

To work around this issue disable creating staging for resources that
are created by using shared binding. It is not clear to me whether this
is the best fix, but it seems to quell the issue.

Fixes: c9d99b7eec
    virgl: Fix texture transfers by using a staging resource

Related: https://gitlab.freedesktop.org/virgl/virglrenderer/-/issues/291
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19655>
(cherry picked from commit e496d24cb2)
2022-11-28 12:58:57 -08:00
Alyssa Rosenzweig
a18a8c04c6 panfrost: Revert "Require 64-byte alignment on imports"
This reverts commit 811f8a1946. As Alpine put it
-- this is causing more problems than it's fixing. Hotfix to revert the
offending commit until a more measured fix can be implemented.

Closes: #7731
Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reported-by: Jan Palus
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19993>
(cherry picked from commit 4b19725ee5)
2022-11-28 11:49:14 -08:00
Dylan Baker
47f16c734a .pick_status.json: Mark 81b4af2849 as backported 2022-11-28 11:47:59 -08:00
Dylan Baker
274c2006c3 .pick_status.json: Update to 7aa94efe82 2022-11-28 11:47:16 -08:00
Yonggang Luo
802d79c280 meson: Fixes name_prefix for clover on mingw
Cc: mesa-stable

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19825>
2022-11-24 18:48:46 +00:00
Yonggang Luo
2accd760fe ci: Rename ci.yml to macos.yml for consistence with main branch
Otherwise github actions would show a bit confusing

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19667>
2022-11-24 18:47:05 +00:00
Mauro Rossi
8756ab0a14 r600/sfn: allow building with clang 6 (Android 9)
This is backport of mesa 23.0 commit e74d989a69
with resolution of conflicts for mesa 22.2 branch

static constexpr const 'value' is replaced by static function
in all type_char template specializations
to avoid the following building errors happening with clang 6

/home/utente/pie-x86_kernel/prebuilts/clang/host/linux-x86/clang-4691093/bin/ld.lld: error: undefined symbol: r600::type_char<r600::ExportInstr>::value
>>> referenced by sfn_scheduler.cpp
>>>               sfn_sfn_scheduler.cpp.o:(bool r600::BlockSheduler::collect_ready_type<r600::ExportInstr>(std::__1::list<r600::ExportInstr*, std::__1::allocator<r600::ExportInstr*> >&, std::__1::list<r600::ExportInstr*, std::__1::allocator<r600::ExportInstr*> >&)) in archive src/gallium/drivers/r600/libr600.a
...
/home/utente/pie-x86_kernel/prebuilts/clang/host/linux-x86/clang-4691093/bin/ld.lld: error: undefined symbol: r600::type_char<r600::RatInstr>::value
>>> referenced by sfn_scheduler.cpp
>>>               sfn_sfn_scheduler.cpp.o:(bool r600::BlockSheduler::collect_ready_type<r600::RatInstr>(std::__1::list<r600::RatInstr*, std::__1::allocator<r600::RatInstr*> >&, std::__1::list<r600::RatInstr*, std::__1::allocator<r600::RatInstr*> >&)) in archive src/gallium/drivers/r600/libr600.a
clang-6.0: error: linker command failed with exit code 1 (use -v to see invocation)

Cc: "22.2" "22.3" mesa-stable
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19940>
2022-11-22 23:18:38 +01:00
Bas Nieuwenhuizen
54848f18c0 radv: Fix custom build id with C90 compilation.
Seems some build configurations have problems with VLAs still.

Fixes: 97641e5c94 ("radv: Add ability to override the build id for the cache.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19869>
(cherry picked from commit 8d37ab6bfa)
2022-11-21 10:05:08 -08:00
Qiang Yu
9fdfe7751c ac/llvm: fix 16bit varying llvm compile error
Found when 16bit vec3 varying with llvm14 (not found
when llvm15), one 32bit vec4 slot is filled like this:
  vec3[0] | undef
  vec3[1] | undef
  vec3[2] | undef
  undef   | undef

LLVM error is for the elements with undef:
  %287 = insertelement float %280, half %279, i64 0

After this change, we get:
  %287 = insertelement <2 x half> %280, half %279, i64 0

Fixes: 279eea5bda ("amd/llvm: Transition to LLVM "opaque pointers"")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19848>
(cherry picked from commit e3b1f26a2b)
2022-11-21 10:05:07 -08:00
Lionel Landwerlin
cba4b07aa0 nir/lower_shader_calls: wrap only jumps rather than entire code blocks
Moving entire chunks of code into a dummy if block is causing issues
in some situations. To work around the issue that we tried to fix in
35d82ecf1e ("nir/lower_shader_calls: put inserted instructions into a
dummy block") which is that we cannot cut and past a block of
instruction that ends with a jump if there are more instruction behind
where we're going to past. We can instead just wraps the jumps into
dummy if blocks.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19820>
(cherry picked from commit 3686d5a312)
2022-11-21 09:46:53 -08:00
Lionel Landwerlin
1f39b0c57c nir/lower_shader_calls: update metadata before validation
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19820>
(cherry picked from commit 96d84e2a77)
2022-11-21 09:46:52 -08:00
Ian Romanick
094dffac9c nir/range_analysis: Set higher default maximum for max_workgroup_count
Fixes: c2a81ebe19 ("nir: Add default unsigned upper bound configuration.")
Closes: #7676
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19835>
(cherry picked from commit 2ba55ec504)
2022-11-21 09:46:51 -08:00
Lionel Landwerlin
205767d5ef nir/lower_explicit_io: fix metadata preserve
This pass can insert if blocks, therefore no dominance/block_index for
you.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19818>
(cherry picked from commit 723b15fb75)
2022-11-21 09:46:51 -08:00
Rhys Perry
c061e1b46d radv: lower 8/16-bit uadd_carry/usub_borrow
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7615
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19473>
(cherry picked from commit 6fc4a76057)
2022-11-21 09:46:50 -08:00
Rhys Perry
32c51fbfa0 nir/lower_bit_size: lower uadd_carry
8/16-bit uadd_carry can exist in SPIR-V.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7615
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19473>
(cherry picked from commit da30fb5df7)
2022-11-21 09:46:49 -08:00
Dylan Baker
cbd39e87c8 .pick_status.json: Update to 8133d5551d 2022-11-21 09:46:21 -08:00
Lionel Landwerlin
05f98731b7 intel/perf: allocate cleared counter infos
This array of structure needs to be initialized to 0 as it contains a
bitset we don't explicitly clear.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3144bc1d33 ("intel/perf: move query_mask and location out of gen_perf_query_counter")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18893>
(cherry picked from commit e754bf6be4)
2022-11-18 09:47:20 -08:00
José Roberto de Souza
522f063986 iris: Set priority for replaced engine context
The replace_kernel_ctx() code path was not setting back the context
priority.

Fixes: 5c4c8bdc4c ("iris/batch: Add support for engines contexts")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19687>
(cherry picked from commit cd159c7d6c)
2022-11-18 09:47:11 -08:00
Alyssa Rosenzweig
4f55467cce panfrost: Use PIPE_CAP_VERTEX_ATTRIB_ELEMENT_ALIGNED_ONLY
..instead of 4BYTE_ALIGNED_ONLY. This is more correct and avoids
needless repacking. Noticed in Firefox, which was hitting the vbuf
translate path.

Fixes: e03622e50f ("panfrost: Set STRIDE_4BYTE_ALIGNED_ONLY")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19761>
(cherry picked from commit c567e5528f)
2022-11-18 09:47:10 -08:00
Alyssa Rosenzweig
083f3382b0 panfrost: Fix reference counting with batch->resources
Refactor accesses to batch->resources to happen through safe helpers
that update the appropriate bookkeeping. This makes it obvious that (in
particular) reference counts are updated when they should be.

The functional change is that we are now correctly unreferencing
resources during shadowing, fixing a leak of shadowed resources.

Closes: #7362
Fixes: 2d8f28df73 ("panfrost: Replace resource shadowing flush")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reported-by: Mastodon, apparently
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19753>
(cherry picked from commit 42212a9bfd)
2022-11-18 09:47:08 -08:00
Dylan Baker
f9b741b1c7 .pick_status.json: Update to 5a5bc3dd52 2022-11-18 09:46:56 -08:00
Dylan Baker
a21e3efe21 docs: Add sha256 sum for 22.2.4 2022-11-16 15:22:17 -08:00
Dylan Baker
80df10f902
VERSION: update to 22.2.4 2022-11-16 15:02:11 -08:00