2014-07-30 15:20:53 -07:00
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/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Connor Abbott (cwabbott0@gmail.com)
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*
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*/
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#include "nir.h"
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2022-05-17 10:16:55 -05:00
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#include "nir_xfb_info.h"
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2019-03-27 10:13:28 -05:00
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#include "c11/threads.h"
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2022-09-06 23:05:39 +08:00
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#include "util/simple_mtx.h"
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2014-07-30 15:20:53 -07:00
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#include <assert.h>
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/*
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* This file checks for invalid IR indicating a bug somewhere in the compiler.
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*/
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2015-01-06 16:11:57 -08:00
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/* Since this file is just a pile of asserts, don't bother compiling it if
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* we're not building a debug build.
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*/
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2017-11-23 13:16:43 +00:00
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#ifndef NDEBUG
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2015-01-06 16:11:57 -08:00
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2014-07-30 15:20:53 -07:00
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typedef struct {
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2019-05-10 14:44:45 -05:00
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void *mem_ctx;
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2014-11-10 16:00:03 -08:00
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/* the current shader being validated */
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nir_shader *shader;
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2014-07-30 15:20:53 -07:00
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/* the current instruction being validated */
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nir_instr *instr;
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2016-05-14 15:40:54 -04:00
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/* the current variable being validated */
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nir_variable *var;
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2014-07-30 15:20:53 -07:00
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/* the current basic block being validated */
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nir_block *block;
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/* the current if statement being validated */
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nir_if *if_stmt;
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2015-07-21 19:54:15 -07:00
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/* the current loop being visited */
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nir_loop *loop;
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2021-12-01 17:34:48 +01:00
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/* weather the loop continue construct is being visited */
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bool in_loop_continue_construct;
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2014-07-30 15:20:53 -07:00
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/* the parent of the current cf node being visited */
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nir_cf_node *parent_node;
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/* the current function implementation being validated */
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nir_function_impl *impl;
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2020-09-15 11:28:43 -05:00
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/* Set of all blocks in the list */
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struct set *blocks;
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nir/validate: Use a single set for SSA def validation
The current SSA def validation we do in nir_validate validates three
things:
1. That each SSA def is only ever used in the function in which it is
defined.
2. That an nir_src exists in an SSA def's use list if and only if it
points to that SSA def.
3. That each nir_src is in the correct use list (uses or if_uses) based
on whether it's an if condition or not.
The way we were doing this before was that we had a hash table which
provided a map from SSA def to a small ssa_def_validate_state data
structure which contained a pointer to the nir_function_impl and two
hash sets, one for each use list. This meant piles of allocation and
creating of little hash sets. It also meant one hash lookup for each
SSA def plus one per use as well as two per src (because we have to look
up the ssa_def_validate_state and then look up the use.) It also
involved a second walk over the instructions as a post-validate step.
This commit changes us to use a single low-collision hash set of SSA
sources for all of this by being a bit more clever. We accomplish the
objectives above as follows:
1. The list is clear when we start validating a function. If the
nir_src references an SSA def which is defined in a different
function, it simply won't be in the set.
2. When validating the SSA defs, we walk the uses and verify that they
have is_ssa set and that the SSA def points to the SSA def we're
validating. This catches the case of a nir_src being in the wrong
list. We then put the nir_src in the set and, when we validate the
nir_src, we assert that it's in the set. This takes care of any
cases where a nir_src isn't in the use list. After checking that
the nir_src is in the set, we remove it from the set and, at the end
of nir_function_impl validation, we assert that the set is empty.
This takes care of any cases where a nir_src is in a use list but
the instruction is no longer in the shader.
3. When we put a nir_src in the set, we set the bottom bit of the
pointer to 1 if it's the condition of an if. This lets us detect
whether or not a nir_src is in the right list.
When running shader-db with an optimized debug build of mesa on my
laptop, I get the following shader-db CPU times:
With NIR_VALIDATE=0 3033.34 seconds
Before this commit 20224.83 seconds
After this commit 6255.50 seconds
Assuming shader-db is a representative sampling of GLSL shaders, this
means that making this change yields an 81% reduction in the time spent
in nir_validate. It still isn't cheap but enabling validation now only
increases compile times by 2x instead of 6.6x.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2019-05-04 18:02:50 -05:00
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/* Set of seen SSA sources */
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struct set *ssa_srcs;
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2014-07-30 15:20:53 -07:00
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2014-11-10 16:00:03 -08:00
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/* bitset of ssa definitions we have found; used to check uniqueness */
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BITSET_WORD *ssa_defs_found;
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2018-03-20 16:57:51 -07:00
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/* map of variable -> function implementation where it is defined or NULL
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* if it is a global variable
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*/
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2014-07-30 15:20:53 -07:00
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struct hash_table *var_defs;
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2016-05-14 15:40:54 -04:00
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/* map of instruction/var/etc to failed assert string */
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struct hash_table *errors;
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2014-07-30 15:20:53 -07:00
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} validate_state;
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2016-05-14 15:40:54 -04:00
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static void
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log_error(validate_state *state, const char *cond, const char *file, int line)
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{
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const void *obj;
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if (state->instr)
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obj = state->instr;
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else if (state->var)
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obj = state->var;
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else
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obj = cond;
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char *msg = ralloc_asprintf(state->errors, "error: %s (%s:%d)",
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cond, file, line);
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_mesa_hash_table_insert(state->errors, obj, msg);
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}
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2021-05-07 14:06:23 -04:00
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static bool
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validate_assert_impl(validate_state *state, bool cond, const char *str,
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const char *file, unsigned line)
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{
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if (!cond)
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log_error(state, str, file, line);
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return cond;
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}
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#define validate_assert(state, cond) \
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validate_assert_impl(state, (cond), #cond, __FILE__, __LINE__)
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2016-05-16 12:44:59 -04:00
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2017-03-02 16:25:59 -08:00
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static void validate_src(nir_src *src, validate_state *state,
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2018-12-04 02:35:46 +01:00
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unsigned bit_sizes, unsigned num_components);
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2014-07-30 15:20:53 -07:00
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2019-11-15 12:44:58 +01:00
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static void
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validate_num_components(validate_state *state, unsigned num_components)
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{
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2019-03-09 17:17:55 +01:00
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validate_assert(state, nir_num_components_valid(num_components));
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2019-11-15 12:44:58 +01:00
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}
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2014-07-30 15:20:53 -07:00
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static void
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2017-03-02 16:25:59 -08:00
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validate_ssa_src(nir_src *src, validate_state *state,
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2018-12-04 02:35:46 +01:00
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unsigned bit_sizes, unsigned num_components)
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2014-07-30 15:20:53 -07:00
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{
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2016-05-16 12:44:59 -04:00
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validate_assert(state, src->ssa != NULL);
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2014-07-30 15:20:53 -07:00
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nir/validate: Use a single set for SSA def validation
The current SSA def validation we do in nir_validate validates three
things:
1. That each SSA def is only ever used in the function in which it is
defined.
2. That an nir_src exists in an SSA def's use list if and only if it
points to that SSA def.
3. That each nir_src is in the correct use list (uses or if_uses) based
on whether it's an if condition or not.
The way we were doing this before was that we had a hash table which
provided a map from SSA def to a small ssa_def_validate_state data
structure which contained a pointer to the nir_function_impl and two
hash sets, one for each use list. This meant piles of allocation and
creating of little hash sets. It also meant one hash lookup for each
SSA def plus one per use as well as two per src (because we have to look
up the ssa_def_validate_state and then look up the use.) It also
involved a second walk over the instructions as a post-validate step.
This commit changes us to use a single low-collision hash set of SSA
sources for all of this by being a bit more clever. We accomplish the
objectives above as follows:
1. The list is clear when we start validating a function. If the
nir_src references an SSA def which is defined in a different
function, it simply won't be in the set.
2. When validating the SSA defs, we walk the uses and verify that they
have is_ssa set and that the SSA def points to the SSA def we're
validating. This catches the case of a nir_src being in the wrong
list. We then put the nir_src in the set and, when we validate the
nir_src, we assert that it's in the set. This takes care of any
cases where a nir_src isn't in the use list. After checking that
the nir_src is in the set, we remove it from the set and, at the end
of nir_function_impl validation, we assert that the set is empty.
This takes care of any cases where a nir_src is in a use list but
the instruction is no longer in the shader.
3. When we put a nir_src in the set, we set the bottom bit of the
pointer to 1 if it's the condition of an if. This lets us detect
whether or not a nir_src is in the right list.
When running shader-db with an optimized debug build of mesa on my
laptop, I get the following shader-db CPU times:
With NIR_VALIDATE=0 3033.34 seconds
Before this commit 20224.83 seconds
After this commit 6255.50 seconds
Assuming shader-db is a representative sampling of GLSL shaders, this
means that making this change yields an 81% reduction in the time spent
in nir_validate. It still isn't cheap but enabling validation now only
increases compile times by 2x instead of 6.6x.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2019-05-04 18:02:50 -05:00
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/* As we walk SSA defs, we add every use to this set. We need to make sure
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* our use is seen in a use list.
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*/
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2023-04-06 15:37:54 -04:00
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struct set_entry *entry = _mesa_set_search(state->ssa_srcs, src);
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nir/validate: Use a single set for SSA def validation
The current SSA def validation we do in nir_validate validates three
things:
1. That each SSA def is only ever used in the function in which it is
defined.
2. That an nir_src exists in an SSA def's use list if and only if it
points to that SSA def.
3. That each nir_src is in the correct use list (uses or if_uses) based
on whether it's an if condition or not.
The way we were doing this before was that we had a hash table which
provided a map from SSA def to a small ssa_def_validate_state data
structure which contained a pointer to the nir_function_impl and two
hash sets, one for each use list. This meant piles of allocation and
creating of little hash sets. It also meant one hash lookup for each
SSA def plus one per use as well as two per src (because we have to look
up the ssa_def_validate_state and then look up the use.) It also
involved a second walk over the instructions as a post-validate step.
This commit changes us to use a single low-collision hash set of SSA
sources for all of this by being a bit more clever. We accomplish the
objectives above as follows:
1. The list is clear when we start validating a function. If the
nir_src references an SSA def which is defined in a different
function, it simply won't be in the set.
2. When validating the SSA defs, we walk the uses and verify that they
have is_ssa set and that the SSA def points to the SSA def we're
validating. This catches the case of a nir_src being in the wrong
list. We then put the nir_src in the set and, when we validate the
nir_src, we assert that it's in the set. This takes care of any
cases where a nir_src isn't in the use list. After checking that
the nir_src is in the set, we remove it from the set and, at the end
of nir_function_impl validation, we assert that the set is empty.
This takes care of any cases where a nir_src is in a use list but
the instruction is no longer in the shader.
3. When we put a nir_src in the set, we set the bottom bit of the
pointer to 1 if it's the condition of an if. This lets us detect
whether or not a nir_src is in the right list.
When running shader-db with an optimized debug build of mesa on my
laptop, I get the following shader-db CPU times:
With NIR_VALIDATE=0 3033.34 seconds
Before this commit 20224.83 seconds
After this commit 6255.50 seconds
Assuming shader-db is a representative sampling of GLSL shaders, this
means that making this change yields an 81% reduction in the time spent
in nir_validate. It still isn't cheap but enabling validation now only
increases compile times by 2x instead of 6.6x.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2019-05-04 18:02:50 -05:00
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validate_assert(state, entry);
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/* This will let us prove that we've seen all the sources */
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if (entry)
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_mesa_set_remove(state->ssa_srcs, entry);
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2014-07-30 15:20:53 -07:00
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2018-12-04 02:35:46 +01:00
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if (bit_sizes)
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validate_assert(state, src->ssa->bit_size & bit_sizes);
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2017-03-02 16:25:59 -08:00
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if (num_components)
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validate_assert(state, src->ssa->num_components == num_components);
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2014-07-30 15:20:53 -07:00
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/* TODO validate that the use is dominated by the definition */
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}
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static void
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2017-03-02 16:25:59 -08:00
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validate_src(nir_src *src, validate_state *state,
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2018-12-04 02:35:46 +01:00
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unsigned bit_sizes, unsigned num_components)
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2014-07-30 15:20:53 -07:00
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{
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nir/nir: Use a linked list instead of a hash set for use/def sets
This commit switches us from the current setup of using hash sets for
use/def sets to using linked lists. Doing so should save us quite a bit of
memory because we aren't carrying around 3 hash sets per register and 2 per
SSA value. It should also save us CPU time because adding/removing things
from use/def sets is 4 pointer manipulations instead of a hash lookup.
Running shader-db 50 times with USE_NIR=0, NIR, and NIR + use/def lists:
GLSL IR Only: 586.4 +/- 1.653833
NIR with hash sets: 675.4 +/- 2.502108
NIR + use/def lists: 641.2 +/- 1.557043
I also ran a memory usage experiment with Ken's patch to delete GLSL IR and
keep NIR. This patch cuts an aditional 42.9 MiB of ralloc'd memory over
and above what we gained by deleting the GLSL IR on the same dota trace.
On the code complexity side of things, some things are now much easier and
others are a bit harder. One of the operations we perform constantly in
optimization passes is to replace one source with another. Due to the fact
that an instruction can use the same SSA value multiple times, we had to
iterate through the sources of the instruction and determine if the use we
were replacing was the only one before removing it from the set of uses.
With this patch, uses are per-source not per-instruction so we can just
remove it safely. On the other hand, trying to iterate over all of the
instructions that use a given value is more difficult. Fortunately, the
two places we do that are the ffma peephole where it doesn't matter and GCM
where we already gracefully handle duplicates visits to an instruction.
Another aspect here is that using linked lists in this way can be tricky to
get right. With sets, things were quite forgiving and the worst that
happened if you didn't properly remove a use was that it would get caught
in the validator. With linked lists, it can lead to linked list corruption
which can be harder to track. However, we do just as much validation of
the linked lists as we did of the sets so the validator should still catch
these problems. While working on this series, the vast majority of the
bugs I had to fix were caught by assertions. I don't think the lists are
going to be that much worse than the sets.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-24 10:16:27 -07:00
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if (state->instr)
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2016-05-16 12:44:59 -04:00
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validate_assert(state, src->parent_instr == state->instr);
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nir/nir: Use a linked list instead of a hash set for use/def sets
This commit switches us from the current setup of using hash sets for
use/def sets to using linked lists. Doing so should save us quite a bit of
memory because we aren't carrying around 3 hash sets per register and 2 per
SSA value. It should also save us CPU time because adding/removing things
from use/def sets is 4 pointer manipulations instead of a hash lookup.
Running shader-db 50 times with USE_NIR=0, NIR, and NIR + use/def lists:
GLSL IR Only: 586.4 +/- 1.653833
NIR with hash sets: 675.4 +/- 2.502108
NIR + use/def lists: 641.2 +/- 1.557043
I also ran a memory usage experiment with Ken's patch to delete GLSL IR and
keep NIR. This patch cuts an aditional 42.9 MiB of ralloc'd memory over
and above what we gained by deleting the GLSL IR on the same dota trace.
On the code complexity side of things, some things are now much easier and
others are a bit harder. One of the operations we perform constantly in
optimization passes is to replace one source with another. Due to the fact
that an instruction can use the same SSA value multiple times, we had to
iterate through the sources of the instruction and determine if the use we
were replacing was the only one before removing it from the set of uses.
With this patch, uses are per-source not per-instruction so we can just
remove it safely. On the other hand, trying to iterate over all of the
instructions that use a given value is more difficult. Fortunately, the
two places we do that are the ffma peephole where it doesn't matter and GCM
where we already gracefully handle duplicates visits to an instruction.
Another aspect here is that using linked lists in this way can be tricky to
get right. With sets, things were quite forgiving and the worst that
happened if you didn't properly remove a use was that it would get caught
in the validator. With linked lists, it can lead to linked list corruption
which can be harder to track. However, we do just as much validation of
the linked lists as we did of the sets so the validator should still catch
these problems. While working on this series, the vast majority of the
bugs I had to fix were caught by assertions. I don't think the lists are
going to be that much worse than the sets.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-24 10:16:27 -07:00
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else
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2016-05-16 12:44:59 -04:00
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validate_assert(state, src->parent_if == state->if_stmt);
|
nir/nir: Use a linked list instead of a hash set for use/def sets
This commit switches us from the current setup of using hash sets for
use/def sets to using linked lists. Doing so should save us quite a bit of
memory because we aren't carrying around 3 hash sets per register and 2 per
SSA value. It should also save us CPU time because adding/removing things
from use/def sets is 4 pointer manipulations instead of a hash lookup.
Running shader-db 50 times with USE_NIR=0, NIR, and NIR + use/def lists:
GLSL IR Only: 586.4 +/- 1.653833
NIR with hash sets: 675.4 +/- 2.502108
NIR + use/def lists: 641.2 +/- 1.557043
I also ran a memory usage experiment with Ken's patch to delete GLSL IR and
keep NIR. This patch cuts an aditional 42.9 MiB of ralloc'd memory over
and above what we gained by deleting the GLSL IR on the same dota trace.
On the code complexity side of things, some things are now much easier and
others are a bit harder. One of the operations we perform constantly in
optimization passes is to replace one source with another. Due to the fact
that an instruction can use the same SSA value multiple times, we had to
iterate through the sources of the instruction and determine if the use we
were replacing was the only one before removing it from the set of uses.
With this patch, uses are per-source not per-instruction so we can just
remove it safely. On the other hand, trying to iterate over all of the
instructions that use a given value is more difficult. Fortunately, the
two places we do that are the ffma peephole where it doesn't matter and GCM
where we already gracefully handle duplicates visits to an instruction.
Another aspect here is that using linked lists in this way can be tricky to
get right. With sets, things were quite forgiving and the worst that
happened if you didn't properly remove a use was that it would get caught
in the validator. With linked lists, it can lead to linked list corruption
which can be harder to track. However, we do just as much validation of
the linked lists as we did of the sets so the validator should still catch
these problems. While working on this series, the vast majority of the
bugs I had to fix were caught by assertions. I don't think the lists are
going to be that much worse than the sets.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-24 10:16:27 -07:00
|
|
|
|
2023-08-01 11:02:13 -04:00
|
|
|
validate_ssa_src(src, state, bit_sizes, num_components);
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_alu_src(nir_alu_instr *instr, unsigned index, validate_state *state)
|
|
|
|
|
{
|
|
|
|
|
nir_alu_src *src = &instr->src[index];
|
|
|
|
|
|
2018-05-15 11:11:12 +10:00
|
|
|
unsigned num_components = nir_src_num_components(src->src);
|
2018-07-12 03:40:23 +02:00
|
|
|
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
|
|
|
|
|
validate_assert(state, src->swizzle[i] < NIR_MAX_VEC_COMPONENTS);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
|
|
|
|
if (nir_alu_instr_channel_used(instr, index, i))
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, src->swizzle[i] < num_components);
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
2017-03-02 16:25:59 -08:00
|
|
|
validate_src(&src->src, state, 0, 0);
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_ssa_def(nir_ssa_def *def, validate_state *state)
|
|
|
|
|
{
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, def->index < state->impl->ssa_alloc);
|
|
|
|
|
validate_assert(state, !BITSET_TEST(state->ssa_defs_found, def->index));
|
2014-11-10 16:00:03 -08:00
|
|
|
BITSET_SET(state->ssa_defs_found, def->index);
|
|
|
|
|
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, def->parent_instr == state->instr);
|
2019-11-15 12:44:58 +01:00
|
|
|
validate_num_components(state, def->num_components);
|
2015-02-04 14:01:51 -08:00
|
|
|
|
nir/nir: Use a linked list instead of a hash set for use/def sets
This commit switches us from the current setup of using hash sets for
use/def sets to using linked lists. Doing so should save us quite a bit of
memory because we aren't carrying around 3 hash sets per register and 2 per
SSA value. It should also save us CPU time because adding/removing things
from use/def sets is 4 pointer manipulations instead of a hash lookup.
Running shader-db 50 times with USE_NIR=0, NIR, and NIR + use/def lists:
GLSL IR Only: 586.4 +/- 1.653833
NIR with hash sets: 675.4 +/- 2.502108
NIR + use/def lists: 641.2 +/- 1.557043
I also ran a memory usage experiment with Ken's patch to delete GLSL IR and
keep NIR. This patch cuts an aditional 42.9 MiB of ralloc'd memory over
and above what we gained by deleting the GLSL IR on the same dota trace.
On the code complexity side of things, some things are now much easier and
others are a bit harder. One of the operations we perform constantly in
optimization passes is to replace one source with another. Due to the fact
that an instruction can use the same SSA value multiple times, we had to
iterate through the sources of the instruction and determine if the use we
were replacing was the only one before removing it from the set of uses.
With this patch, uses are per-source not per-instruction so we can just
remove it safely. On the other hand, trying to iterate over all of the
instructions that use a given value is more difficult. Fortunately, the
two places we do that are the ffma peephole where it doesn't matter and GCM
where we already gracefully handle duplicates visits to an instruction.
Another aspect here is that using linked lists in this way can be tricky to
get right. With sets, things were quite forgiving and the worst that
happened if you didn't properly remove a use was that it would get caught
in the validator. With linked lists, it can lead to linked list corruption
which can be harder to track. However, we do just as much validation of
the linked lists as we did of the sets so the validator should still catch
these problems. While working on this series, the vast majority of the
bugs I had to fix were caught by assertions. I don't think the lists are
going to be that much worse than the sets.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-24 10:16:27 -07:00
|
|
|
list_validate(&def->uses);
|
2023-04-06 13:19:31 -04:00
|
|
|
nir_foreach_use_including_if(src, def) {
|
nir/validate: Use a single set for SSA def validation
The current SSA def validation we do in nir_validate validates three
things:
1. That each SSA def is only ever used in the function in which it is
defined.
2. That an nir_src exists in an SSA def's use list if and only if it
points to that SSA def.
3. That each nir_src is in the correct use list (uses or if_uses) based
on whether it's an if condition or not.
The way we were doing this before was that we had a hash table which
provided a map from SSA def to a small ssa_def_validate_state data
structure which contained a pointer to the nir_function_impl and two
hash sets, one for each use list. This meant piles of allocation and
creating of little hash sets. It also meant one hash lookup for each
SSA def plus one per use as well as two per src (because we have to look
up the ssa_def_validate_state and then look up the use.) It also
involved a second walk over the instructions as a post-validate step.
This commit changes us to use a single low-collision hash set of SSA
sources for all of this by being a bit more clever. We accomplish the
objectives above as follows:
1. The list is clear when we start validating a function. If the
nir_src references an SSA def which is defined in a different
function, it simply won't be in the set.
2. When validating the SSA defs, we walk the uses and verify that they
have is_ssa set and that the SSA def points to the SSA def we're
validating. This catches the case of a nir_src being in the wrong
list. We then put the nir_src in the set and, when we validate the
nir_src, we assert that it's in the set. This takes care of any
cases where a nir_src isn't in the use list. After checking that
the nir_src is in the set, we remove it from the set and, at the end
of nir_function_impl validation, we assert that the set is empty.
This takes care of any cases where a nir_src is in a use list but
the instruction is no longer in the shader.
3. When we put a nir_src in the set, we set the bottom bit of the
pointer to 1 if it's the condition of an if. This lets us detect
whether or not a nir_src is in the right list.
When running shader-db with an optimized debug build of mesa on my
laptop, I get the following shader-db CPU times:
With NIR_VALIDATE=0 3033.34 seconds
Before this commit 20224.83 seconds
After this commit 6255.50 seconds
Assuming shader-db is a representative sampling of GLSL shaders, this
means that making this change yields an 81% reduction in the time spent
in nir_validate. It still isn't cheap but enabling validation now only
increases compile times by 2x instead of 6.6x.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2019-05-04 18:02:50 -05:00
|
|
|
validate_assert(state, src->ssa == def);
|
2023-04-06 13:19:31 -04:00
|
|
|
|
2023-04-06 15:37:54 -04:00
|
|
|
bool already_seen = false;
|
|
|
|
|
_mesa_set_search_and_add(state->ssa_srcs, src, &already_seen);
|
nir/validate: Use a single set for SSA def validation
The current SSA def validation we do in nir_validate validates three
things:
1. That each SSA def is only ever used in the function in which it is
defined.
2. That an nir_src exists in an SSA def's use list if and only if it
points to that SSA def.
3. That each nir_src is in the correct use list (uses or if_uses) based
on whether it's an if condition or not.
The way we were doing this before was that we had a hash table which
provided a map from SSA def to a small ssa_def_validate_state data
structure which contained a pointer to the nir_function_impl and two
hash sets, one for each use list. This meant piles of allocation and
creating of little hash sets. It also meant one hash lookup for each
SSA def plus one per use as well as two per src (because we have to look
up the ssa_def_validate_state and then look up the use.) It also
involved a second walk over the instructions as a post-validate step.
This commit changes us to use a single low-collision hash set of SSA
sources for all of this by being a bit more clever. We accomplish the
objectives above as follows:
1. The list is clear when we start validating a function. If the
nir_src references an SSA def which is defined in a different
function, it simply won't be in the set.
2. When validating the SSA defs, we walk the uses and verify that they
have is_ssa set and that the SSA def points to the SSA def we're
validating. This catches the case of a nir_src being in the wrong
list. We then put the nir_src in the set and, when we validate the
nir_src, we assert that it's in the set. This takes care of any
cases where a nir_src isn't in the use list. After checking that
the nir_src is in the set, we remove it from the set and, at the end
of nir_function_impl validation, we assert that the set is empty.
This takes care of any cases where a nir_src is in a use list but
the instruction is no longer in the shader.
3. When we put a nir_src in the set, we set the bottom bit of the
pointer to 1 if it's the condition of an if. This lets us detect
whether or not a nir_src is in the right list.
When running shader-db with an optimized debug build of mesa on my
laptop, I get the following shader-db CPU times:
With NIR_VALIDATE=0 3033.34 seconds
Before this commit 20224.83 seconds
After this commit 6255.50 seconds
Assuming shader-db is a representative sampling of GLSL shaders, this
means that making this change yields an 81% reduction in the time spent
in nir_validate. It still isn't cheap but enabling validation now only
increases compile times by 2x instead of 6.6x.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2019-05-04 18:02:50 -05:00
|
|
|
/* A nir_src should only appear once and only in one SSA def use list */
|
|
|
|
|
validate_assert(state, !already_seen);
|
|
|
|
|
}
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
2017-03-02 16:25:59 -08:00
|
|
|
validate_dest(nir_dest *dest, validate_state *state,
|
2018-12-04 02:35:46 +01:00
|
|
|
unsigned bit_sizes, unsigned num_components)
|
2014-07-30 15:20:53 -07:00
|
|
|
{
|
2023-08-01 11:02:13 -04:00
|
|
|
if (bit_sizes)
|
|
|
|
|
validate_assert(state, dest->ssa.bit_size & bit_sizes);
|
|
|
|
|
if (num_components)
|
|
|
|
|
validate_assert(state, dest->ssa.num_components == num_components);
|
|
|
|
|
validate_ssa_def(&dest->ssa, state);
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
2015-11-17 15:45:18 +01:00
|
|
|
validate_alu_dest(nir_alu_instr *instr, validate_state *state)
|
2014-07-30 15:20:53 -07:00
|
|
|
{
|
2015-11-17 15:45:18 +01:00
|
|
|
nir_alu_dest *dest = &instr->dest;
|
2017-03-02 16:25:59 -08:00
|
|
|
validate_dest(&dest->dest, state, 0, 0);
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_alu_instr(nir_alu_instr *instr, validate_state *state)
|
|
|
|
|
{
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, instr->op < nir_num_opcodes);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
2017-03-08 10:32:40 -08:00
|
|
|
unsigned instr_bit_size = 0;
|
2014-07-30 15:20:53 -07:00
|
|
|
for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
|
2017-03-08 10:32:40 -08:00
|
|
|
nir_alu_type src_type = nir_op_infos[instr->op].input_types[i];
|
|
|
|
|
unsigned src_bit_size = nir_src_bit_size(instr->src[i].src);
|
|
|
|
|
if (nir_alu_type_get_type_size(src_type)) {
|
|
|
|
|
validate_assert(state, src_bit_size == nir_alu_type_get_type_size(src_type));
|
|
|
|
|
} else if (instr_bit_size) {
|
|
|
|
|
validate_assert(state, src_bit_size == instr_bit_size);
|
|
|
|
|
} else {
|
|
|
|
|
instr_bit_size = src_bit_size;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (nir_alu_type_get_base_type(src_type) == nir_type_float) {
|
|
|
|
|
/* 8-bit float isn't a thing */
|
|
|
|
|
validate_assert(state, src_bit_size == 16 || src_bit_size == 32 ||
|
|
|
|
|
src_bit_size == 64);
|
|
|
|
|
}
|
|
|
|
|
|
2022-10-12 14:52:19 -07:00
|
|
|
/* In nir_opcodes.py, these are defined to take general uint or int
|
|
|
|
|
* sources. However, they're really only defined for 32-bit or 64-bit
|
|
|
|
|
* sources. This seems to be the only place to enforce this
|
|
|
|
|
* restriction.
|
|
|
|
|
*/
|
|
|
|
|
switch (instr->op) {
|
|
|
|
|
case nir_op_ufind_msb:
|
|
|
|
|
case nir_op_ufind_msb_rev:
|
|
|
|
|
validate_assert(state, src_bit_size == 32 || src_bit_size == 64);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2014-07-30 15:20:53 -07:00
|
|
|
validate_alu_src(instr, i, state);
|
|
|
|
|
}
|
2015-11-12 10:38:12 -08:00
|
|
|
|
2017-03-08 10:32:40 -08:00
|
|
|
nir_alu_type dest_type = nir_op_infos[instr->op].output_type;
|
|
|
|
|
unsigned dest_bit_size = nir_dest_bit_size(instr->dest.dest);
|
|
|
|
|
if (nir_alu_type_get_type_size(dest_type)) {
|
|
|
|
|
validate_assert(state, dest_bit_size == nir_alu_type_get_type_size(dest_type));
|
|
|
|
|
} else if (instr_bit_size) {
|
|
|
|
|
validate_assert(state, dest_bit_size == instr_bit_size);
|
|
|
|
|
} else {
|
|
|
|
|
/* The only unsized thing is the destination so it's vacuously valid */
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (nir_alu_type_get_base_type(dest_type) == nir_type_float) {
|
|
|
|
|
/* 8-bit float isn't a thing */
|
|
|
|
|
validate_assert(state, dest_bit_size == 16 || dest_bit_size == 32 ||
|
|
|
|
|
dest_bit_size == 64);
|
|
|
|
|
}
|
|
|
|
|
|
2015-11-17 15:45:18 +01:00
|
|
|
validate_alu_dest(instr, state);
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_var_use(nir_variable *var, validate_state *state)
|
|
|
|
|
{
|
2018-03-20 16:57:51 -07:00
|
|
|
struct hash_entry *entry = _mesa_hash_table_search(state->var_defs, var);
|
|
|
|
|
validate_assert(state, entry);
|
2019-05-20 11:05:15 +10:00
|
|
|
if (entry && var->data.mode == nir_var_function_temp)
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, (nir_function_impl *) entry->data == state->impl);
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
2018-03-14 21:45:38 -07:00
|
|
|
static void
|
|
|
|
|
validate_deref_instr(nir_deref_instr *instr, validate_state *state)
|
|
|
|
|
{
|
|
|
|
|
if (instr->deref_type == nir_deref_type_var) {
|
|
|
|
|
/* Variable dereferences are stupid simple. */
|
2020-10-30 12:14:05 -05:00
|
|
|
validate_assert(state, instr->modes == instr->var->data.mode);
|
2018-03-14 21:45:38 -07:00
|
|
|
validate_assert(state, instr->type == instr->var->type);
|
|
|
|
|
validate_var_use(instr->var, state);
|
|
|
|
|
} else if (instr->deref_type == nir_deref_type_cast) {
|
|
|
|
|
/* For cast, we simply have to trust the instruction. It's up to
|
|
|
|
|
* lowering passes and front/back-ends to make them sane.
|
|
|
|
|
*/
|
|
|
|
|
validate_src(&instr->parent, state, 0, 0);
|
|
|
|
|
|
2020-08-15 00:28:55 -05:00
|
|
|
/* Most variable modes in NIR can only exist by themselves. */
|
|
|
|
|
if (instr->modes & ~nir_var_mem_generic)
|
|
|
|
|
validate_assert(state, util_bitcount(instr->modes) == 1);
|
|
|
|
|
|
|
|
|
|
nir_deref_instr *parent = nir_src_as_deref(instr->parent);
|
|
|
|
|
if (parent) {
|
|
|
|
|
/* Casts can change the mode but it can't change completely. The new
|
|
|
|
|
* mode must have some bits in common with the old.
|
|
|
|
|
*/
|
|
|
|
|
validate_assert(state, instr->modes & parent->modes);
|
|
|
|
|
} else {
|
|
|
|
|
/* If our parent isn't a deref, just assert the mode is there */
|
|
|
|
|
validate_assert(state, instr->modes != 0);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* We just validate that the type is there */
|
2018-03-14 21:45:38 -07:00
|
|
|
validate_assert(state, instr->type);
|
2020-08-24 09:51:04 -05:00
|
|
|
if (instr->cast.align_mul > 0) {
|
|
|
|
|
validate_assert(state, util_is_power_of_two_nonzero(instr->cast.align_mul));
|
|
|
|
|
validate_assert(state, instr->cast.align_offset < instr->cast.align_mul);
|
|
|
|
|
} else {
|
|
|
|
|
validate_assert(state, instr->cast.align_offset == 0);
|
|
|
|
|
}
|
2018-03-14 21:45:38 -07:00
|
|
|
} else {
|
|
|
|
|
/* The parent pointer value must have the same number of components
|
|
|
|
|
* as the destination.
|
|
|
|
|
*/
|
|
|
|
|
validate_src(&instr->parent, state, nir_dest_bit_size(instr->dest),
|
|
|
|
|
nir_dest_num_components(instr->dest));
|
|
|
|
|
|
|
|
|
|
nir_instr *parent_instr = instr->parent.ssa->parent_instr;
|
|
|
|
|
|
|
|
|
|
/* The parent must come from another deref instruction */
|
|
|
|
|
validate_assert(state, parent_instr->type == nir_instr_type_deref);
|
|
|
|
|
|
|
|
|
|
nir_deref_instr *parent = nir_instr_as_deref(parent_instr);
|
|
|
|
|
|
2020-10-30 12:14:05 -05:00
|
|
|
validate_assert(state, instr->modes == parent->modes);
|
2018-03-14 21:45:38 -07:00
|
|
|
|
|
|
|
|
switch (instr->deref_type) {
|
|
|
|
|
case nir_deref_type_struct:
|
2019-03-05 16:07:12 +11:00
|
|
|
validate_assert(state, glsl_type_is_struct_or_ifc(parent->type));
|
2018-03-14 21:45:38 -07:00
|
|
|
validate_assert(state,
|
|
|
|
|
instr->strct.index < glsl_get_length(parent->type));
|
|
|
|
|
validate_assert(state, instr->type ==
|
|
|
|
|
glsl_get_struct_field(parent->type, instr->strct.index));
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_deref_type_array:
|
|
|
|
|
case nir_deref_type_array_wildcard:
|
2020-11-09 14:41:38 +00:00
|
|
|
if (instr->modes & nir_var_vec_indexable_modes) {
|
2018-12-13 18:34:35 -06:00
|
|
|
/* Shared variables and UBO/SSBOs have a bit more relaxed rules
|
|
|
|
|
* because we need to be able to handle array derefs on vectors.
|
|
|
|
|
* Fortunately, nir_lower_io handles these just fine.
|
2018-03-14 21:45:38 -07:00
|
|
|
*/
|
|
|
|
|
validate_assert(state, glsl_type_is_array(parent->type) ||
|
|
|
|
|
glsl_type_is_matrix(parent->type) ||
|
|
|
|
|
glsl_type_is_vector(parent->type));
|
|
|
|
|
} else {
|
|
|
|
|
/* Most of NIR cannot handle array derefs on vectors */
|
|
|
|
|
validate_assert(state, glsl_type_is_array(parent->type) ||
|
|
|
|
|
glsl_type_is_matrix(parent->type));
|
|
|
|
|
}
|
|
|
|
|
validate_assert(state,
|
|
|
|
|
instr->type == glsl_get_array_element(parent->type));
|
|
|
|
|
|
2018-12-14 11:16:09 -06:00
|
|
|
if (instr->deref_type == nir_deref_type_array) {
|
|
|
|
|
validate_src(&instr->arr.index, state,
|
|
|
|
|
nir_dest_bit_size(instr->dest), 1);
|
|
|
|
|
}
|
2018-03-14 21:45:38 -07:00
|
|
|
break;
|
|
|
|
|
|
2018-11-28 12:26:52 -06:00
|
|
|
case nir_deref_type_ptr_as_array:
|
|
|
|
|
/* ptr_as_array derefs must have a parent that is either an array,
|
|
|
|
|
* ptr_as_array, or cast. If the parent is a cast, we get the stride
|
|
|
|
|
* information (if any) from the cast deref.
|
|
|
|
|
*/
|
|
|
|
|
validate_assert(state,
|
|
|
|
|
parent->deref_type == nir_deref_type_array ||
|
|
|
|
|
parent->deref_type == nir_deref_type_ptr_as_array ||
|
|
|
|
|
parent->deref_type == nir_deref_type_cast);
|
|
|
|
|
validate_src(&instr->arr.index, state,
|
|
|
|
|
nir_dest_bit_size(instr->dest), 1);
|
|
|
|
|
break;
|
|
|
|
|
|
2018-03-14 21:45:38 -07:00
|
|
|
default:
|
|
|
|
|
unreachable("Invalid deref instruction type");
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* We intentionally don't validate the size of the destination because we
|
|
|
|
|
* want to let other compiler components such as SPIR-V decide how big
|
|
|
|
|
* pointers should be.
|
|
|
|
|
*/
|
|
|
|
|
validate_dest(&instr->dest, state, 0, 0);
|
2019-01-04 11:11:49 -06:00
|
|
|
|
2020-10-07 23:05:25 -05:00
|
|
|
/* Certain modes cannot be used as sources for phi instructions because
|
|
|
|
|
* way too many passes assume that they can always chase deref chains.
|
|
|
|
|
*/
|
2023-04-07 17:50:09 -04:00
|
|
|
nir_foreach_use_including_if(use, &instr->dest.ssa) {
|
|
|
|
|
/* Deref instructions as if conditions don't make sense because if
|
|
|
|
|
* conditions expect well-formed Booleans. If you want to compare with
|
|
|
|
|
* NULL, an explicit comparison operation should be used.
|
|
|
|
|
*/
|
|
|
|
|
if (!validate_assert(state, !use->is_if))
|
|
|
|
|
continue;
|
|
|
|
|
|
2019-05-07 02:03:59 -07:00
|
|
|
if (use->parent_instr->type == nir_instr_type_phi) {
|
2020-10-30 12:14:05 -05:00
|
|
|
validate_assert(state, !(instr->modes & (nir_var_shader_in |
|
|
|
|
|
nir_var_shader_out |
|
|
|
|
|
nir_var_shader_out |
|
|
|
|
|
nir_var_uniform)));
|
2019-05-07 02:03:59 -07:00
|
|
|
}
|
|
|
|
|
}
|
2018-03-14 21:45:38 -07:00
|
|
|
}
|
|
|
|
|
|
2020-06-08 09:52:28 -07:00
|
|
|
static bool
|
|
|
|
|
vectorized_intrinsic(nir_intrinsic_instr *intr)
|
|
|
|
|
{
|
|
|
|
|
const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
|
|
|
|
|
|
|
|
|
|
if (info->dest_components == 0)
|
|
|
|
|
return true;
|
|
|
|
|
|
|
|
|
|
for (unsigned i = 0; i < info->num_srcs; i++)
|
|
|
|
|
if (info->src_components[i] == 0)
|
|
|
|
|
return true;
|
|
|
|
|
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
2020-03-17 17:37:46 -05:00
|
|
|
/** Returns the image format or PIPE_FORMAT_COUNT for incomplete derefs
|
|
|
|
|
*
|
|
|
|
|
* We use PIPE_FORMAT_COUNT for incomplete derefs because PIPE_FORMAT_NONE
|
|
|
|
|
* indicates that we found the variable but it has no format specified.
|
|
|
|
|
*/
|
|
|
|
|
static enum pipe_format
|
|
|
|
|
image_intrin_format(nir_intrinsic_instr *instr)
|
|
|
|
|
{
|
2021-07-12 09:38:38 -05:00
|
|
|
if (nir_intrinsic_format(instr) != PIPE_FORMAT_NONE)
|
2020-03-17 17:37:46 -05:00
|
|
|
return nir_intrinsic_format(instr);
|
|
|
|
|
|
2021-07-12 09:38:38 -05:00
|
|
|
/* If this not a deref intrinsic, PIPE_FORMAT_NONE is the best we can do */
|
|
|
|
|
if (nir_intrinsic_infos[instr->intrinsic].src_components[0] != -1)
|
|
|
|
|
return PIPE_FORMAT_NONE;
|
|
|
|
|
|
2020-03-17 17:37:46 -05:00
|
|
|
nir_variable *var = nir_intrinsic_get_var(instr, 0);
|
|
|
|
|
if (var == NULL)
|
|
|
|
|
return PIPE_FORMAT_COUNT;
|
|
|
|
|
|
|
|
|
|
return var->data.image.format;
|
|
|
|
|
}
|
|
|
|
|
|
nir: Add intrinsics for register access
Note the writemask handling is chosen for consistency with the rest of NIR. In
every other instance, writemask=w requires a vec4 source. This is hardcoded into
nir_validate and nir_print as what it means to have a writemask.
More importantly, consistency with how register writemasks currently work.
nir_print hides it, but r0.w = fneg ssa_1.x is actually a vec4 instruction with
source ssa_1.xxxx. As a silly example nir_dest_num_components(that) = 4 in the
old model. I realize this is quite strange coming from a scalar ISA, but it's
perfectly natural for the class of vec4 hardware for which this was designed. In
that hardware, conceptually all instructions are vec4`, so the sequence "fneg
ssa_1 and write to channel w" is implemented as "fneg a vec4 with ssa_1.x in the
last component and write that vec4 out but mask to write only the w channel".
Isn't this inefficient? It can be. To save power, Midgard has scalar ALUs in
addition to vec4 ALUs. Those details are confined to the backend VLIW scheduler;
the instruction selection is still done as vec4. This mechanism has little in
common with AMD's SALUs. Midgard has a wave size of 1, with special hacks for
derivatives.
As a result, all backends consuming register writemasks are expecting this
pattern of code. Changing the store to take a vec1 instead of a vec4 would
require changing every backend to reswizzle the sources to resurrect the vec4. I
started typing a branch to do this yesterday, but it made a mess of both Midgard
and nir-to-tgsi. Without any good reason to think it'd actually help
performance, I abandoned the idea. Getting all 15 backends converted to the
helpers is enough of a challenge without forcing 10 backends to reswizzle their
sources too.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-05-16 11:19:49 -04:00
|
|
|
static void
|
|
|
|
|
validate_register_handle(nir_src handle_src,
|
|
|
|
|
unsigned num_components,
|
|
|
|
|
unsigned bit_size,
|
|
|
|
|
validate_state *state)
|
|
|
|
|
{
|
|
|
|
|
nir_ssa_def *handle = handle_src.ssa;
|
|
|
|
|
nir_instr *parent = handle->parent_instr;
|
|
|
|
|
|
|
|
|
|
if (!validate_assert(state, parent->type == nir_instr_type_intrinsic))
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
nir_intrinsic_instr *intr = nir_instr_as_intrinsic(parent);
|
|
|
|
|
if (!validate_assert(state, intr->intrinsic == nir_intrinsic_decl_reg))
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
validate_assert(state, nir_intrinsic_num_components(intr) == num_components);
|
|
|
|
|
validate_assert(state, nir_intrinsic_bit_size(intr) == bit_size);
|
|
|
|
|
}
|
|
|
|
|
|
2014-07-30 15:20:53 -07:00
|
|
|
static void
|
|
|
|
|
validate_intrinsic_instr(nir_intrinsic_instr *instr, validate_state *state)
|
|
|
|
|
{
|
2018-04-02 19:23:36 -07:00
|
|
|
unsigned dest_bit_size = 0;
|
|
|
|
|
unsigned src_bit_sizes[NIR_INTRINSIC_MAX_INPUTS] = { 0, };
|
2014-12-03 14:47:17 -08:00
|
|
|
switch (instr->intrinsic) {
|
nir: Add intrinsics for register access
Note the writemask handling is chosen for consistency with the rest of NIR. In
every other instance, writemask=w requires a vec4 source. This is hardcoded into
nir_validate and nir_print as what it means to have a writemask.
More importantly, consistency with how register writemasks currently work.
nir_print hides it, but r0.w = fneg ssa_1.x is actually a vec4 instruction with
source ssa_1.xxxx. As a silly example nir_dest_num_components(that) = 4 in the
old model. I realize this is quite strange coming from a scalar ISA, but it's
perfectly natural for the class of vec4 hardware for which this was designed. In
that hardware, conceptually all instructions are vec4`, so the sequence "fneg
ssa_1 and write to channel w" is implemented as "fneg a vec4 with ssa_1.x in the
last component and write that vec4 out but mask to write only the w channel".
Isn't this inefficient? It can be. To save power, Midgard has scalar ALUs in
addition to vec4 ALUs. Those details are confined to the backend VLIW scheduler;
the instruction selection is still done as vec4. This mechanism has little in
common with AMD's SALUs. Midgard has a wave size of 1, with special hacks for
derivatives.
As a result, all backends consuming register writemasks are expecting this
pattern of code. Changing the store to take a vec1 instead of a vec4 would
require changing every backend to reswizzle the sources to resurrect the vec4. I
started typing a branch to do this yesterday, but it made a mess of both Midgard
and nir-to-tgsi. Without any good reason to think it'd actually help
performance, I abandoned the idea. Getting all 15 backends converted to the
helpers is enough of a challenge without forcing 10 backends to reswizzle their
sources too.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-05-16 11:19:49 -04:00
|
|
|
case nir_intrinsic_decl_reg:
|
|
|
|
|
assert(state->block == nir_start_block(state->impl));
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_intrinsic_load_reg:
|
|
|
|
|
case nir_intrinsic_load_reg_indirect:
|
|
|
|
|
validate_register_handle(instr->src[0],
|
|
|
|
|
nir_dest_num_components(instr->dest),
|
|
|
|
|
nir_dest_bit_size(instr->dest), state);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_intrinsic_store_reg:
|
|
|
|
|
case nir_intrinsic_store_reg_indirect:
|
|
|
|
|
validate_register_handle(instr->src[1],
|
|
|
|
|
nir_src_num_components(instr->src[0]),
|
|
|
|
|
nir_src_bit_size(instr->src[0]), state);
|
|
|
|
|
break;
|
|
|
|
|
|
2020-09-30 15:19:45 -05:00
|
|
|
case nir_intrinsic_convert_alu_types: {
|
|
|
|
|
nir_alu_type src_type = nir_intrinsic_src_type(instr);
|
|
|
|
|
nir_alu_type dest_type = nir_intrinsic_dest_type(instr);
|
|
|
|
|
dest_bit_size = nir_alu_type_get_type_size(dest_type);
|
|
|
|
|
src_bit_sizes[0] = nir_alu_type_get_type_size(src_type);
|
|
|
|
|
validate_assert(state, dest_bit_size != 0);
|
|
|
|
|
validate_assert(state, src_bit_sizes[0] != 0);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2018-03-22 16:41:18 -07:00
|
|
|
case nir_intrinsic_load_param: {
|
|
|
|
|
unsigned param_idx = nir_intrinsic_param_idx(instr);
|
|
|
|
|
validate_assert(state, param_idx < state->impl->function->num_params);
|
|
|
|
|
nir_parameter *param = &state->impl->function->params[param_idx];
|
|
|
|
|
validate_assert(state, instr->num_components == param->num_components);
|
|
|
|
|
dest_bit_size = param->bit_size;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2018-03-15 14:56:43 -07:00
|
|
|
case nir_intrinsic_load_deref: {
|
|
|
|
|
nir_deref_instr *src = nir_src_as_deref(instr->src[0]);
|
2019-12-27 17:49:27 +01:00
|
|
|
assert(src);
|
2018-03-15 14:56:43 -07:00
|
|
|
validate_assert(state, glsl_type_is_vector_or_scalar(src->type) ||
|
2020-10-30 12:14:05 -05:00
|
|
|
(src->modes == nir_var_uniform &&
|
2018-03-15 14:56:43 -07:00
|
|
|
glsl_get_base_type(src->type) == GLSL_TYPE_SUBROUTINE));
|
|
|
|
|
validate_assert(state, instr->num_components ==
|
|
|
|
|
glsl_get_vector_elements(src->type));
|
|
|
|
|
dest_bit_size = glsl_get_bit_size(src->type);
|
2019-03-09 15:05:25 -06:00
|
|
|
/* Also allow 32-bit boolean load operations */
|
|
|
|
|
if (glsl_type_is_boolean(src->type))
|
|
|
|
|
dest_bit_size |= 32;
|
2018-03-15 14:56:43 -07:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case nir_intrinsic_store_deref: {
|
|
|
|
|
nir_deref_instr *dst = nir_src_as_deref(instr->src[0]);
|
2019-12-27 17:49:27 +01:00
|
|
|
assert(dst);
|
2018-03-15 14:56:43 -07:00
|
|
|
validate_assert(state, glsl_type_is_vector_or_scalar(dst->type));
|
|
|
|
|
validate_assert(state, instr->num_components ==
|
|
|
|
|
glsl_get_vector_elements(dst->type));
|
|
|
|
|
src_bit_sizes[1] = glsl_get_bit_size(dst->type);
|
2019-03-09 15:05:25 -06:00
|
|
|
/* Also allow 32-bit boolean store operations */
|
|
|
|
|
if (glsl_type_is_boolean(dst->type))
|
|
|
|
|
src_bit_sizes[1] |= 32;
|
2020-10-30 12:19:25 -05:00
|
|
|
validate_assert(state, !nir_deref_mode_may_be(dst, nir_var_read_only_modes));
|
2018-03-15 14:56:43 -07:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case nir_intrinsic_copy_deref: {
|
|
|
|
|
nir_deref_instr *dst = nir_src_as_deref(instr->src[0]);
|
|
|
|
|
nir_deref_instr *src = nir_src_as_deref(instr->src[1]);
|
2019-03-09 13:06:28 -06:00
|
|
|
validate_assert(state, glsl_get_bare_type(dst->type) ==
|
|
|
|
|
glsl_get_bare_type(src->type));
|
2020-10-30 12:19:25 -05:00
|
|
|
validate_assert(state, !nir_deref_mode_may_be(dst, nir_var_read_only_modes));
|
2022-06-26 01:18:09 +02:00
|
|
|
/* FIXME: now that we track if the var copies were lowered, it would be
|
|
|
|
|
* good to validate here that no new copy derefs were added. Right now
|
|
|
|
|
* we can't as there are some specific cases where copies are added even
|
|
|
|
|
* after the lowering. One example is the Intel compiler, that calls
|
|
|
|
|
* nir_lower_io_to_temporaries when linking some shader stages.
|
|
|
|
|
*/
|
2018-03-15 14:56:43 -07:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2020-08-18 11:38:41 -07:00
|
|
|
case nir_intrinsic_load_ubo_vec4: {
|
|
|
|
|
int bit_size = nir_dest_bit_size(instr->dest);
|
|
|
|
|
validate_assert(state, bit_size >= 8);
|
|
|
|
|
validate_assert(state, (nir_intrinsic_component(instr) +
|
|
|
|
|
instr->num_components) * (bit_size / 8) <= 16);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2020-03-27 13:08:21 -05:00
|
|
|
case nir_intrinsic_load_ubo:
|
nir: Add a range_base+range to nir_intrinsic_load_ubo().
For UBO accesses to be the same performance as classic GL default uniform
block uniforms, we need to be able to push them through the same path. On
freedreno, we haven't been uploading UBOs as push constants when they're
used for indirect array access, because we don't know what range of the
UBO is needed for an access.
I believe we won't be able to calculate the range in general in spirv
given casts that can happen, so we define a [0, ~0] range to be "We don't
know anything". We use that at the moment for all UBO loads except for
nir_lower_uniforms_to_ubo, where we now avoid losing the range information
that default uniform block loads come with.
In a departure from other NIR intrinsics with a "base", I didn't make the
base an be something you have to add to the src[1] offset. This keeps us
from needing to modify all drivers (particularly since the base+offset
thing can mean needing to do addition in the backend), makes backend
tracking of ranges easy, and makes the range calculations in
load_store_vectorizer reasonable. However, this could definitely cause
some confusion for people used to the normal NIR base.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6359>
2020-08-14 13:10:02 -07:00
|
|
|
/* Make sure that the creator didn't forget to set the range_base+range. */
|
|
|
|
|
validate_assert(state, nir_intrinsic_range(instr) != 0);
|
2020-11-24 11:02:00 +01:00
|
|
|
FALLTHROUGH;
|
2020-03-30 23:00:34 -05:00
|
|
|
case nir_intrinsic_load_ssbo:
|
|
|
|
|
case nir_intrinsic_load_shared:
|
|
|
|
|
case nir_intrinsic_load_global:
|
2020-08-29 00:59:22 -05:00
|
|
|
case nir_intrinsic_load_global_constant:
|
2020-03-30 23:00:34 -05:00
|
|
|
case nir_intrinsic_load_scratch:
|
2020-04-08 15:08:03 -05:00
|
|
|
case nir_intrinsic_load_constant:
|
2020-03-30 23:00:34 -05:00
|
|
|
/* These memory load operations must have alignments */
|
|
|
|
|
validate_assert(state,
|
|
|
|
|
util_is_power_of_two_nonzero(nir_intrinsic_align_mul(instr)));
|
|
|
|
|
validate_assert(state, nir_intrinsic_align_offset(instr) <
|
|
|
|
|
nir_intrinsic_align_mul(instr));
|
2020-11-24 11:02:00 +01:00
|
|
|
FALLTHROUGH;
|
2020-03-30 23:00:34 -05:00
|
|
|
|
|
|
|
|
case nir_intrinsic_load_uniform:
|
2020-03-27 13:08:21 -05:00
|
|
|
case nir_intrinsic_load_input:
|
|
|
|
|
case nir_intrinsic_load_per_vertex_input:
|
|
|
|
|
case nir_intrinsic_load_interpolated_input:
|
|
|
|
|
case nir_intrinsic_load_output:
|
|
|
|
|
case nir_intrinsic_load_per_vertex_output:
|
2021-05-03 12:04:01 -07:00
|
|
|
case nir_intrinsic_load_per_primitive_output:
|
2020-03-27 13:08:21 -05:00
|
|
|
case nir_intrinsic_load_push_constant:
|
2020-03-30 23:00:34 -05:00
|
|
|
/* All memory load operations must load at least a byte */
|
2020-03-27 13:08:21 -05:00
|
|
|
validate_assert(state, nir_dest_bit_size(instr->dest) >= 8);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_intrinsic_store_ssbo:
|
|
|
|
|
case nir_intrinsic_store_shared:
|
|
|
|
|
case nir_intrinsic_store_global:
|
|
|
|
|
case nir_intrinsic_store_scratch:
|
2020-03-30 23:00:34 -05:00
|
|
|
/* These memory store operations must also have alignments */
|
|
|
|
|
validate_assert(state,
|
|
|
|
|
util_is_power_of_two_nonzero(nir_intrinsic_align_mul(instr)));
|
|
|
|
|
validate_assert(state, nir_intrinsic_align_offset(instr) <
|
|
|
|
|
nir_intrinsic_align_mul(instr));
|
2020-11-24 11:02:00 +01:00
|
|
|
FALLTHROUGH;
|
2020-03-30 23:00:34 -05:00
|
|
|
|
|
|
|
|
case nir_intrinsic_store_output:
|
|
|
|
|
case nir_intrinsic_store_per_vertex_output:
|
|
|
|
|
/* All memory store operations must store at least a byte */
|
2020-03-27 13:08:21 -05:00
|
|
|
validate_assert(state, nir_src_bit_size(instr->src[0]) >= 8);
|
|
|
|
|
break;
|
|
|
|
|
|
2020-08-14 23:41:14 -05:00
|
|
|
case nir_intrinsic_deref_mode_is:
|
2020-08-15 00:32:46 -05:00
|
|
|
case nir_intrinsic_addr_mode_is:
|
2020-08-14 23:41:14 -05:00
|
|
|
validate_assert(state,
|
|
|
|
|
util_bitcount(nir_intrinsic_memory_modes(instr)) == 1);
|
|
|
|
|
break;
|
|
|
|
|
|
2023-05-12 10:56:07 -04:00
|
|
|
case nir_intrinsic_image_deref_atomic:
|
|
|
|
|
case nir_intrinsic_image_deref_atomic_swap:
|
|
|
|
|
case nir_intrinsic_bindless_image_atomic:
|
|
|
|
|
case nir_intrinsic_bindless_image_atomic_swap:
|
|
|
|
|
case nir_intrinsic_image_atomic:
|
|
|
|
|
case nir_intrinsic_image_atomic_swap: {
|
|
|
|
|
nir_atomic_op op = nir_intrinsic_atomic_op(instr);
|
|
|
|
|
|
|
|
|
|
enum pipe_format format = image_intrin_format(instr);
|
|
|
|
|
if (format != PIPE_FORMAT_COUNT) {
|
|
|
|
|
bool allowed = false;
|
|
|
|
|
bool is_float = (nir_atomic_op_type(op) == nir_type_float);
|
|
|
|
|
|
|
|
|
|
switch (format) {
|
|
|
|
|
case PIPE_FORMAT_R32_FLOAT:
|
|
|
|
|
allowed = is_float || op == nir_atomic_op_xchg;
|
|
|
|
|
break;
|
|
|
|
|
case PIPE_FORMAT_R16_FLOAT:
|
|
|
|
|
case PIPE_FORMAT_R64_FLOAT:
|
|
|
|
|
allowed = op == nir_atomic_op_fmin || op == nir_atomic_op_fmax;
|
|
|
|
|
break;
|
|
|
|
|
case PIPE_FORMAT_R32_UINT:
|
|
|
|
|
case PIPE_FORMAT_R32_SINT:
|
|
|
|
|
case PIPE_FORMAT_R64_UINT:
|
|
|
|
|
case PIPE_FORMAT_R64_SINT:
|
|
|
|
|
allowed = !is_float;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
validate_assert(state, allowed);
|
|
|
|
|
validate_assert(state, nir_dest_bit_size(instr->dest) ==
|
|
|
|
|
util_format_get_blocksizebits(format));
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2022-12-07 04:29:59 -05:00
|
|
|
case nir_intrinsic_store_buffer_amd:
|
|
|
|
|
if (nir_intrinsic_access(instr) & ACCESS_USES_FORMAT_AMD) {
|
|
|
|
|
unsigned writemask = nir_intrinsic_write_mask(instr);
|
|
|
|
|
|
|
|
|
|
/* Make sure the writemask is derived from the component count. */
|
|
|
|
|
validate_assert(state,
|
|
|
|
|
writemask ==
|
|
|
|
|
BITFIELD_MASK(nir_src_num_components(instr->src[0])));
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
|
2014-12-03 14:47:17 -08:00
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
2018-04-02 19:23:36 -07:00
|
|
|
|
2019-11-15 12:44:58 +01:00
|
|
|
if (instr->num_components > 0)
|
|
|
|
|
validate_num_components(state, instr->num_components);
|
|
|
|
|
|
|
|
|
|
const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
|
|
|
|
|
unsigned num_srcs = info->num_srcs;
|
2018-04-02 19:23:36 -07:00
|
|
|
for (unsigned i = 0; i < num_srcs; i++) {
|
|
|
|
|
unsigned components_read = nir_intrinsic_src_components(instr, i);
|
|
|
|
|
|
2019-11-15 12:44:58 +01:00
|
|
|
validate_num_components(state, components_read);
|
2018-04-02 19:23:36 -07:00
|
|
|
|
|
|
|
|
validate_src(&instr->src[i], state, src_bit_sizes[i], components_read);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (nir_intrinsic_infos[instr->intrinsic].has_dest) {
|
|
|
|
|
unsigned components_written = nir_intrinsic_dest_components(instr);
|
2020-09-07 13:25:59 +01:00
|
|
|
unsigned bit_sizes = info->dest_bit_sizes;
|
|
|
|
|
if (!bit_sizes && info->bit_size_src >= 0)
|
|
|
|
|
bit_sizes = nir_src_bit_size(instr->src[info->bit_size_src]);
|
2018-04-02 19:23:36 -07:00
|
|
|
|
2019-11-15 12:44:58 +01:00
|
|
|
validate_num_components(state, components_written);
|
2018-07-19 13:04:43 +02:00
|
|
|
if (dest_bit_size && bit_sizes)
|
|
|
|
|
validate_assert(state, dest_bit_size & bit_sizes);
|
|
|
|
|
else
|
|
|
|
|
dest_bit_size = dest_bit_size ? dest_bit_size : bit_sizes;
|
|
|
|
|
|
2018-04-02 19:23:36 -07:00
|
|
|
validate_dest(&instr->dest, state, dest_bit_size, components_written);
|
|
|
|
|
}
|
2020-06-08 09:52:28 -07:00
|
|
|
|
|
|
|
|
if (!vectorized_intrinsic(instr))
|
|
|
|
|
validate_assert(state, instr->num_components == 0);
|
2021-12-19 15:32:08 -05:00
|
|
|
|
|
|
|
|
if (nir_intrinsic_has_write_mask(instr)) {
|
|
|
|
|
unsigned component_mask = BITFIELD_MASK(instr->num_components);
|
|
|
|
|
validate_assert(state, (nir_intrinsic_write_mask(instr) & ~component_mask) == 0);
|
|
|
|
|
}
|
2021-12-19 14:20:52 -05:00
|
|
|
|
|
|
|
|
if (nir_intrinsic_has_io_xfb(instr)) {
|
|
|
|
|
unsigned used_mask = 0;
|
|
|
|
|
|
|
|
|
|
for (unsigned i = 0; i < 4; i++) {
|
|
|
|
|
nir_io_xfb xfb = i < 2 ? nir_intrinsic_io_xfb(instr) :
|
|
|
|
|
nir_intrinsic_io_xfb2(instr);
|
|
|
|
|
unsigned xfb_mask = BITFIELD_RANGE(i, xfb.out[i % 2].num_components);
|
|
|
|
|
|
|
|
|
|
/* Each component can be used only once by transform feedback info. */
|
|
|
|
|
validate_assert(state, (xfb_mask & used_mask) == 0);
|
|
|
|
|
used_mask |= xfb_mask;
|
|
|
|
|
}
|
|
|
|
|
}
|
2022-01-02 19:46:45 -05:00
|
|
|
|
|
|
|
|
if (nir_intrinsic_has_io_semantics(instr) &&
|
|
|
|
|
!nir_intrinsic_infos[instr->intrinsic].has_dest) {
|
|
|
|
|
nir_io_semantics sem = nir_intrinsic_io_semantics(instr);
|
|
|
|
|
|
|
|
|
|
/* An output that has no effect shouldn't be present in the IR. */
|
|
|
|
|
validate_assert(state,
|
2023-03-12 03:16:18 -04:00
|
|
|
(nir_slot_is_sysval_output(sem.location, MESA_SHADER_NONE) &&
|
2022-01-02 19:46:45 -05:00
|
|
|
!sem.no_sysval_output) ||
|
|
|
|
|
(nir_slot_is_varying(sem.location) && !sem.no_varying) ||
|
|
|
|
|
nir_instr_xfb_write_mask(instr));
|
|
|
|
|
}
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_tex_instr(nir_tex_instr *instr, validate_state *state)
|
|
|
|
|
{
|
2015-01-09 20:01:13 -08:00
|
|
|
bool src_type_seen[nir_num_tex_src_types];
|
|
|
|
|
for (unsigned i = 0; i < nir_num_tex_src_types; i++)
|
2014-07-30 15:20:53 -07:00
|
|
|
src_type_seen[i] = false;
|
|
|
|
|
|
|
|
|
|
for (unsigned i = 0; i < instr->num_srcs; i++) {
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, !src_type_seen[instr->src[i].src_type]);
|
2015-01-09 20:01:13 -08:00
|
|
|
src_type_seen[instr->src[i].src_type] = true;
|
2017-03-02 16:25:59 -08:00
|
|
|
validate_src(&instr->src[i].src, state,
|
|
|
|
|
0, nir_tex_instr_src_size(instr, i));
|
2019-03-24 05:36:36 +01:00
|
|
|
|
|
|
|
|
switch (instr->src[i].src_type) {
|
2021-07-09 08:09:46 -05:00
|
|
|
|
|
|
|
|
case nir_tex_src_comparator:
|
|
|
|
|
validate_assert(state, instr->is_shadow);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_tex_src_bias:
|
|
|
|
|
validate_assert(state, instr->op == nir_texop_txb ||
|
|
|
|
|
instr->op == nir_texop_tg4);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_tex_src_lod:
|
|
|
|
|
validate_assert(state, instr->op != nir_texop_tex &&
|
|
|
|
|
instr->op != nir_texop_txb &&
|
|
|
|
|
instr->op != nir_texop_txd &&
|
|
|
|
|
instr->op != nir_texop_lod);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_tex_src_ddx:
|
|
|
|
|
case nir_tex_src_ddy:
|
|
|
|
|
validate_assert(state, instr->op == nir_texop_txd);
|
2019-03-24 05:36:36 +01:00
|
|
|
break;
|
2021-07-09 08:09:46 -05:00
|
|
|
|
|
|
|
|
case nir_tex_src_texture_deref: {
|
|
|
|
|
nir_deref_instr *deref = nir_src_as_deref(instr->src[i].src);
|
|
|
|
|
if (!validate_assert(state, deref))
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
validate_assert(state, glsl_type_is_image(deref->type) ||
|
2021-10-15 14:15:32 -05:00
|
|
|
glsl_type_is_texture(deref->type) ||
|
2021-07-09 08:09:46 -05:00
|
|
|
glsl_type_is_sampler(deref->type));
|
2022-08-03 10:58:03 -04:00
|
|
|
switch (instr->op) {
|
|
|
|
|
case nir_texop_descriptor_amd:
|
2022-10-28 08:32:02 -04:00
|
|
|
case nir_texop_sampler_descriptor_amd:
|
2022-08-03 10:58:03 -04:00
|
|
|
break;
|
|
|
|
|
case nir_texop_lod:
|
2023-02-12 20:19:41 -05:00
|
|
|
case nir_texop_lod_bias_agx:
|
2022-08-03 10:58:03 -04:00
|
|
|
validate_assert(state, nir_alu_type_get_base_type(instr->dest_type) == nir_type_float);
|
|
|
|
|
break;
|
|
|
|
|
case nir_texop_samples_identical:
|
|
|
|
|
validate_assert(state, nir_alu_type_get_base_type(instr->dest_type) == nir_type_bool);
|
|
|
|
|
break;
|
|
|
|
|
case nir_texop_txs:
|
|
|
|
|
case nir_texop_texture_samples:
|
|
|
|
|
case nir_texop_query_levels:
|
|
|
|
|
case nir_texop_fragment_mask_fetch_amd:
|
|
|
|
|
case nir_texop_txf_ms_mcs_intel:
|
|
|
|
|
validate_assert(state, nir_alu_type_get_base_type(instr->dest_type) == nir_type_int ||
|
|
|
|
|
nir_alu_type_get_base_type(instr->dest_type) == nir_type_uint);
|
|
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
validate_assert(state,
|
|
|
|
|
glsl_get_sampler_result_type(deref->type) == GLSL_TYPE_VOID ||
|
|
|
|
|
glsl_base_type_is_integer(glsl_get_sampler_result_type(deref->type)) ==
|
|
|
|
|
(nir_alu_type_get_base_type(instr->dest_type) == nir_type_int ||
|
|
|
|
|
nir_alu_type_get_base_type(instr->dest_type) == nir_type_uint));
|
|
|
|
|
}
|
2021-07-09 08:09:46 -05:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case nir_tex_src_sampler_deref: {
|
|
|
|
|
nir_deref_instr *deref = nir_src_as_deref(instr->src[i].src);
|
|
|
|
|
if (!validate_assert(state, deref))
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
validate_assert(state, glsl_type_is_sampler(deref->type));
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2021-11-12 18:57:53 -05:00
|
|
|
case nir_tex_src_coord:
|
|
|
|
|
case nir_tex_src_projector:
|
|
|
|
|
case nir_tex_src_offset:
|
|
|
|
|
case nir_tex_src_min_lod:
|
|
|
|
|
case nir_tex_src_ms_index:
|
2021-07-09 08:09:46 -05:00
|
|
|
case nir_tex_src_texture_offset:
|
|
|
|
|
case nir_tex_src_sampler_offset:
|
|
|
|
|
case nir_tex_src_plane:
|
|
|
|
|
case nir_tex_src_texture_handle:
|
|
|
|
|
case nir_tex_src_sampler_handle:
|
|
|
|
|
break;
|
|
|
|
|
|
2019-03-24 05:36:36 +01:00
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
2023-06-27 14:01:58 -04:00
|
|
|
bool msaa = (instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
|
|
|
|
|
instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
|
|
|
|
|
|
|
|
|
|
if (msaa)
|
|
|
|
|
validate_assert(state, instr->op != nir_texop_txf);
|
|
|
|
|
else
|
|
|
|
|
validate_assert(state, instr->op != nir_texop_txf_ms);
|
|
|
|
|
|
2021-07-09 08:09:46 -05:00
|
|
|
if (instr->op != nir_texop_tg4)
|
|
|
|
|
validate_assert(state, instr->component == 0);
|
|
|
|
|
|
2019-03-18 21:23:59 +01:00
|
|
|
if (nir_tex_instr_has_explicit_tg4_offsets(instr)) {
|
|
|
|
|
validate_assert(state, instr->op == nir_texop_tg4);
|
|
|
|
|
validate_assert(state, !src_type_seen[nir_tex_src_offset]);
|
|
|
|
|
}
|
|
|
|
|
|
2023-04-13 14:13:35 +01:00
|
|
|
if (instr->is_gather_implicit_lod)
|
|
|
|
|
validate_assert(state, instr->op == nir_texop_tg4);
|
|
|
|
|
|
2017-03-02 16:25:59 -08:00
|
|
|
validate_dest(&instr->dest, state, 0, nir_tex_instr_dest_size(instr));
|
2020-12-08 15:44:07 +01:00
|
|
|
|
2022-08-09 17:58:01 -04:00
|
|
|
unsigned bit_size = nir_alu_type_get_type_size(instr->dest_type);
|
2020-12-08 15:44:07 +01:00
|
|
|
validate_assert(state,
|
2022-08-09 17:58:01 -04:00
|
|
|
(bit_size ? bit_size : 32) ==
|
2020-12-08 15:44:07 +01:00
|
|
|
nir_dest_bit_size(instr->dest));
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_call_instr(nir_call_instr *instr, validate_state *state)
|
|
|
|
|
{
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, instr->num_params == instr->callee->num_params);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
|
|
|
|
for (unsigned i = 0; i < instr->num_params; i++) {
|
2018-03-22 16:41:18 -07:00
|
|
|
validate_src(&instr->params[i], state,
|
|
|
|
|
instr->callee->params[i].bit_size,
|
|
|
|
|
instr->callee->params[i].num_components);
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2019-04-01 21:42:37 -05:00
|
|
|
static void
|
|
|
|
|
validate_const_value(nir_const_value *val, unsigned bit_size,
|
2023-05-18 10:31:50 -07:00
|
|
|
bool is_null_constant, validate_state *state)
|
2019-04-01 21:42:37 -05:00
|
|
|
{
|
|
|
|
|
/* In order for block copies to work properly for things like instruction
|
|
|
|
|
* comparisons and [de]serialization, we require the unused bits of the
|
|
|
|
|
* nir_const_value to be zero.
|
|
|
|
|
*/
|
|
|
|
|
nir_const_value cmp_val;
|
|
|
|
|
memset(&cmp_val, 0, sizeof(cmp_val));
|
2023-05-18 10:31:50 -07:00
|
|
|
if (!is_null_constant) {
|
|
|
|
|
switch (bit_size) {
|
|
|
|
|
case 1:
|
|
|
|
|
cmp_val.b = val->b;
|
|
|
|
|
break;
|
|
|
|
|
case 8:
|
|
|
|
|
cmp_val.u8 = val->u8;
|
|
|
|
|
break;
|
|
|
|
|
case 16:
|
|
|
|
|
cmp_val.u16 = val->u16;
|
|
|
|
|
break;
|
|
|
|
|
case 32:
|
|
|
|
|
cmp_val.u32 = val->u32;
|
|
|
|
|
break;
|
|
|
|
|
case 64:
|
|
|
|
|
cmp_val.u64 = val->u64;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
validate_assert(state, !"Invalid load_const bit size");
|
|
|
|
|
}
|
2019-04-01 21:42:37 -05:00
|
|
|
}
|
|
|
|
|
validate_assert(state, memcmp(val, &cmp_val, sizeof(cmp_val)) == 0);
|
|
|
|
|
}
|
|
|
|
|
|
2014-07-30 15:20:53 -07:00
|
|
|
static void
|
|
|
|
|
validate_load_const_instr(nir_load_const_instr *instr, validate_state *state)
|
|
|
|
|
{
|
2014-12-15 17:32:56 -08:00
|
|
|
validate_ssa_def(&instr->def, state);
|
2019-04-01 21:42:37 -05:00
|
|
|
|
|
|
|
|
for (unsigned i = 0; i < instr->def.num_components; i++)
|
2023-05-18 10:31:50 -07:00
|
|
|
validate_const_value(&instr->value[i], instr->def.bit_size, false, state);
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_ssa_undef_instr(nir_ssa_undef_instr *instr, validate_state *state)
|
|
|
|
|
{
|
|
|
|
|
validate_ssa_def(&instr->def, state);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_phi_instr(nir_phi_instr *instr, validate_state *state)
|
|
|
|
|
{
|
|
|
|
|
/*
|
|
|
|
|
* don't validate the sources until we get to them from their predecessor
|
|
|
|
|
* basic blocks, to avoid validating an SSA use before its definition.
|
|
|
|
|
*/
|
|
|
|
|
|
2017-03-02 16:25:59 -08:00
|
|
|
validate_dest(&instr->dest, state, 0, 0);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
2014-11-05 13:58:42 -08:00
|
|
|
exec_list_validate(&instr->srcs);
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, exec_list_length(&instr->srcs) ==
|
2014-07-30 15:20:53 -07:00
|
|
|
state->block->predecessors->entries);
|
|
|
|
|
}
|
|
|
|
|
|
2020-05-15 14:57:40 -05:00
|
|
|
static void
|
|
|
|
|
validate_jump_instr(nir_jump_instr *instr, validate_state *state)
|
|
|
|
|
{
|
|
|
|
|
nir_block *block = state->block;
|
|
|
|
|
validate_assert(state, &instr->instr == nir_block_last_instr(block));
|
|
|
|
|
|
|
|
|
|
switch (instr->type) {
|
|
|
|
|
case nir_jump_return:
|
2020-05-15 15:46:08 -05:00
|
|
|
case nir_jump_halt:
|
2020-05-15 14:57:40 -05:00
|
|
|
validate_assert(state, block->successors[0] == state->impl->end_block);
|
|
|
|
|
validate_assert(state, block->successors[1] == NULL);
|
2020-07-02 14:32:04 +02:00
|
|
|
validate_assert(state, instr->target == NULL);
|
|
|
|
|
validate_assert(state, instr->else_target == NULL);
|
2021-12-01 17:34:48 +01:00
|
|
|
validate_assert(state, !state->in_loop_continue_construct);
|
2020-05-15 14:57:40 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_jump_break:
|
2019-10-23 20:42:40 +02:00
|
|
|
validate_assert(state, state->impl->structured);
|
2020-05-15 14:57:40 -05:00
|
|
|
validate_assert(state, state->loop != NULL);
|
|
|
|
|
if (state->loop) {
|
|
|
|
|
nir_block *after =
|
|
|
|
|
nir_cf_node_as_block(nir_cf_node_next(&state->loop->cf_node));
|
|
|
|
|
validate_assert(state, block->successors[0] == after);
|
|
|
|
|
}
|
|
|
|
|
validate_assert(state, block->successors[1] == NULL);
|
2020-07-02 14:32:04 +02:00
|
|
|
validate_assert(state, instr->target == NULL);
|
|
|
|
|
validate_assert(state, instr->else_target == NULL);
|
2020-05-15 14:57:40 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_jump_continue:
|
2019-10-23 20:42:40 +02:00
|
|
|
validate_assert(state, state->impl->structured);
|
2020-05-15 14:57:40 -05:00
|
|
|
validate_assert(state, state->loop != NULL);
|
|
|
|
|
if (state->loop) {
|
2021-12-01 17:34:48 +01:00
|
|
|
nir_block *cont_block = nir_loop_continue_target(state->loop);
|
|
|
|
|
validate_assert(state, block->successors[0] == cont_block);
|
2020-05-15 14:57:40 -05:00
|
|
|
}
|
|
|
|
|
validate_assert(state, block->successors[1] == NULL);
|
2020-07-02 14:32:04 +02:00
|
|
|
validate_assert(state, instr->target == NULL);
|
|
|
|
|
validate_assert(state, instr->else_target == NULL);
|
2021-12-01 17:34:48 +01:00
|
|
|
validate_assert(state, !state->in_loop_continue_construct);
|
2020-07-02 14:32:04 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_jump_goto:
|
|
|
|
|
validate_assert(state, !state->impl->structured);
|
|
|
|
|
validate_assert(state, instr->target == block->successors[0]);
|
|
|
|
|
validate_assert(state, instr->target != NULL);
|
|
|
|
|
validate_assert(state, instr->else_target == NULL);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_jump_goto_if:
|
|
|
|
|
validate_assert(state, !state->impl->structured);
|
|
|
|
|
validate_assert(state, instr->target == block->successors[1]);
|
|
|
|
|
validate_assert(state, instr->else_target == block->successors[0]);
|
|
|
|
|
validate_src(&instr->condition, state, 0, 1);
|
|
|
|
|
validate_assert(state, instr->target != NULL);
|
|
|
|
|
validate_assert(state, instr->else_target != NULL);
|
2020-05-15 14:57:40 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
validate_assert(state, !"Invalid jump instruction type");
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2014-07-30 15:20:53 -07:00
|
|
|
static void
|
|
|
|
|
validate_instr(nir_instr *instr, validate_state *state)
|
|
|
|
|
{
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, instr->block == state->block);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
|
|
|
|
state->instr = instr;
|
|
|
|
|
|
|
|
|
|
switch (instr->type) {
|
|
|
|
|
case nir_instr_type_alu:
|
|
|
|
|
validate_alu_instr(nir_instr_as_alu(instr), state);
|
|
|
|
|
break;
|
|
|
|
|
|
2018-03-14 21:45:38 -07:00
|
|
|
case nir_instr_type_deref:
|
|
|
|
|
validate_deref_instr(nir_instr_as_deref(instr), state);
|
|
|
|
|
break;
|
|
|
|
|
|
2014-07-30 15:20:53 -07:00
|
|
|
case nir_instr_type_call:
|
|
|
|
|
validate_call_instr(nir_instr_as_call(instr), state);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_instr_type_intrinsic:
|
|
|
|
|
validate_intrinsic_instr(nir_instr_as_intrinsic(instr), state);
|
|
|
|
|
break;
|
|
|
|
|
|
2014-12-05 11:03:06 -08:00
|
|
|
case nir_instr_type_tex:
|
|
|
|
|
validate_tex_instr(nir_instr_as_tex(instr), state);
|
2014-07-30 15:20:53 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_instr_type_load_const:
|
|
|
|
|
validate_load_const_instr(nir_instr_as_load_const(instr), state);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_instr_type_phi:
|
|
|
|
|
validate_phi_instr(nir_instr_as_phi(instr), state);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_instr_type_ssa_undef:
|
|
|
|
|
validate_ssa_undef_instr(nir_instr_as_ssa_undef(instr), state);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_instr_type_jump:
|
2020-05-15 14:57:40 -05:00
|
|
|
validate_jump_instr(nir_instr_as_jump(instr), state);
|
2014-07-30 15:20:53 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, !"Invalid ALU instruction type");
|
2014-07-30 15:20:53 -07:00
|
|
|
break;
|
|
|
|
|
}
|
2015-02-04 13:58:12 -08:00
|
|
|
|
|
|
|
|
state->instr = NULL;
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_phi_src(nir_phi_instr *instr, nir_block *pred, validate_state *state)
|
|
|
|
|
{
|
|
|
|
|
state->instr = &instr->instr;
|
|
|
|
|
|
2014-11-24 21:26:41 -08:00
|
|
|
|
2014-11-05 13:58:42 -08:00
|
|
|
exec_list_validate(&instr->srcs);
|
2016-04-26 20:16:21 -07:00
|
|
|
nir_foreach_phi_src(src, instr) {
|
2014-07-30 15:20:53 -07:00
|
|
|
if (src->pred == pred) {
|
2017-03-02 16:25:59 -08:00
|
|
|
validate_src(&src->src, state, instr->dest.ssa.bit_size,
|
|
|
|
|
instr->dest.ssa.num_components);
|
2015-02-04 13:58:12 -08:00
|
|
|
state->instr = NULL;
|
2014-07-30 15:20:53 -07:00
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
}
|
2020-07-08 11:56:32 -05:00
|
|
|
validate_assert(state, !"Phi does not have a source corresponding to one "
|
|
|
|
|
"of its predecessor blocks");
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_phi_srcs(nir_block *block, nir_block *succ, validate_state *state)
|
|
|
|
|
{
|
2023-05-11 13:20:43 -04:00
|
|
|
nir_foreach_phi(phi, succ) {
|
|
|
|
|
validate_phi_src(phi, block, state);
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2020-09-15 11:28:43 -05:00
|
|
|
static void
|
|
|
|
|
collect_blocks(struct exec_list *cf_list, validate_state *state)
|
|
|
|
|
{
|
2020-11-02 14:28:01 -06:00
|
|
|
/* We walk the blocks manually here rather than using nir_foreach_block for
|
|
|
|
|
* a few reasons:
|
|
|
|
|
*
|
|
|
|
|
* 1. nir_foreach_block() doesn't work properly for unstructured NIR and
|
|
|
|
|
* we need to be able to handle all forms of NIR here.
|
|
|
|
|
*
|
|
|
|
|
* 2. We want to call exec_list_validate() on every linked list in the IR
|
|
|
|
|
* which means we need to touch every linked and just walking blocks
|
|
|
|
|
* with nir_foreach_block() would make that difficult. In particular,
|
|
|
|
|
* we want to validate each list before the first time we walk it so
|
|
|
|
|
* that we catch broken lists in exec_list_validate() instead of
|
|
|
|
|
* getting stuck in a hard-to-debug infinite loop in the validator.
|
|
|
|
|
*
|
|
|
|
|
* 3. nir_foreach_block() depends on several invariants of the CF node
|
|
|
|
|
* hierarchy which nir_validate_shader() is responsible for verifying.
|
|
|
|
|
* If we used nir_foreach_block() in nir_validate_shader(), we could
|
|
|
|
|
* end up blowing up on a bad list walk instead of throwing the much
|
|
|
|
|
* easier to debug validation error.
|
|
|
|
|
*/
|
2020-09-15 11:28:43 -05:00
|
|
|
exec_list_validate(cf_list);
|
|
|
|
|
foreach_list_typed(nir_cf_node, node, node, cf_list) {
|
|
|
|
|
switch (node->type) {
|
|
|
|
|
case nir_cf_node_block:
|
|
|
|
|
_mesa_set_add(state->blocks, nir_cf_node_as_block(node));
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_cf_node_if:
|
|
|
|
|
collect_blocks(&nir_cf_node_as_if(node)->then_list, state);
|
|
|
|
|
collect_blocks(&nir_cf_node_as_if(node)->else_list, state);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_cf_node_loop:
|
|
|
|
|
collect_blocks(&nir_cf_node_as_loop(node)->body, state);
|
2021-12-01 17:34:48 +01:00
|
|
|
collect_blocks(&nir_cf_node_as_loop(node)->continue_list, state);
|
2020-09-15 11:28:43 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
unreachable("Invalid CF node type");
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2014-07-30 15:20:53 -07:00
|
|
|
static void validate_cf_node(nir_cf_node *node, validate_state *state);
|
|
|
|
|
|
2020-09-15 11:28:43 -05:00
|
|
|
static void
|
|
|
|
|
validate_block_predecessors(nir_block *block, validate_state *state)
|
|
|
|
|
{
|
|
|
|
|
for (unsigned i = 0; i < 2; i++) {
|
|
|
|
|
if (block->successors[i] == NULL)
|
|
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
/* The block has to exist in the nir_function_impl */
|
|
|
|
|
validate_assert(state, _mesa_set_search(state->blocks,
|
|
|
|
|
block->successors[i]));
|
|
|
|
|
|
|
|
|
|
/* And we have to be in our successor's predecessors set */
|
|
|
|
|
validate_assert(state,
|
|
|
|
|
_mesa_set_search(block->successors[i]->predecessors, block));
|
|
|
|
|
|
|
|
|
|
validate_phi_srcs(block, block->successors[i], state);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The start block cannot have any predecessors */
|
|
|
|
|
if (block == nir_start_block(state->impl))
|
|
|
|
|
validate_assert(state, block->predecessors->entries == 0);
|
|
|
|
|
|
|
|
|
|
set_foreach(block->predecessors, entry) {
|
|
|
|
|
const nir_block *pred = entry->key;
|
|
|
|
|
validate_assert(state, _mesa_set_search(state->blocks, pred));
|
|
|
|
|
validate_assert(state, pred->successors[0] == block ||
|
|
|
|
|
pred->successors[1] == block);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2014-07-30 15:20:53 -07:00
|
|
|
static void
|
|
|
|
|
validate_block(nir_block *block, validate_state *state)
|
|
|
|
|
{
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, block->cf_node.parent == state->parent_node);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
|
|
|
|
state->block = block;
|
|
|
|
|
|
2014-11-05 13:58:42 -08:00
|
|
|
exec_list_validate(&block->instr_list);
|
2016-04-26 18:34:19 -07:00
|
|
|
nir_foreach_instr(instr, block) {
|
2014-07-30 15:20:53 -07:00
|
|
|
if (instr->type == nir_instr_type_phi) {
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, instr == nir_block_first_instr(block) ||
|
2014-07-30 15:20:53 -07:00
|
|
|
nir_instr_prev(instr)->type == nir_instr_type_phi);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
validate_instr(instr, state);
|
|
|
|
|
}
|
|
|
|
|
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, block->successors[0] != NULL);
|
|
|
|
|
validate_assert(state, block->successors[0] != block->successors[1]);
|
2020-09-15 11:28:43 -05:00
|
|
|
validate_block_predecessors(block, state);
|
2015-07-21 19:54:15 -07:00
|
|
|
|
2019-10-23 20:42:40 +02:00
|
|
|
if (!state->impl->structured) {
|
|
|
|
|
validate_assert(state, nir_block_ends_in_jump(block));
|
|
|
|
|
} else if (!nir_block_ends_in_jump(block)) {
|
2015-07-21 19:54:15 -07:00
|
|
|
nir_cf_node *next = nir_cf_node_next(&block->cf_node);
|
|
|
|
|
if (next == NULL) {
|
|
|
|
|
switch (state->parent_node->type) {
|
|
|
|
|
case nir_cf_node_loop: {
|
2021-12-01 17:34:48 +01:00
|
|
|
if (block == nir_loop_last_block(state->loop)) {
|
|
|
|
|
nir_block *cont = nir_loop_continue_target(state->loop);
|
|
|
|
|
validate_assert(state, block->successors[0] == cont);
|
|
|
|
|
} else {
|
|
|
|
|
validate_assert(state, nir_loop_has_continue_construct(state->loop) &&
|
|
|
|
|
block == nir_loop_last_continue_block(state->loop));
|
|
|
|
|
nir_block *head = nir_loop_first_block(state->loop);
|
|
|
|
|
validate_assert(state, block->successors[0] == head);
|
|
|
|
|
}
|
2015-07-21 19:54:15 -07:00
|
|
|
/* due to the hack for infinite loops, block->successors[1] may
|
|
|
|
|
* point to the block after the loop.
|
|
|
|
|
*/
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case nir_cf_node_if: {
|
|
|
|
|
nir_block *after =
|
|
|
|
|
nir_cf_node_as_block(nir_cf_node_next(state->parent_node));
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, block->successors[0] == after);
|
|
|
|
|
validate_assert(state, block->successors[1] == NULL);
|
2015-07-21 19:54:15 -07:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case nir_cf_node_function:
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, block->successors[0] == state->impl->end_block);
|
|
|
|
|
validate_assert(state, block->successors[1] == NULL);
|
2015-07-21 19:54:15 -07:00
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
unreachable("unknown control flow node type");
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
if (next->type == nir_cf_node_if) {
|
|
|
|
|
nir_if *if_stmt = nir_cf_node_as_if(next);
|
2016-10-05 19:08:57 -07:00
|
|
|
validate_assert(state, block->successors[0] ==
|
|
|
|
|
nir_if_first_then_block(if_stmt));
|
|
|
|
|
validate_assert(state, block->successors[1] ==
|
|
|
|
|
nir_if_first_else_block(if_stmt));
|
2019-10-23 20:42:40 +02:00
|
|
|
} else if (next->type == nir_cf_node_loop) {
|
2015-07-21 19:54:15 -07:00
|
|
|
nir_loop *loop = nir_cf_node_as_loop(next);
|
2016-10-05 19:08:57 -07:00
|
|
|
validate_assert(state, block->successors[0] ==
|
|
|
|
|
nir_loop_first_block(loop));
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, block->successors[1] == NULL);
|
2019-10-23 20:42:40 +02:00
|
|
|
} else {
|
|
|
|
|
validate_assert(state,
|
|
|
|
|
!"Structured NIR cannot have consecutive blocks");
|
2015-07-21 19:54:15 -07:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
2020-09-15 11:28:43 -05:00
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_end_block(nir_block *block, validate_state *state)
|
|
|
|
|
{
|
|
|
|
|
validate_assert(state, block->cf_node.parent == &state->impl->cf_node);
|
|
|
|
|
|
|
|
|
|
exec_list_validate(&block->instr_list);
|
|
|
|
|
validate_assert(state, exec_list_is_empty(&block->instr_list));
|
|
|
|
|
|
|
|
|
|
validate_assert(state, block->successors[0] == NULL);
|
|
|
|
|
validate_assert(state, block->successors[1] == NULL);
|
|
|
|
|
validate_block_predecessors(block, state);
|
|
|
|
|
}
|
|
|
|
|
|
2014-07-30 15:20:53 -07:00
|
|
|
static void
|
|
|
|
|
validate_if(nir_if *if_stmt, validate_state *state)
|
|
|
|
|
{
|
2019-10-23 20:42:40 +02:00
|
|
|
validate_assert(state, state->impl->structured);
|
|
|
|
|
|
2015-02-04 13:58:12 -08:00
|
|
|
state->if_stmt = if_stmt;
|
|
|
|
|
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, !exec_node_is_head_sentinel(if_stmt->cf_node.node.prev));
|
2014-07-30 15:20:53 -07:00
|
|
|
nir_cf_node *prev_node = nir_cf_node_prev(&if_stmt->cf_node);
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, prev_node->type == nir_cf_node_block);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, !exec_node_is_tail_sentinel(if_stmt->cf_node.node.next));
|
2014-07-30 15:20:53 -07:00
|
|
|
nir_cf_node *next_node = nir_cf_node_next(&if_stmt->cf_node);
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, next_node->type == nir_cf_node_block);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
2023-04-06 13:19:31 -04:00
|
|
|
validate_assert(state, if_stmt->condition.is_if);
|
2018-10-18 11:59:40 -05:00
|
|
|
validate_src(&if_stmt->condition, state, 0, 1);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, !exec_list_is_empty(&if_stmt->then_list));
|
|
|
|
|
validate_assert(state, !exec_list_is_empty(&if_stmt->else_list));
|
2014-07-30 15:20:53 -07:00
|
|
|
|
|
|
|
|
nir_cf_node *old_parent = state->parent_node;
|
|
|
|
|
state->parent_node = &if_stmt->cf_node;
|
|
|
|
|
|
|
|
|
|
foreach_list_typed(nir_cf_node, cf_node, node, &if_stmt->then_list) {
|
|
|
|
|
validate_cf_node(cf_node, state);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
foreach_list_typed(nir_cf_node, cf_node, node, &if_stmt->else_list) {
|
|
|
|
|
validate_cf_node(cf_node, state);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
state->parent_node = old_parent;
|
2015-02-04 13:58:12 -08:00
|
|
|
state->if_stmt = NULL;
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_loop(nir_loop *loop, validate_state *state)
|
|
|
|
|
{
|
2019-10-23 20:42:40 +02:00
|
|
|
validate_assert(state, state->impl->structured);
|
|
|
|
|
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, !exec_node_is_head_sentinel(loop->cf_node.node.prev));
|
2014-07-30 15:20:53 -07:00
|
|
|
nir_cf_node *prev_node = nir_cf_node_prev(&loop->cf_node);
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, prev_node->type == nir_cf_node_block);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, !exec_node_is_tail_sentinel(loop->cf_node.node.next));
|
2014-07-30 15:20:53 -07:00
|
|
|
nir_cf_node *next_node = nir_cf_node_next(&loop->cf_node);
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, next_node->type == nir_cf_node_block);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, !exec_list_is_empty(&loop->body));
|
2014-07-30 15:20:53 -07:00
|
|
|
|
|
|
|
|
nir_cf_node *old_parent = state->parent_node;
|
|
|
|
|
state->parent_node = &loop->cf_node;
|
2015-07-21 19:54:15 -07:00
|
|
|
nir_loop *old_loop = state->loop;
|
2021-12-01 17:34:48 +01:00
|
|
|
bool old_continue_construct = state->in_loop_continue_construct;
|
2015-07-21 19:54:15 -07:00
|
|
|
state->loop = loop;
|
2021-12-01 17:34:48 +01:00
|
|
|
state->in_loop_continue_construct = false;
|
2014-07-30 15:20:53 -07:00
|
|
|
|
|
|
|
|
foreach_list_typed(nir_cf_node, cf_node, node, &loop->body) {
|
|
|
|
|
validate_cf_node(cf_node, state);
|
|
|
|
|
}
|
2021-12-01 17:34:48 +01:00
|
|
|
state->in_loop_continue_construct = true;
|
|
|
|
|
foreach_list_typed(nir_cf_node, cf_node, node, &loop->continue_list) {
|
|
|
|
|
validate_cf_node(cf_node, state);
|
|
|
|
|
}
|
|
|
|
|
state->in_loop_continue_construct = false;
|
2014-07-30 15:20:53 -07:00
|
|
|
state->parent_node = old_parent;
|
2015-07-21 19:54:15 -07:00
|
|
|
state->loop = old_loop;
|
2021-12-01 17:34:48 +01:00
|
|
|
state->in_loop_continue_construct = old_continue_construct;
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_cf_node(nir_cf_node *node, validate_state *state)
|
|
|
|
|
{
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, node->parent == state->parent_node);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
|
|
|
|
switch (node->type) {
|
|
|
|
|
case nir_cf_node_block:
|
|
|
|
|
validate_block(nir_cf_node_as_block(node), state);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_cf_node_if:
|
|
|
|
|
validate_if(nir_cf_node_as_if(node), state);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case nir_cf_node_loop:
|
|
|
|
|
validate_loop(nir_cf_node_as_loop(node), state);
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
2015-03-27 18:22:20 -07:00
|
|
|
unreachable("Invalid CF node type");
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2020-10-02 02:14:36 -05:00
|
|
|
static void
|
|
|
|
|
validate_constant(nir_constant *c, const struct glsl_type *type,
|
|
|
|
|
validate_state *state)
|
|
|
|
|
{
|
|
|
|
|
if (glsl_type_is_vector_or_scalar(type)) {
|
|
|
|
|
unsigned num_components = glsl_get_vector_elements(type);
|
|
|
|
|
unsigned bit_size = glsl_get_bit_size(type);
|
|
|
|
|
for (unsigned i = 0; i < num_components; i++)
|
2023-05-18 10:31:50 -07:00
|
|
|
validate_const_value(&c->values[i], bit_size, c->is_null_constant, state);
|
2020-10-02 02:14:36 -05:00
|
|
|
for (unsigned i = num_components; i < NIR_MAX_VEC_COMPONENTS; i++)
|
|
|
|
|
validate_assert(state, c->values[i].u64 == 0);
|
|
|
|
|
} else {
|
|
|
|
|
validate_assert(state, c->num_elements == glsl_get_length(type));
|
|
|
|
|
if (glsl_type_is_struct_or_ifc(type)) {
|
|
|
|
|
for (unsigned i = 0; i < c->num_elements; i++) {
|
|
|
|
|
const struct glsl_type *elem_type = glsl_get_struct_field(type, i);
|
|
|
|
|
validate_constant(c->elements[i], elem_type, state);
|
2023-05-18 10:31:50 -07:00
|
|
|
validate_assert(state, !c->is_null_constant || c->elements[i]->is_null_constant);
|
2020-10-02 02:14:36 -05:00
|
|
|
}
|
|
|
|
|
} else if (glsl_type_is_array_or_matrix(type)) {
|
|
|
|
|
const struct glsl_type *elem_type = glsl_get_array_element(type);
|
2023-05-18 10:31:50 -07:00
|
|
|
for (unsigned i = 0; i < c->num_elements; i++) {
|
2020-10-02 02:14:36 -05:00
|
|
|
validate_constant(c->elements[i], elem_type, state);
|
2023-05-18 10:31:50 -07:00
|
|
|
validate_assert(state, !c->is_null_constant || c->elements[i]->is_null_constant);
|
|
|
|
|
}
|
2020-10-02 02:14:36 -05:00
|
|
|
} else {
|
|
|
|
|
validate_assert(state, !"Invalid type for nir_constant");
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2014-07-30 15:20:53 -07:00
|
|
|
static void
|
2019-11-14 12:12:50 -06:00
|
|
|
validate_var_decl(nir_variable *var, nir_variable_mode valid_modes,
|
|
|
|
|
validate_state *state)
|
2014-07-30 15:20:53 -07:00
|
|
|
{
|
2016-05-14 15:40:54 -04:00
|
|
|
state->var = var;
|
|
|
|
|
|
2016-04-11 13:32:59 -07:00
|
|
|
/* Must have exactly one mode set */
|
2017-11-13 13:00:53 -08:00
|
|
|
validate_assert(state, util_is_power_of_two_nonzero(var->data.mode));
|
2019-11-14 12:12:50 -06:00
|
|
|
validate_assert(state, var->data.mode & valid_modes);
|
2016-04-11 13:32:59 -07:00
|
|
|
|
2016-10-03 20:32:22 -07:00
|
|
|
if (var->data.compact) {
|
|
|
|
|
/* The "compact" flag is only valid on arrays of scalars. */
|
|
|
|
|
assert(glsl_type_is_array(var->type));
|
|
|
|
|
|
|
|
|
|
const struct glsl_type *type = glsl_get_array_element(var->type);
|
2021-04-27 14:49:40 -07:00
|
|
|
if (nir_is_arrayed_io(var, state->shader->info.stage)) {
|
2021-12-17 16:11:16 +01:00
|
|
|
if (var->data.per_view) {
|
|
|
|
|
assert(glsl_type_is_array(type));
|
|
|
|
|
type = glsl_get_array_element(type);
|
|
|
|
|
}
|
2016-10-03 20:32:22 -07:00
|
|
|
assert(glsl_type_is_array(type));
|
|
|
|
|
assert(glsl_type_is_scalar(glsl_get_array_element(type)));
|
|
|
|
|
} else {
|
|
|
|
|
assert(glsl_type_is_scalar(type));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2018-03-21 16:48:35 -07:00
|
|
|
if (var->num_members > 0) {
|
|
|
|
|
const struct glsl_type *without_array = glsl_without_array(var->type);
|
2019-03-05 16:07:12 +11:00
|
|
|
validate_assert(state, glsl_type_is_struct_or_ifc(without_array));
|
2018-03-21 16:48:35 -07:00
|
|
|
validate_assert(state, var->num_members == glsl_get_length(without_array));
|
|
|
|
|
validate_assert(state, var->members != NULL);
|
|
|
|
|
}
|
|
|
|
|
|
2020-02-11 14:41:05 -08:00
|
|
|
if (var->data.per_view)
|
|
|
|
|
validate_assert(state, glsl_type_is_array(var->type));
|
|
|
|
|
|
2020-10-02 02:14:36 -05:00
|
|
|
if (var->constant_initializer)
|
|
|
|
|
validate_constant(var->constant_initializer, var->type, state);
|
|
|
|
|
|
2021-10-15 12:58:22 -05:00
|
|
|
if (var->data.mode == nir_var_image) {
|
2021-09-15 11:39:12 -05:00
|
|
|
validate_assert(state, !var->data.bindless);
|
|
|
|
|
validate_assert(state, glsl_type_is_image(glsl_without_array(var->type)));
|
|
|
|
|
}
|
|
|
|
|
|
2022-05-27 09:16:09 +02:00
|
|
|
if (var->data.per_vertex)
|
|
|
|
|
validate_assert(state, state->shader->info.stage == MESA_SHADER_FRAGMENT);
|
|
|
|
|
|
2014-07-30 15:20:53 -07:00
|
|
|
/*
|
|
|
|
|
* TODO validate some things ir_validate.cpp does (requires more GLSL type
|
|
|
|
|
* support)
|
|
|
|
|
*/
|
|
|
|
|
|
2018-03-20 16:57:51 -07:00
|
|
|
_mesa_hash_table_insert(state->var_defs, var,
|
2019-11-14 12:12:50 -06:00
|
|
|
valid_modes == nir_var_function_temp ?
|
|
|
|
|
state->impl : NULL);
|
2016-05-14 15:40:54 -04:00
|
|
|
|
|
|
|
|
state->var = NULL;
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
2020-06-01 15:39:31 -05:00
|
|
|
static bool
|
|
|
|
|
validate_ssa_def_dominance(nir_ssa_def *def, void *_state)
|
|
|
|
|
{
|
|
|
|
|
validate_state *state = _state;
|
|
|
|
|
|
|
|
|
|
validate_assert(state, def->index < state->impl->ssa_alloc);
|
|
|
|
|
validate_assert(state, !BITSET_TEST(state->ssa_defs_found, def->index));
|
|
|
|
|
BITSET_SET(state->ssa_defs_found, def->index);
|
|
|
|
|
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
validate_src_dominance(nir_src *src, void *_state)
|
|
|
|
|
{
|
|
|
|
|
validate_state *state = _state;
|
|
|
|
|
|
|
|
|
|
if (src->ssa->parent_instr->block == src->parent_instr->block) {
|
|
|
|
|
validate_assert(state, src->ssa->index < state->impl->ssa_alloc);
|
|
|
|
|
validate_assert(state, BITSET_TEST(state->ssa_defs_found,
|
|
|
|
|
src->ssa->index));
|
|
|
|
|
} else {
|
|
|
|
|
validate_assert(state, nir_block_dominates(src->ssa->parent_instr->block,
|
|
|
|
|
src->parent_instr->block));
|
|
|
|
|
}
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_ssa_dominance(nir_function_impl *impl, validate_state *state)
|
|
|
|
|
{
|
|
|
|
|
nir_metadata_require(impl, nir_metadata_dominance);
|
|
|
|
|
|
|
|
|
|
nir_foreach_block(block, impl) {
|
|
|
|
|
state->block = block;
|
|
|
|
|
nir_foreach_instr(instr, block) {
|
|
|
|
|
state->instr = instr;
|
|
|
|
|
if (instr->type == nir_instr_type_phi) {
|
|
|
|
|
nir_phi_instr *phi = nir_instr_as_phi(instr);
|
|
|
|
|
nir_foreach_phi_src(src, phi) {
|
|
|
|
|
validate_assert(state,
|
|
|
|
|
nir_block_dominates(src->src.ssa->parent_instr->block,
|
|
|
|
|
src->pred));
|
|
|
|
|
}
|
|
|
|
|
} else {
|
|
|
|
|
nir_foreach_src(instr, validate_src_dominance, state);
|
|
|
|
|
}
|
|
|
|
|
nir_foreach_ssa_def(instr, validate_ssa_def_dominance, state);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2014-07-30 15:20:53 -07:00
|
|
|
static void
|
|
|
|
|
validate_function_impl(nir_function_impl *impl, validate_state *state)
|
|
|
|
|
{
|
nir/validate: Use a single set for SSA def validation
The current SSA def validation we do in nir_validate validates three
things:
1. That each SSA def is only ever used in the function in which it is
defined.
2. That an nir_src exists in an SSA def's use list if and only if it
points to that SSA def.
3. That each nir_src is in the correct use list (uses or if_uses) based
on whether it's an if condition or not.
The way we were doing this before was that we had a hash table which
provided a map from SSA def to a small ssa_def_validate_state data
structure which contained a pointer to the nir_function_impl and two
hash sets, one for each use list. This meant piles of allocation and
creating of little hash sets. It also meant one hash lookup for each
SSA def plus one per use as well as two per src (because we have to look
up the ssa_def_validate_state and then look up the use.) It also
involved a second walk over the instructions as a post-validate step.
This commit changes us to use a single low-collision hash set of SSA
sources for all of this by being a bit more clever. We accomplish the
objectives above as follows:
1. The list is clear when we start validating a function. If the
nir_src references an SSA def which is defined in a different
function, it simply won't be in the set.
2. When validating the SSA defs, we walk the uses and verify that they
have is_ssa set and that the SSA def points to the SSA def we're
validating. This catches the case of a nir_src being in the wrong
list. We then put the nir_src in the set and, when we validate the
nir_src, we assert that it's in the set. This takes care of any
cases where a nir_src isn't in the use list. After checking that
the nir_src is in the set, we remove it from the set and, at the end
of nir_function_impl validation, we assert that the set is empty.
This takes care of any cases where a nir_src is in a use list but
the instruction is no longer in the shader.
3. When we put a nir_src in the set, we set the bottom bit of the
pointer to 1 if it's the condition of an if. This lets us detect
whether or not a nir_src is in the right list.
When running shader-db with an optimized debug build of mesa on my
laptop, I get the following shader-db CPU times:
With NIR_VALIDATE=0 3033.34 seconds
Before this commit 20224.83 seconds
After this commit 6255.50 seconds
Assuming shader-db is a representative sampling of GLSL shaders, this
means that making this change yields an 81% reduction in the time spent
in nir_validate. It still isn't cheap but enabling validation now only
increases compile times by 2x instead of 6.6x.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2019-05-04 18:02:50 -05:00
|
|
|
/* Resize the ssa_srcs set. It's likely that the size of this set will
|
|
|
|
|
* never actually hit the number of SSA defs because we remove sources from
|
|
|
|
|
* the set as we visit them. (It could actually be much larger because
|
|
|
|
|
* each SSA def can be used more than once.) However, growing it now costs
|
|
|
|
|
* us very little (the extra memory is already dwarfed by the SSA defs
|
|
|
|
|
* themselves) and makes collisions much less likely.
|
|
|
|
|
*/
|
|
|
|
|
_mesa_set_resize(state->ssa_srcs, impl->ssa_alloc);
|
|
|
|
|
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, impl->function->impl == impl);
|
|
|
|
|
validate_assert(state, impl->cf_node.parent == NULL);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
2021-09-24 18:12:24 +02:00
|
|
|
if (impl->preamble) {
|
|
|
|
|
validate_assert(state, impl->function->is_entrypoint);
|
|
|
|
|
validate_assert(state, impl->preamble->is_preamble);
|
|
|
|
|
}
|
|
|
|
|
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, exec_list_is_empty(&impl->end_block->instr_list));
|
|
|
|
|
validate_assert(state, impl->end_block->successors[0] == NULL);
|
|
|
|
|
validate_assert(state, impl->end_block->successors[1] == NULL);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
|
|
|
|
state->impl = impl;
|
|
|
|
|
state->parent_node = &impl->cf_node;
|
|
|
|
|
|
2014-11-05 13:58:42 -08:00
|
|
|
exec_list_validate(&impl->locals);
|
2020-05-20 10:18:14 -05:00
|
|
|
nir_foreach_function_temp_variable(var, impl) {
|
2019-11-14 12:12:50 -06:00
|
|
|
validate_var_decl(var, nir_var_function_temp, state);
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
2019-05-10 14:44:45 -05:00
|
|
|
state->ssa_defs_found = reralloc(state->mem_ctx, state->ssa_defs_found,
|
|
|
|
|
BITSET_WORD, BITSET_WORDS(impl->ssa_alloc));
|
2014-11-10 16:00:03 -08:00
|
|
|
memset(state->ssa_defs_found, 0, BITSET_WORDS(impl->ssa_alloc) *
|
|
|
|
|
sizeof(BITSET_WORD));
|
2020-09-15 11:28:43 -05:00
|
|
|
|
|
|
|
|
_mesa_set_clear(state->blocks, NULL);
|
2020-10-20 14:32:28 -07:00
|
|
|
_mesa_set_resize(state->blocks, impl->num_blocks);
|
2020-09-15 11:28:43 -05:00
|
|
|
collect_blocks(&impl->body, state);
|
|
|
|
|
_mesa_set_add(state->blocks, impl->end_block);
|
|
|
|
|
validate_assert(state, !exec_list_is_empty(&impl->body));
|
2014-07-30 15:20:53 -07:00
|
|
|
foreach_list_typed(nir_cf_node, node, node, &impl->body) {
|
|
|
|
|
validate_cf_node(node, state);
|
|
|
|
|
}
|
2020-09-15 11:28:43 -05:00
|
|
|
validate_end_block(impl->end_block, state);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
2020-07-08 11:56:32 -05:00
|
|
|
validate_assert(state, state->ssa_srcs->entries == 0);
|
|
|
|
|
_mesa_set_clear(state->ssa_srcs, NULL);
|
2020-06-01 15:39:31 -05:00
|
|
|
|
2020-11-24 23:34:59 +01:00
|
|
|
static int validate_dominance = -1;
|
|
|
|
|
if (validate_dominance < 0) {
|
|
|
|
|
validate_dominance =
|
2021-11-17 16:10:52 +01:00
|
|
|
NIR_DEBUG(VALIDATE_SSA_DOMINANCE);
|
2020-11-24 23:34:59 +01:00
|
|
|
}
|
2022-10-05 13:08:56 +03:00
|
|
|
if (validate_dominance) {
|
|
|
|
|
memset(state->ssa_defs_found, 0, BITSET_WORDS(impl->ssa_alloc) *
|
|
|
|
|
sizeof(BITSET_WORD));
|
2020-06-01 15:39:31 -05:00
|
|
|
validate_ssa_dominance(impl, state);
|
2022-10-05 13:08:56 +03:00
|
|
|
}
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
validate_function(nir_function *func, validate_state *state)
|
|
|
|
|
{
|
2015-12-26 10:00:47 -08:00
|
|
|
if (func->impl != NULL) {
|
2016-05-16 12:44:59 -04:00
|
|
|
validate_assert(state, func->impl->function == func);
|
2015-12-26 10:00:47 -08:00
|
|
|
validate_function_impl(func->impl, state);
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
init_validate_state(validate_state *state)
|
|
|
|
|
{
|
2019-05-10 14:44:45 -05:00
|
|
|
state->mem_ctx = ralloc_context(NULL);
|
nir/validate: Use a single set for SSA def validation
The current SSA def validation we do in nir_validate validates three
things:
1. That each SSA def is only ever used in the function in which it is
defined.
2. That an nir_src exists in an SSA def's use list if and only if it
points to that SSA def.
3. That each nir_src is in the correct use list (uses or if_uses) based
on whether it's an if condition or not.
The way we were doing this before was that we had a hash table which
provided a map from SSA def to a small ssa_def_validate_state data
structure which contained a pointer to the nir_function_impl and two
hash sets, one for each use list. This meant piles of allocation and
creating of little hash sets. It also meant one hash lookup for each
SSA def plus one per use as well as two per src (because we have to look
up the ssa_def_validate_state and then look up the use.) It also
involved a second walk over the instructions as a post-validate step.
This commit changes us to use a single low-collision hash set of SSA
sources for all of this by being a bit more clever. We accomplish the
objectives above as follows:
1. The list is clear when we start validating a function. If the
nir_src references an SSA def which is defined in a different
function, it simply won't be in the set.
2. When validating the SSA defs, we walk the uses and verify that they
have is_ssa set and that the SSA def points to the SSA def we're
validating. This catches the case of a nir_src being in the wrong
list. We then put the nir_src in the set and, when we validate the
nir_src, we assert that it's in the set. This takes care of any
cases where a nir_src isn't in the use list. After checking that
the nir_src is in the set, we remove it from the set and, at the end
of nir_function_impl validation, we assert that the set is empty.
This takes care of any cases where a nir_src is in a use list but
the instruction is no longer in the shader.
3. When we put a nir_src in the set, we set the bottom bit of the
pointer to 1 if it's the condition of an if. This lets us detect
whether or not a nir_src is in the right list.
When running shader-db with an optimized debug build of mesa on my
laptop, I get the following shader-db CPU times:
With NIR_VALIDATE=0 3033.34 seconds
Before this commit 20224.83 seconds
After this commit 6255.50 seconds
Assuming shader-db is a representative sampling of GLSL shaders, this
means that making this change yields an 81% reduction in the time spent
in nir_validate. It still isn't cheap but enabling validation now only
increases compile times by 2x instead of 6.6x.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
2019-05-04 18:02:50 -05:00
|
|
|
state->ssa_srcs = _mesa_pointer_set_create(state->mem_ctx);
|
2014-11-10 16:00:03 -08:00
|
|
|
state->ssa_defs_found = NULL;
|
2020-09-15 11:28:43 -05:00
|
|
|
state->blocks = _mesa_pointer_set_create(state->mem_ctx);
|
2019-05-10 14:44:45 -05:00
|
|
|
state->var_defs = _mesa_pointer_hash_table_create(state->mem_ctx);
|
|
|
|
|
state->errors = _mesa_pointer_hash_table_create(state->mem_ctx);
|
2016-05-14 15:40:54 -04:00
|
|
|
|
2015-07-21 19:54:15 -07:00
|
|
|
state->loop = NULL;
|
2021-12-01 17:34:48 +01:00
|
|
|
state->in_loop_continue_construct = false;
|
2016-05-14 15:40:54 -04:00
|
|
|
state->instr = NULL;
|
|
|
|
|
state->var = NULL;
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
destroy_validate_state(validate_state *state)
|
|
|
|
|
{
|
2019-05-10 14:44:45 -05:00
|
|
|
ralloc_free(state->mem_ctx);
|
2016-05-14 15:40:54 -04:00
|
|
|
}
|
|
|
|
|
|
2022-09-06 23:05:39 +08:00
|
|
|
simple_mtx_t fail_dump_mutex = SIMPLE_MTX_INITIALIZER;
|
2019-03-27 10:13:28 -05:00
|
|
|
|
2016-05-14 15:40:54 -04:00
|
|
|
static void
|
2018-10-18 15:18:30 -05:00
|
|
|
dump_errors(validate_state *state, const char *when)
|
2016-05-14 15:40:54 -04:00
|
|
|
{
|
|
|
|
|
struct hash_table *errors = state->errors;
|
|
|
|
|
|
2019-03-27 10:13:28 -05:00
|
|
|
/* Lock around dumping so that we get clean dumps in a multi-threaded
|
|
|
|
|
* scenario
|
|
|
|
|
*/
|
2022-09-06 23:05:39 +08:00
|
|
|
simple_mtx_lock(&fail_dump_mutex);
|
2019-03-27 10:13:28 -05:00
|
|
|
|
2018-10-18 15:18:30 -05:00
|
|
|
if (when) {
|
|
|
|
|
fprintf(stderr, "NIR validation failed %s\n", when);
|
|
|
|
|
fprintf(stderr, "%d errors:\n", _mesa_hash_table_num_entries(errors));
|
|
|
|
|
} else {
|
|
|
|
|
fprintf(stderr, "NIR validation failed with %d errors:\n",
|
|
|
|
|
_mesa_hash_table_num_entries(errors));
|
|
|
|
|
}
|
2016-05-14 15:40:54 -04:00
|
|
|
|
|
|
|
|
nir_print_shader_annotated(state->shader, stderr, errors);
|
|
|
|
|
|
|
|
|
|
if (_mesa_hash_table_num_entries(errors) > 0) {
|
|
|
|
|
fprintf(stderr, "%d additional errors:\n",
|
|
|
|
|
_mesa_hash_table_num_entries(errors));
|
|
|
|
|
hash_table_foreach(errors, entry) {
|
|
|
|
|
fprintf(stderr, "%s\n", (char *)entry->data);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2022-09-06 23:05:39 +08:00
|
|
|
simple_mtx_unlock(&fail_dump_mutex);
|
2019-03-27 10:13:28 -05:00
|
|
|
|
2016-05-14 15:40:54 -04:00
|
|
|
abort();
|
2014-07-30 15:20:53 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2018-10-18 15:18:30 -05:00
|
|
|
nir_validate_shader(nir_shader *shader, const char *when)
|
2014-07-30 15:20:53 -07:00
|
|
|
{
|
2021-11-17 16:10:52 +01:00
|
|
|
if (NIR_DEBUG(NOVALIDATE))
|
2016-06-23 14:22:03 -07:00
|
|
|
return;
|
|
|
|
|
|
2014-07-30 15:20:53 -07:00
|
|
|
validate_state state;
|
|
|
|
|
init_validate_state(&state);
|
|
|
|
|
|
2014-11-10 16:00:03 -08:00
|
|
|
state.shader = shader;
|
|
|
|
|
|
2020-07-20 16:30:37 -05:00
|
|
|
nir_variable_mode valid_modes =
|
|
|
|
|
nir_var_shader_in |
|
|
|
|
|
nir_var_shader_out |
|
|
|
|
|
nir_var_shader_temp |
|
|
|
|
|
nir_var_uniform |
|
|
|
|
|
nir_var_mem_ubo |
|
|
|
|
|
nir_var_system_value |
|
|
|
|
|
nir_var_mem_ssbo |
|
2020-08-18 14:02:21 -05:00
|
|
|
nir_var_mem_shared |
|
2020-11-02 17:58:42 -06:00
|
|
|
nir_var_mem_global |
|
2020-05-27 16:51:04 -05:00
|
|
|
nir_var_mem_push_const |
|
2020-01-08 13:54:47 -08:00
|
|
|
nir_var_mem_constant |
|
2021-10-15 12:58:22 -05:00
|
|
|
nir_var_image;
|
2020-07-20 16:30:37 -05:00
|
|
|
|
2020-07-29 14:00:29 -05:00
|
|
|
if (gl_shader_stage_is_callable(shader->info.stage))
|
|
|
|
|
valid_modes |= nir_var_shader_call_data;
|
|
|
|
|
|
|
|
|
|
if (shader->info.stage == MESA_SHADER_ANY_HIT ||
|
|
|
|
|
shader->info.stage == MESA_SHADER_CLOSEST_HIT ||
|
|
|
|
|
shader->info.stage == MESA_SHADER_INTERSECTION)
|
|
|
|
|
valid_modes |= nir_var_ray_hit_attrib;
|
|
|
|
|
|
2022-02-08 02:55:18 +01:00
|
|
|
if (shader->info.stage == MESA_SHADER_TASK ||
|
|
|
|
|
shader->info.stage == MESA_SHADER_MESH)
|
|
|
|
|
valid_modes |= nir_var_mem_task_payload;
|
|
|
|
|
|
2020-07-20 16:30:37 -05:00
|
|
|
exec_list_validate(&shader->variables);
|
|
|
|
|
nir_foreach_variable_in_shader(var, shader)
|
|
|
|
|
validate_var_decl(var, valid_modes, &state);
|
2014-07-30 15:20:53 -07:00
|
|
|
|
2014-11-05 13:58:42 -08:00
|
|
|
exec_list_validate(&shader->functions);
|
2014-07-30 15:20:53 -07:00
|
|
|
foreach_list_typed(nir_function, func, node, &shader->functions) {
|
|
|
|
|
validate_function(func, &state);
|
|
|
|
|
}
|
|
|
|
|
|
2022-05-17 10:16:55 -05:00
|
|
|
if (shader->xfb_info != NULL) {
|
|
|
|
|
/* At least validate that, if nir_shader::xfb_info exists, the shader
|
|
|
|
|
* has real transform feedback going on.
|
|
|
|
|
*/
|
|
|
|
|
validate_assert(&state, shader->info.stage == MESA_SHADER_VERTEX ||
|
|
|
|
|
shader->info.stage == MESA_SHADER_TESS_EVAL ||
|
|
|
|
|
shader->info.stage == MESA_SHADER_GEOMETRY);
|
|
|
|
|
validate_assert(&state, shader->xfb_info->buffers_written != 0);
|
|
|
|
|
validate_assert(&state, shader->xfb_info->streams_written != 0);
|
|
|
|
|
validate_assert(&state, shader->xfb_info->output_count > 0);
|
|
|
|
|
}
|
|
|
|
|
|
2016-05-14 15:40:54 -04:00
|
|
|
if (_mesa_hash_table_num_entries(state.errors) > 0)
|
2018-10-18 15:18:30 -05:00
|
|
|
dump_errors(&state, when);
|
2016-05-14 15:40:54 -04:00
|
|
|
|
2014-07-30 15:20:53 -07:00
|
|
|
destroy_validate_state(&state);
|
|
|
|
|
}
|
2015-01-06 16:11:57 -08:00
|
|
|
|
2020-06-01 15:39:31 -05:00
|
|
|
void
|
|
|
|
|
nir_validate_ssa_dominance(nir_shader *shader, const char *when)
|
|
|
|
|
{
|
2021-11-17 16:10:52 +01:00
|
|
|
if (NIR_DEBUG(NOVALIDATE))
|
2020-06-01 15:39:31 -05:00
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
validate_state state;
|
|
|
|
|
init_validate_state(&state);
|
|
|
|
|
|
|
|
|
|
state.shader = shader;
|
|
|
|
|
|
2023-06-22 13:27:59 -04:00
|
|
|
nir_foreach_function_impl(impl, shader) {
|
2020-06-01 15:39:31 -05:00
|
|
|
state.ssa_defs_found = reralloc(state.mem_ctx, state.ssa_defs_found,
|
|
|
|
|
BITSET_WORD,
|
2023-06-22 13:27:59 -04:00
|
|
|
BITSET_WORDS(impl->ssa_alloc));
|
|
|
|
|
memset(state.ssa_defs_found, 0, BITSET_WORDS(impl->ssa_alloc) *
|
2020-06-01 15:39:31 -05:00
|
|
|
sizeof(BITSET_WORD));
|
|
|
|
|
|
2023-06-22 13:27:59 -04:00
|
|
|
state.impl = impl;
|
|
|
|
|
validate_ssa_dominance(impl, &state);
|
2020-06-01 15:39:31 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (_mesa_hash_table_num_entries(state.errors) > 0)
|
|
|
|
|
dump_errors(&state, when);
|
|
|
|
|
|
|
|
|
|
destroy_validate_state(&state);
|
|
|
|
|
}
|
|
|
|
|
|
2015-01-06 16:11:57 -08:00
|
|
|
#endif /* NDEBUG */
|
