fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-04 11:58:10 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

nir: s/nir_var_mem_image/nir_var_image/g

Browse source 
We typically use nir_var_mem_* for stuff that has an explicit byte-based
memory layout.  Images are opaque.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13386>
This commit is contained in:
Jason Ekstrand 2021-10-15 12:58:22 -05:00 • committed by Marge Bot
parent e73096bd6d
commit 956199e870
33 changed files with 58 additions and 58 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/amd/compiler/aco_instruction_selection.cpp
View file

@ -7082,7 +7082,7 @@ emit_scoped_barrier(isel_context* ctx, nir_intrinsic_instr* instr)
unsigned nir_storage = nir_intrinsic_memory_modes(instr);
if (nir_storage & (nir_var_mem_ssbo | nir_var_mem_global))
storage |= storage_buffer;
if (nir_storage & nir_var_mem_image)
if (nir_storage & nir_var_image)
storage |= storage_image;
if (shared_storage_used && (nir_storage & nir_var_mem_shared))
storage |= storage_shared;

2
src/amd/llvm/ac_nir_to_llvm.c
View file

@ -3863,7 +3863,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins
nir_variable_mode modes = nir_intrinsic_memory_modes(instr);
unsigned wait_flags = 0;
if (modes & (nir_var_mem_global | nir_var_mem_ssbo | nir_var_mem_image))
if (modes & (nir_var_mem_global | nir_var_mem_ssbo | nir_var_image))
wait_flags |= AC_WAIT_VLOAD | AC_WAIT_VSTORE;
if (modes & nir_var_mem_shared)
wait_flags |= AC_WAIT_LGKM;

14
src/amd/vulkan/radv_meta_bufimage.c
View file

@ -47,7 +47,7 @@ build_nir_itob_compute_shader(struct radv_device *dev, bool is_3d)
input_img->data.descriptor_set = 0;
input_img->data.binding = 0;
nir_variable *output_img = nir_variable_create(b.shader, nir_var_mem_image, img_type, "out_img");
nir_variable *output_img = nir_variable_create(b.shader, nir_var_image, img_type, "out_img");
output_img->data.descriptor_set = 0;
output_img->data.binding = 1;
@ -229,7 +229,7 @@ build_nir_btoi_compute_shader(struct radv_device *dev, bool is_3d)
input_img->data.descriptor_set = 0;
input_img->data.binding = 0;
nir_variable *output_img = nir_variable_create(b.shader, nir_var_mem_image, img_type, "out_img");
nir_variable *output_img = nir_variable_create(b.shader, nir_var_image, img_type, "out_img");
output_img->data.descriptor_set = 0;
output_img->data.binding = 1;
@ -409,7 +409,7 @@ build_nir_btoi_r32g32b32_compute_shader(struct radv_device *dev)
input_img->data.descriptor_set = 0;
input_img->data.binding = 0;
nir_variable *output_img = nir_variable_create(b.shader, nir_var_mem_image, img_type, "out_img");
nir_variable *output_img = nir_variable_create(b.shader, nir_var_image, img_type, "out_img");
output_img->data.descriptor_set = 0;
output_img->data.binding = 1;
@ -563,7 +563,7 @@ build_nir_itoi_compute_shader(struct radv_device *dev, bool is_3d, int samples)
input_img->data.descriptor_set = 0;
input_img->data.binding = 0;
nir_variable *output_img = nir_variable_create(b.shader, nir_var_mem_image, img_type, "out_img");
nir_variable *output_img = nir_variable_create(b.shader, nir_var_image, img_type, "out_img");
output_img->data.descriptor_set = 0;
output_img->data.binding = 1;
@ -764,7 +764,7 @@ build_nir_itoi_r32g32b32_compute_shader(struct radv_device *dev)
input_img->data.binding = 0;
nir_variable *output_img =
nir_variable_create(b.shader, nir_var_mem_image, img_type, "output_img");
nir_variable_create(b.shader, nir_var_image, img_type, "output_img");
output_img->data.descriptor_set = 0;
output_img->data.binding = 1;
@ -920,7 +920,7 @@ build_nir_cleari_compute_shader(struct radv_device *dev, bool is_3d, int samples
b.shader->info.workgroup_size[1] = 8;
b.shader->info.workgroup_size[2] = 1;
nir_variable *output_img = nir_variable_create(b.shader, nir_var_mem_image, img_type, "out_img");
nir_variable *output_img = nir_variable_create(b.shader, nir_var_image, img_type, "out_img");
output_img->data.descriptor_set = 0;
output_img->data.binding = 0;
@ -1078,7 +1078,7 @@ build_nir_cleari_r32g32b32_compute_shader(struct radv_device *dev)
b.shader->info.workgroup_size[1] = 8;
b.shader->info.workgroup_size[2] = 1;
nir_variable *output_img = nir_variable_create(b.shader, nir_var_mem_image, img_type, "out_img");
nir_variable *output_img = nir_variable_create(b.shader, nir_var_image, img_type, "out_img");
output_img->data.descriptor_set = 0;
output_img->data.binding = 0;

2
src/amd/vulkan/radv_meta_clear.c
View file

@ -1175,7 +1175,7 @@ build_clear_dcc_comp_to_single_shader(bool is_msaa)
nir_channel(&b, global_id, 2),
nir_ssa_undef(&b, 1, 32));
nir_variable *output_img = nir_variable_create(b.shader, nir_var_mem_image, img_type, "out_img");
nir_variable *output_img = nir_variable_create(b.shader, nir_var_image, img_type, "out_img");
output_img->data.descriptor_set = 0;
output_img->data.binding = 0;

4
src/amd/vulkan/radv_meta_decompress.c
View file

@ -45,11 +45,11 @@ build_expand_depth_stencil_compute_shader(struct radv_device *dev)
b.shader->info.workgroup_size[0] = 8;
b.shader->info.workgroup_size[1] = 8;
b.shader->info.workgroup_size[2] = 1;
nir_variable *input_img = nir_variable_create(b.shader, nir_var_mem_image, img_type, "in_img");
nir_variable *input_img = nir_variable_create(b.shader, nir_var_image, img_type, "in_img");
input_img->data.descriptor_set = 0;
input_img->data.binding = 0;
nir_variable *output_img = nir_variable_create(b.shader, nir_var_mem_image, img_type, "out_img");
nir_variable *output_img = nir_variable_create(b.shader, nir_var_image, img_type, "out_img");
output_img->data.descriptor_set = 0;
output_img->data.binding = 1;

4
src/amd/vulkan/radv_meta_fast_clear.c
View file

@ -46,11 +46,11 @@ build_dcc_decompress_compute_shader(struct radv_device *dev)
b.shader->info.workgroup_size[0] = 16;
b.shader->info.workgroup_size[1] = 16;
b.shader->info.workgroup_size[2] = 1;
nir_variable *input_img = nir_variable_create(b.shader, nir_var_mem_image, img_type, "in_img");
nir_variable *input_img = nir_variable_create(b.shader, nir_var_image, img_type, "in_img");
input_img->data.descriptor_set = 0;
input_img->data.binding = 0;
nir_variable *output_img = nir_variable_create(b.shader, nir_var_mem_image, img_type, "out_img");
nir_variable *output_img = nir_variable_create(b.shader, nir_var_image, img_type, "out_img");
output_img->data.descriptor_set = 0;
output_img->data.binding = 1;

2
src/amd/vulkan/radv_meta_fmask_expand.c
View file

@ -43,7 +43,7 @@ build_fmask_expand_compute_shader(struct radv_device *device, int samples)
input_img->data.descriptor_set = 0;
input_img->data.binding = 0;
nir_variable *output_img = nir_variable_create(b.shader, nir_var_mem_image, img_type, "out_img");
nir_variable *output_img = nir_variable_create(b.shader, nir_var_image, img_type, "out_img");
output_img->data.descriptor_set = 0;
output_img->data.binding = 1;
output_img->data.access = ACCESS_NON_READABLE;

4
src/amd/vulkan/radv_meta_resolve_cs.c
View file

@ -75,7 +75,7 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_s
input_img->data.descriptor_set = 0;
input_img->data.binding = 0;
nir_variable *output_img = nir_variable_create(b.shader, nir_var_mem_image, img_type, "out_img");
nir_variable *output_img = nir_variable_create(b.shader, nir_var_image, img_type, "out_img");
output_img->data.descriptor_set = 0;
output_img->data.binding = 1;
@ -147,7 +147,7 @@ build_depth_stencil_resolve_compute_shader(struct radv_device *dev, int samples,
input_img->data.descriptor_set = 0;
input_img->data.binding = 0;
nir_variable *output_img = nir_variable_create(b.shader, nir_var_mem_image, img_type, "out_img");
nir_variable *output_img = nir_variable_create(b.shader, nir_var_image, img_type, "out_img");
output_img->data.descriptor_set = 0;
output_img->data.binding = 1;

2
src/compiler/glsl/gl_nir_link_uniforms.c
View file

@ -395,7 +395,7 @@ add_var_use_deref(nir_deref_instr *deref, struct hash_table *live,
!nir_deref_mode_is_one_of(deref, nir_var_uniform |
nir_var_mem_ubo |
nir_var_mem_ssbo |
nir_var_mem_image)) {
nir_var_image)) {
nir_deref_path_finish(&path);
return;
}

2
src/compiler/glsl/gl_nir_linker.h
View file

@ -39,7 +39,7 @@ struct gl_nir_linker_options {
nir_foreach_variable_with_modes(var, shader, nir_var_uniform | \
nir_var_mem_ubo | \
nir_var_mem_ssbo | \
nir_var_mem_image)
nir_var_image)
bool gl_nir_link_spirv(struct gl_context *ctx,
struct gl_shader_program *prog,

2
src/compiler/glsl/gl_nir_lower_images.c
View file

@ -87,7 +87,7 @@ lower_impl(nir_builder *b, nir_instr *instr, bool bindless_only)
return false;
}
bool bindless = var->data.mode != nir_var_mem_image || var->data.bindless;
bool bindless = var->data.mode != nir_var_image || var->data.bindless;
if (bindless_only && !bindless)
return false;

2
src/compiler/glsl/gl_nir_lower_samplers_as_deref.c
View file

@ -141,7 +141,7 @@ lower_deref(nir_builder *b, struct lower_samplers_as_deref_state *state,
nir_variable *var = nir_deref_instr_get_variable(deref);
gl_shader_stage stage = state->shader->info.stage;
if (!(var->data.mode & (nir_var_uniform | nir_var_mem_image)) ||
if (!(var->data.mode & (nir_var_uniform | nir_var_image)) ||
var->data.bindless)
return NULL;

2
src/compiler/glsl/glsl_to_nir.cpp
View file

@ -546,7 +546,7 @@ nir_visitor::visit(ir_variable *ir)
if (ir->get_interface_type())
var->data.mode = nir_var_mem_ubo;
else if (ir->type->contains_image() && !ir->data.bindless)
var->data.mode = nir_var_mem_image;
var->data.mode = nir_var_image;
else
var->data.mode = nir_var_uniform;
break;

2
src/compiler/nir/nir.c
View file

@ -189,7 +189,7 @@ nir_shader_add_variable(nir_shader *shader, nir_variable *var)
case nir_var_uniform:
case nir_var_mem_ubo:
case nir_var_mem_ssbo:
case nir_var_mem_image:
case nir_var_image:
case nir_var_mem_shared:
case nir_var_system_value:
case nir_var_mem_push_const:

6
src/compiler/nir/nir.h
View file

@ -140,7 +140,7 @@ typedef enum {
nir_var_shader_call_data = (1 << 12),
/** Ray hit attributes */
nir_var_ray_hit_attrib = (1 << 13),
nir_var_mem_image = (1 << 14),
nir_var_image = (1 << 14),
nir_var_read_only_modes = nir_var_shader_in | nir_var_uniform |
nir_var_system_value | nir_var_mem_constant |
nir_var_mem_ubo,
@ -716,10 +716,10 @@ _nir_shader_variable_has_mode(nir_variable *var, unsigned modes)
nir_foreach_variable_with_modes_safe(var, shader, nir_var_uniform)
#define nir_foreach_image_variable(var, shader) \
nir_foreach_variable_with_modes(var, shader, nir_var_mem_image)
nir_foreach_variable_with_modes(var, shader, nir_var_image)
#define nir_foreach_image_variable_safe(var, shader) \
nir_foreach_variable_with_modes_safe(var, shader, nir_var_mem_image)
nir_foreach_variable_with_modes_safe(var, shader, nir_var_image)
static inline bool
nir_variable_is_global(const nir_variable *var)

2
src/compiler/nir/nir_divergence_analysis.c
View file

@ -603,7 +603,7 @@ nir_variable_mode_is_uniform(nir_variable_mode mode) {
case nir_var_mem_ssbo:
case nir_var_mem_shared:
case nir_var_mem_global:
case nir_var_mem_image:
case nir_var_image:
return true;
default:
return false;

2
src/compiler/nir/nir_gather_info.c
View file

@ -834,7 +834,7 @@ nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint)
shader->info.bit_sizes_float = 0;
shader->info.bit_sizes_int = 0;
nir_foreach_variable_with_modes(var, shader, nir_var_mem_image | nir_var_uniform) {
nir_foreach_variable_with_modes(var, shader, nir_var_image | nir_var_uniform) {
/* Bindless textures and images don't use non-bindless slots.
* Interface blocks imply inputs, outputs, UBO, or SSBO, which can only
* mean bindless.

8
src/compiler/nir/nir_opt_access.c
View file

@ -116,10 +116,10 @@ gather_intrinsic(struct access_state *state, nir_intrinsic_instr *instr)
}
if ((var->data.mode == nir_var_uniform ||
var->data.mode == nir_var_mem_image) && read)
var->data.mode == nir_var_image) && read)
_mesa_set_add(state->vars_read, var);
if ((var->data.mode == nir_var_uniform ||
var->data.mode == nir_var_mem_image) && write)
var->data.mode == nir_var_image) && write)
_mesa_set_add(state->vars_written, var);
break;
@ -190,7 +190,7 @@ process_variable(struct access_state *state, nir_variable *var)
const struct glsl_type *type = glsl_without_array(var->type);
if (var->data.mode != nir_var_mem_ssbo &&
!(var->data.mode == nir_var_uniform && glsl_type_is_image(type)) &&
var->data.mode != nir_var_mem_image)
var->data.mode != nir_var_image)
return false;
/* Ignore variables we've already marked */
@ -347,7 +347,7 @@ nir_opt_access(nir_shader *shader, const nir_opt_access_options *options)
nir_foreach_variable_with_modes(var, shader, nir_var_uniform |
nir_var_mem_ubo |
nir_var_mem_ssbo |
nir_var_mem_image)
nir_var_image)
var_progress |= process_variable(&state, var);
nir_foreach_function(func, shader) {

2
src/compiler/nir/nir_opt_peephole_select.c
View file

@ -104,7 +104,7 @@ block_check_for_allowed_instrs(nir_block *block, unsigned *count,
switch (deref->modes) {
case nir_var_shader_in:
case nir_var_uniform:
case nir_var_mem_image:
case nir_var_image:
/* Don't try to remove flow control around an indirect load
* because that flow control may be trying to avoid invalid
* loads.

4
src/compiler/nir/nir_print.c
View file

@ -464,7 +464,7 @@ get_variable_mode_str(nir_variable_mode mode, bool want_local_global_mode)
return "push_const";
case nir_var_mem_constant:
return "constant";
case nir_var_mem_image:
case nir_var_image:
return "image";
case nir_var_shader_temp:
return want_local_global_mode ? "shader_temp" : "";
@ -529,7 +529,7 @@ print_var_decl(nir_variable *var, print_state *state)
nir_var_uniform |
nir_var_mem_ubo |
nir_var_mem_ssbo |
nir_var_mem_image)) {
nir_var_image)) {
const char *loc = NULL;
char buf[4];

4
src/compiler/nir/nir_validate.c
View file

@ -1518,7 +1518,7 @@ validate_var_decl(nir_variable *var, nir_variable_mode valid_modes,
if (var->constant_initializer)
validate_constant(var->constant_initializer, var->type, state);
if (var->data.mode == nir_var_mem_image) {
if (var->data.mode == nir_var_image) {
validate_assert(state, !var->data.bindless);
validate_assert(state, glsl_type_is_image(glsl_without_array(var->type)));
}
@ -1753,7 +1753,7 @@ nir_validate_shader(nir_shader *shader, const char *when)
nir_var_mem_shared |
nir_var_mem_push_const |
nir_var_mem_constant |
nir_var_mem_image;
nir_var_image;
if (gl_shader_stage_is_callable(shader->info.stage))
valid_modes |= nir_var_shader_call_data;

8
src/compiler/spirv/spirv_to_nir.c
View file

@ -368,7 +368,7 @@ vtn_get_image(struct vtn_builder *b, uint32_t value_id,
if (access)
*access |= spirv_to_gl_access_qualifier(b, type->access_qualifier);
nir_variable_mode mode = glsl_type_is_image(type->glsl_image) ?
nir_var_mem_image : nir_var_uniform;
nir_var_image : nir_var_uniform;
return nir_build_deref_cast(&b->nb, vtn_get_nir_ssa(b, value_id),
mode, type->glsl_image, 0);
}
@ -422,7 +422,7 @@ vtn_get_sampled_image(struct vtn_builder *b, uint32_t value_id)
*/
const struct glsl_type *image_type = type->image->glsl_image;
nir_variable_mode image_mode = glsl_type_is_image(image_type) ?
nir_var_mem_image : nir_var_uniform;
nir_var_image : nir_var_uniform;
struct vtn_sampled_image si = { NULL, };
si.image = nir_build_deref_cast(&b->nb, nir_channel(&b->nb, si_vec2, 0),
@ -2420,7 +2420,7 @@ vtn_mem_semantics_to_nir_var_modes(struct vtn_builder *b,
nir_var_mem_global;
}
if (semantics & SpvMemorySemanticsImageMemoryMask)
modes |= nir_var_mem_image;
modes |= nir_var_image;
if (semantics & SpvMemorySemanticsWorkgroupMemoryMask)
modes |= nir_var_mem_shared;
if (semantics & SpvMemorySemanticsCrossWorkgroupMemoryMask)
@ -6138,7 +6138,7 @@ vtn_emit_kernel_entry_point_wrapper(struct vtn_builder *b,
in_var->data.mode = nir_var_uniform;
in_var->type = param_type->deref->type;
} else if (param_type->base_type == vtn_base_type_image) {
in_var->data.mode = nir_var_mem_image;
in_var->data.mode = nir_var_image;
in_var->type = param_type->glsl_image;
in_var->data.access =
spirv_to_gl_access_qualifier(b, param_type->access_qualifier);

4
src/compiler/spirv/vtn_variables.c
View file

@ -1511,7 +1511,7 @@ vtn_storage_class_to_mode(struct vtn_builder *b,
interface_type->base_type == vtn_base_type_image &&
glsl_type_is_image(interface_type->glsl_image)) {
mode = vtn_variable_mode_image;
nir_mode = nir_var_mem_image;
nir_mode = nir_var_image;
} else if (b->shader->info.stage == MESA_SHADER_KERNEL) {
mode = vtn_variable_mode_constant;
nir_mode = nir_var_mem_constant;
@ -1564,7 +1564,7 @@ vtn_storage_class_to_mode(struct vtn_builder *b,
break;
case SpvStorageClassImage:
mode = vtn_variable_mode_image;
nir_mode = nir_var_mem_image;
nir_mode = nir_var_image;
break;
case SpvStorageClassCallableDataKHR:
mode = vtn_variable_mode_call_data;

2
src/freedreno/ir3/ir3_compiler_nir.c
View file

@ -1382,7 +1382,7 @@ emit_intrinsic_barrier(struct ir3_context *ctx, nir_intrinsic_instr *intr)
IR3_BARRIER_BUFFER_R | IR3_BARRIER_BUFFER_W;
}
if (modes & nir_var_mem_image) {
if (modes & nir_var_image) {
barrier->barrier_class |= IR3_BARRIER_IMAGE_W;
barrier->barrier_conflict |=
IR3_BARRIER_IMAGE_W | IR3_BARRIER_IMAGE_R;

2
src/gallium/auxiliary/nir/tgsi_to_nir.c
View file

@ -1280,7 +1280,7 @@ get_image_var(struct ttn_compile *c, int binding,
if (!var) {
const struct glsl_type *type = glsl_image_type(dim, is_array, base_type);
var = nir_variable_create(c->build.shader, nir_var_mem_image, type, "image");
var = nir_variable_create(c->build.shader, nir_var_image, type, "image");
var->data.binding = binding;
var->data.explicit_binding = true;
var->data.access = access;

8
src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
View file

@ -305,7 +305,7 @@ get_storage_class(struct nir_variable *var)
case nir_var_shader_out:
return SpvStorageClassOutput;
case nir_var_uniform:
case nir_var_mem_image:
case nir_var_image:
return SpvStorageClassUniformConstant;
default:
unreachable("Unsupported nir_variable_mode");
@ -1006,7 +1006,7 @@ emit_uniform(struct ntv_context *ctx, struct nir_variable *var)
emit_bo(ctx, var, 0);
else {
assert(var->data.mode == nir_var_uniform ||
var->data.mode == nir_var_mem_image);
var->data.mode == nir_var_image);
const struct glsl_type *type = glsl_without_array(var->type);
if (glsl_type_is_sampler(type) || glsl_type_is_image(type))
emit_image(ctx, var, false);
@ -3417,7 +3417,7 @@ emit_deref_array(struct ntv_context *ctx, nir_deref_instr *deref)
break;
case nir_var_uniform:
case nir_var_mem_image: {
case nir_var_image: {
struct hash_entry *he = _mesa_hash_table_search(ctx->vars, var);
assert(he);
base = (SpvId)(intptr_t)he->data;
@ -3947,7 +3947,7 @@ nir_to_spirv(struct nir_shader *s, const struct zink_so_info *so_info, uint32_t
/* we have to reverse iterate to match what's done in zink_compiler.c */
foreach_list_typed_reverse(nir_variable, var, node, &s->variables)
if (_nir_shader_variable_has_mode(var, nir_var_uniform |
nir_var_mem_image |
nir_var_image |
nir_var_mem_ubo |
nir_var_mem_ssbo))
emit_uniform(&ctx, var);

6
src/gallium/drivers/zink/zink_compiler.c
View file

@ -1064,7 +1064,7 @@ create_bindless_image(nir_shader *nir, enum glsl_sampler_dim dim)
nir_variable *var;
const struct glsl_type *image_type = glsl_image_type(dim, false, GLSL_TYPE_FLOAT);
var = nir_variable_create(nir, nir_var_mem_image, glsl_array_type(image_type, ZINK_MAX_BINDLESS_HANDLES, 0), "bindless_image");
var = nir_variable_create(nir, nir_var_image, glsl_array_type(image_type, ZINK_MAX_BINDLESS_HANDLES, 0), "bindless_image");
var->data.descriptor_set = ZINK_DESCRIPTOR_BINDLESS;
var->data.driver_location = var->data.binding = binding;
var->data.image.format = PIPE_FORMAT_R8G8B8A8_UNORM;
@ -1364,7 +1364,7 @@ zink_shader_create(struct zink_screen *screen, struct nir_shader *nir,
foreach_list_typed_reverse_safe(nir_variable, var, node, &nir->variables) {
if (_nir_shader_variable_has_mode(var, nir_var_uniform |
nir_var_mem_image |
nir_var_image |
nir_var_mem_ubo |
nir_var_mem_ssbo)) {
enum zink_descriptor_type ztype;
@ -1401,7 +1401,7 @@ zink_shader_create(struct zink_screen *screen, struct nir_shader *nir,
ret->num_bindings[ztype]++;
} else {
assert(var->data.mode == nir_var_uniform ||
var->data.mode == nir_var_mem_image);
var->data.mode == nir_var_image);
if (var->data.bindless) {
ret->bindless = true;
handle_bindless_var(nir, var, type, bindless);

2
src/gallium/frontends/lavapipe/lvp_lower_vulkan_resource.c
View file

@ -211,7 +211,7 @@ void lvp_lower_pipeline_layout(const struct lvp_device *device,
{
nir_shader_lower_instructions(shader, lower_vulkan_resource_index, lower_vri_instr, layout);
nir_foreach_variable_with_modes(var, shader, nir_var_uniform |
nir_var_mem_image) {
nir_var_image) {
const struct glsl_type *type = var->type;
enum glsl_base_type base_type =
glsl_get_base_type(glsl_without_array(type));

2
src/gallium/frontends/lavapipe/lvp_pipeline.c
View file

@ -561,7 +561,7 @@ lvp_shader_compile_to_ir(struct lvp_pipeline *pipeline,
NIR_PASS_V(nir, nir_lower_clip_cull_distance_arrays);
NIR_PASS_V(nir, nir_remove_dead_variables,
nir_var_uniform | nir_var_mem_image, NULL);
nir_var_uniform | nir_var_image, NULL);
lvp_lower_pipeline_layout(pipeline->device, pipeline->layout, nir);

2
src/intel/compiler/brw_fs_nir.cpp
View file

@ -4436,7 +4436,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
nir_variable_mode modes = nir_intrinsic_memory_modes(instr);
ugm_fence = modes & (nir_var_mem_ssbo | nir_var_mem_global);
slm_fence = modes & nir_var_mem_shared;
tgm_fence = modes & nir_var_mem_image;
tgm_fence = modes & nir_var_image;
urb_fence = modes & nir_var_shader_out;
break;
}

2
src/mesa/state_tracker/st_glsl_to_nir.cpp
View file

@ -205,7 +205,7 @@ st_nir_assign_uniform_locations(struct gl_context *ctx,
int imageidx = 0;
nir_foreach_variable_with_modes(uniform, nir, nir_var_uniform |
nir_var_mem_image) {
nir_var_image) {
int loc;
const struct glsl_type *type = glsl_without_array(uniform->type);

2
src/mesa/state_tracker/st_pbo.c
View file

@ -557,7 +557,7 @@ create_fs(struct st_context *st, bool download,
[ST_PBO_CONVERT_SINT_TO_UINT] = GLSL_TYPE_UINT,
};
nir_variable *img_var =
nir_variable_create(b.shader, nir_var_mem_image,
nir_variable_create(b.shader, nir_var_image,
glsl_image_type(GLSL_SAMPLER_DIM_BUF, false,
type[conversion]), "img");
img_var->data.access = ACCESS_NON_READABLE;

2
src/microsoft/clc/clc_compiler.c
View file

@ -93,7 +93,7 @@ lower_read_write_image_deref(nir_builder *b, struct clc_image_lower_context *con
glsl_image_type(glsl_get_sampler_dim(in_var->type),
glsl_sampler_type_is_array(in_var->type),
nir_get_glsl_base_type_for_nir_type(image_type | 32));
return lower_image_deref_impl(b, context, new_var_type, nir_var_mem_image, context->num_uavs);
return lower_image_deref_impl(b, context, new_var_type, nir_var_image, context->num_uavs);
}
static void