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mesa/src/amd/common
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Marek Olšák df6380ddc9 amd: implement conformant TRUNC_COORD behavior for gfx11 
For testing, the conformant behavior can be enabled by setting
conformant_trunc_coord to true manually and running this to enable
the conformant behavior in hw:
    umr -w *.*.regTA_CNTL2 0x40000

The layer index rounding and TRUNC_COORD resetting workarounds can disabled
in the shader compiler.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
2023-02-24 21:27:24 +00:00
..
ac_binary.c radeonsi: increase gfx1100/gfx1101 physical vgprs 2022-11-02 17:09:32 +00:00
ac_binary.h ac: remove really_needs_scratch, parameter from ac_parse_shader_binary_config 2022-05-03 11:11:08 -04:00
ac_debug.c ac: fix IB parsing for Stoney 2022-11-04 00:42:08 +00:00
ac_debug.h ac: fix IB parsing for Stoney 2022-11-04 00:42:08 +00:00
ac_drm_fourcc.h radv: Add macros for win32 that accessed 2022-05-16 18:57:06 +00:00
ac_gpu_info.c amd: implement conformant TRUNC_COORD behavior for gfx11 2023-02-24 21:27:24 +00:00
ac_gpu_info.h amd: implement conformant TRUNC_COORD behavior for gfx11 2023-02-24 21:27:24 +00:00
ac_msgpack.c ac/rgp: add ac_msgpack.h/c 2021-02-19 14:29:46 +00:00
ac_msgpack.h ac/rgp: add ac_msgpack.h/c 2021-02-19 14:29:46 +00:00
ac_nir.c ac/nir,radv,radeonsi: gs copy shader use ac_nir_export_(position|parameter) 2023-02-03 12:27:44 +00:00
ac_nir.h ac/nir/ngg,radv: ms use ac_nir_export_(primitive|position|parameter) 2023-02-03 12:27:44 +00:00
ac_nir_cull.c ac/nir/cull: Alway remove zero-area triangles in face culling. 2023-02-03 09:39:54 +00:00
ac_nir_lower_esgs_io_to_mem.c nir: replace IS_SWIZZLED flag with ACCESS_IS_SWIZZLED_AMD 2022-12-13 20:33:05 +00:00
ac_nir_lower_global_access.c ac/nir: Do not set cursor in try_extract_additions 2022-05-03 09:23:49 +00:00
ac_nir_lower_ngg.c ac/nir/ngg: Include culled primitives in query. 2023-02-04 11:53:07 +01:00
ac_nir_lower_resinfo.c ac/nir: add resinfo lowering for sliced storage 3D views 2023-02-24 14:12:22 +00:00
ac_nir_lower_taskmesh_io_to_mem.c ac/nir: Avoid data race with task shader payloads. 2022-11-24 13:18:37 +00:00
ac_nir_lower_tess_io_to_mem.c nir, ac, aco: Add index src to load_buffer_amd/store_buffer_amd. 2022-10-20 20:00:50 +00:00
ac_nir_opt_outputs.c radv: Fixes compiling error with msvc 2022-05-16 18:57:06 +00:00
ac_perfcounter.c util: normalize include files under src/util/*.h with util/ prefix in mesa code base 2022-11-10 06:27:25 +00:00
ac_perfcounter.h ac: add initial SPM support 2021-11-11 10:05:49 +00:00
ac_rgp.c ac/rgp: add missing GFX11 bits for RGP 2022-12-15 15:19:39 +00:00
ac_rgp.h ac/rgp: add support for dumping SPM data 2021-11-11 10:05:49 +00:00
ac_rgp_elf_object_pack.c treewide: drop mtypes/macros includes from main 2021-12-08 22:14:45 +00:00
ac_rtld.c tree-wide: Use __func__ instead of __FUNCTION__ in non-gallium code 2022-11-22 06:53:46 +00:00
ac_rtld.h amd: change chip_class naming to "enum amd_gfx_level gfx_level" 2022-05-13 14:56:22 -04:00
ac_shader_args.c ac: add shader return values into ac_shader_args 2020-12-09 20:13:24 +00:00
ac_shader_args.h ac: move ring_offsets to ac_shader_args 2023-02-06 14:25:15 +00:00
ac_shader_util.c ac: Port ACO's get_fetch_format to ac_get_safe_fetch_size. 2023-02-16 15:29:36 +00:00
ac_shader_util.h ac: Port ACO's get_fetch_format to ac_get_safe_fetch_size. 2023-02-16 15:29:36 +00:00
ac_shadowed_regs.c amd: fix typo in shadowed uconfig registers on gfx11 2023-02-03 00:18:02 +00:00
ac_shadowed_regs.h ac,radeonsi: move shadow regs create ib preamble function to amd common 2023-01-25 04:53:34 +00:00
ac_spm.c ac: Remove trailing white space. 2022-05-25 12:29:30 +00:00
ac_spm.h ac: add initial SPM support 2021-11-11 10:05:49 +00:00
ac_sqtt.c ac/info: move pci bus info in a struct 2023-01-16 10:27:15 +01:00
ac_sqtt.h ac/sqtt: bump the maximum number of traces to 6 for GFX11 2022-12-15 15:19:39 +00:00
ac_surface.c amd/surface: fix base_mip_width of subsampled formats 2023-02-16 00:25:17 -05:00
ac_surface.h amd: fix tile_swizzle on gfx11 - should be shifted by 10 bits, not 8 2023-02-03 00:18:01 +00:00
ac_surface_meta_address_test.c amd: change chip_class naming to "enum amd_gfx_level gfx_level" 2022-05-13 14:56:22 -04:00
ac_surface_modifier_test.c amd: change chip_class naming to "enum amd_gfx_level gfx_level" 2022-05-13 14:56:22 -04:00
ac_surface_test_common.h ac/surface/tests: add more gfx103 and gfx11 tests 2022-11-06 18:16:48 -05:00
ac_uvd_dec.h amd: move uvd decode definitions to common place 2022-01-20 07:07:32 +10:00
ac_vcn_dec.h radeonsi/vcn: enable jpeg decode of yuv444 and yuv400 2022-10-07 15:14:39 +00:00
amd_family.c amd: split GFX1103 into GFX1103_R1 and GFX1103_R2 2023-02-03 00:18:01 +00:00
amd_family.h amd: split GFX1103 into GFX1103_R1 and GFX1103_R2 2023-02-03 00:18:01 +00:00
amd_kernel_code_t.h amd/common: switch to 3-spaces style 2020-09-07 10:00:29 +02:00
gfx10_format_table.h util: Move src/gallium/include/pipe/p_format.h to src/util/format/u_formats.h 2022-11-19 03:38:19 +00:00
gfx10_format_table.py amd: update gfx10_format_table.py for gfx11 2022-05-10 04:29:54 +00:00
meson.build radv/r600/clover: Getting libelf to be optional 2022-09-22 05:07:35 +00:00
sid.h amd: define new SET_*_REG_PAIRS packets 2023-02-05 23:23:45 -05:00
sid_tables.py amd: change chip_class naming to "enum amd_gfx_level gfx_level" 2022-05-13 14:56:22 -04:00