amd: split GFX1103 into GFX1103_R1 and GFX1103_R2

Fixes: caa09f66ae - amd: add chip identification for gfx1100-1103

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
This commit is contained in:
Marek Olšák 2023-01-24 03:00:38 -05:00 committed by Marge Bot
parent 66d11391f7
commit 84d59cdb59
8 changed files with 17 additions and 12 deletions

View file

@ -116,7 +116,8 @@
#define AMDGPU_GFX1101_RANGE 0x20, 0xFF //# 32 <= x < 255
#define AMDGPU_GFX1102_RANGE 0x10, 0x20 //# 16 <= x < 32
#define AMDGPU_GFX1103_RANGE 0x01, 0xFF //# 1 <= x < max
#define AMDGPU_GFX1103_R1_RANGE 0x01, 0x10 //# 1 <= x < 16
#define AMDGPU_GFX1103_R2_RANGE 0x80, 0xFF //# 128 <= x < max
#define AMDGPU_REMBRANDT_RANGE 0x01, 0xFF //# 01 <= x < 255
@ -187,7 +188,8 @@
#define ASICREV_IS_GFX1100(r) ASICREV_IS(r, GFX1100)
#define ASICREV_IS_GFX1101(r) ASICREV_IS(r, GFX1101)
#define ASICREV_IS_GFX1102(r) ASICREV_IS(r, GFX1102)
#define ASICREV_IS_GFX1103(r) ASICREV_IS(r, GFX1103)
#define ASICREV_IS_GFX1103_R1(r) ASICREV_IS(r, GFX1103_R1)
#define ASICREV_IS_GFX1103_R2(r) ASICREV_IS(r, GFX1103_R2)
#define ASICREV_IS_REMBRANDT(r) ASICREV_IS(r, REMBRANDT)

View file

@ -752,9 +752,6 @@ ChipFamily Gfx11Lib::HwlConvertChipFamily(
}
break;
case FAMILY_GFX1103:
if (ASICREV_IS_GFX1103(chipRevision))
{
}
break;
default:
ADDR_ASSERT(!"Unknown chip family");

View file

@ -846,7 +846,8 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info)
identify_chip(GFX1102);
break;
case FAMILY_GFX1103:
identify_chip(GFX1103);
identify_chip(GFX1103_R1);
identify_chip(GFX1103_R2);
break;
}

View file

@ -108,8 +108,10 @@ const char *ac_get_family_name(enum radeon_family family)
return "GFX1101";
case CHIP_GFX1102:
return "GFX1102";
case CHIP_GFX1103:
return "GFX1103";
case CHIP_GFX1103_R1:
return "GFX1103_R1";
case CHIP_GFX1103_R2:
return "GFX1103_R2";
default:
unreachable("Unknown GPU family");
}

View file

@ -131,7 +131,8 @@ enum radeon_family
CHIP_GFX1100,
CHIP_GFX1101,
CHIP_GFX1102,
CHIP_GFX1103,
CHIP_GFX1103_R1,
CHIP_GFX1103_R2,
CHIP_LAST,
};

View file

@ -183,7 +183,8 @@ const char *ac_get_llvm_processor_name(enum radeon_family family)
return "gfx1101";
case CHIP_GFX1102:
return "gfx1102";
case CHIP_GFX1103:
case CHIP_GFX1103_R1:
case CHIP_GFX1103_R2:
return "gfx1103";
default:
return "";

View file

@ -3175,7 +3175,8 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
case CHIP_GFX1100:
case CHIP_GFX1101:
case CHIP_GFX1102:
case CHIP_GFX1103:
case CHIP_GFX1103_R1:
case CHIP_GFX1103_R2:
dec->jpg.direct_reg = true;
dec->addr_gfx_mode = RDECODE_ARRAY_MODE_ADDRLIB_SEL_GFX11;
dec->av1_version = RDECODE_AV1_VER_1;

View file

@ -674,7 +674,7 @@ unsigned si_get_shader_prefetch_size(struct si_shader *shader)
/* Return 0 for some A0 chips only. Other chips don't need it. */
if ((shader->selector->screen->info.family == CHIP_GFX1100 ||
shader->selector->screen->info.family == CHIP_GFX1102 ||
shader->selector->screen->info.family == CHIP_GFX1103) &&
shader->selector->screen->info.family == CHIP_GFX1103_R1) &&
shader->selector->screen->info.chip_rev == 0)
return 0;