mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-23 02:08:10 +02:00
We need to lower everything on bifrost, and everything except nonuniform texture offsets on valhall. With texture offsets, the hardware supports nonuniform offsets passed in a staging register, but does not support passing nonuniform offsets as src1 in the narrow layout. We need to make sure we check for this if we implement narrow offsetms later. Input attachments are skipped in this commit because they need additional changes. Signed-off-by: Olivia Lee <olivia.lee@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35408> |
||
|---|---|---|
| .. | ||
| bifrost | ||
| test | ||
| valhall | ||
| bi_builder.h.py | ||
| bi_helper_invocations.c | ||
| bi_layout.c | ||
| bi_liveness.c | ||
| bi_lower_divergent_indirects.c | ||
| bi_lower_swizzle.c | ||
| bi_opcodes.c.py | ||
| bi_opcodes.h.py | ||
| bi_opt_constant_fold.c | ||
| bi_opt_copy_prop.c | ||
| bi_opt_cse.c | ||
| bi_opt_dce.c | ||
| bi_opt_dual_tex.c | ||
| bi_opt_mod_props.c | ||
| bi_opt_push_ubo.c | ||
| bi_packer.c.py | ||
| bi_pressure_schedule.c | ||
| bi_print.c | ||
| bi_print_common.c | ||
| bi_print_common.h | ||
| bi_printer.c.py | ||
| bi_quirks.h | ||
| bi_ra.c | ||
| bi_swizzles.c.py | ||
| bi_swizzles.h | ||
| bi_test.h | ||
| bi_validate.c | ||
| bifrost.h | ||
| bifrost_compile.c | ||
| bifrost_compile.h | ||
| bifrost_isa.py | ||
| bifrost_nir.h | ||
| bifrost_nir_algebraic.py | ||
| bir.c | ||
| cmdline.c | ||
| compiler.h | ||
| gen_disasm.py | ||
| IR_pseudo.xml | ||
| meson.build | ||
| nodearray.h | ||
| Notes.txt | ||
| README.md | ||
Bifrost compiler
Register file
Defined partially in software, partially in hardware.
Blend shaders
R0 - R3: input (color #0) R4 - R7: input (color #1) R8 - R15: general purpose R48: return address
Fragment
Anything live during BLEND must respect blend shader registers.
R0 - R3: preloaded (message #0) R4 - R7: preloaded (message #1) R57 - R63: preloaded (various)
R0 - R15: general purpose (full threads) R48 - R63: general purpose (full threads)
R32 - R47: general purpose (half threads, or v6)