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pan: Use a consistent pan_ prefix across src/panfrost/*

Browse source 
We've been inconsistenly using panfrost_ and pan_ as a prefix for
the common helpers/structs. Let's finally make a clear cut by
prefixing everything that lives in src/panfrost/* with pan_.

No functional changes here, this is just renaming and reformatting
changes.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Ryan Mckeever <ryan.mckeever@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34767>
This commit is contained in:
Boris Brezillon 2025-04-30 17:00:38 +02:00
parent a936013311
commit 086bcbe186
114 changed files with 838 additions and 892 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
src/gallium/drivers/lima/lima_draw.c
View file

@ -1091,17 +1091,17 @@ lima_draw_vbo_indexed(struct pipe_context *pctx,
else {
ctx->index_res = lima_resource(info->index.resource);
ctx->index_offset = 0;
needs_indices = !panfrost_minmax_cache_get(ctx->index_res->index_cache, info->index_size,
draw->start, draw->count,
&ctx->min_index, &ctx->max_index);
needs_indices = !pan_minmax_cache_get(ctx->index_res->index_cache, info->index_size,
draw->start, draw->count,
&ctx->min_index, &ctx->max_index);
}
if (needs_indices) {
u_vbuf_get_minmax_index(pctx, info, draw, &ctx->min_index, &ctx->max_index);
if (!info->has_user_indices)
panfrost_minmax_cache_add(ctx->index_res->index_cache, info->index_size,
draw->start, draw->count,
ctx->min_index, ctx->max_index);
pan_minmax_cache_add(ctx->index_res->index_cache, info->index_size,
draw->start, draw->count,
ctx->min_index, ctx->max_index);
}
lima_job_add_bo(job, LIMA_PIPE_GP, ctx->index_res->bo, LIMA_SUBMIT_BO_READ);

18
src/gallium/drivers/lima/lima_resource.c
View file

@ -246,7 +246,7 @@ _lima_resource_create_with_modifiers(struct pipe_screen *pscreen,
res->tiled = should_tile;
if (templat->bind & PIPE_BIND_INDEX_BUFFER)
res->index_cache = CALLOC_STRUCT(panfrost_minmax_cache);
res->index_cache = CALLOC_STRUCT(pan_minmax_cache);
debug_printf("%s: pres=%p width=%u height=%u depth=%u target=%d "
"bind=%x usage=%d tile=%d last_level=%d\n", __func__,
@ -687,7 +687,7 @@ lima_transfer_map(struct pipe_context *pctx,
unsigned i;
for (i = 0; i < ptrans->box.depth; i++)
panfrost_load_tiled_image(
pan_load_tiled_image(
trans->staging + i * ptrans->stride * ptrans->box.height,
bo->map + res->levels[level].offset + (i + box->z) * res->levels[level].layer_stride,
ptrans->box.x, ptrans->box.y,
@ -708,9 +708,9 @@ lima_transfer_map(struct pipe_context *pctx,
ptrans->layer_stride = res->levels[level].layer_stride;
if ((usage & PIPE_MAP_WRITE) && (usage & PIPE_MAP_DIRECTLY))
panfrost_minmax_cache_invalidate(res->index_cache,
util_format_get_blocksize(pres->format),
ptrans->box.x, ptrans->box.width);
pan_minmax_cache_invalidate(res->index_cache,
util_format_get_blocksize(pres->format),
ptrans->box.x, ptrans->box.width);
return bo->map + res->levels[level].offset +
box->z * res->levels[level].layer_stride +
@ -792,7 +792,7 @@ lima_transfer_flush_region(struct pipe_context *pctx,
unsigned row_stride = line_stride * row_height;
for (i = 0; i < trans->base.box.depth; i++)
panfrost_store_tiled_image(
pan_store_tiled_image(
bo->map + res->levels[trans->base.level].offset + (i + trans->base.box.z) * res->levels[trans->base.level].layer_stride,
trans->staging + i * ptrans->stride * ptrans->box.height,
ptrans->box.x, ptrans->box.y,
@ -819,9 +819,9 @@ lima_transfer_unmap(struct pipe_context *pctx,
if (trans->staging)
free(trans->staging);
if (ptrans->usage & PIPE_MAP_WRITE) {
panfrost_minmax_cache_invalidate(res->index_cache,
util_format_get_blocksize(res->base.format),
ptrans->box.x, ptrans->box.width);
pan_minmax_cache_invalidate(res->index_cache,
util_format_get_blocksize(res->base.format),
ptrans->box.x, ptrans->box.width);
}
pipe_resource_reference(&ptrans->resource, NULL);

4
src/gallium/drivers/lima/lima_resource.h
View file

@ -32,7 +32,7 @@
#define LAYOUT_CONVERT_THRESHOLD 8
struct lima_screen;
struct panfrost_minmax_cache;
struct pan_minmax_cache;
struct lima_resource_level {
uint32_t stride;
@ -53,7 +53,7 @@ struct lima_resource {
struct lima_damage_region damage;
struct renderonly_scanout *scanout;
struct lima_bo *bo;
struct panfrost_minmax_cache *index_cache;
struct pan_minmax_cache *index_cache;
uint32_t mrt_pitch;
bool tiled;
bool modifier_constant;

4
src/gallium/drivers/panfrost/pan_blend_cso.c
View file

@ -93,7 +93,7 @@ GENX(pan_blend_get_shader_locked)(struct pan_blend_shader_cache *cache,
nir_metadata_control_flow, NULL);
/* Compile the NIR shader */
struct panfrost_compile_inputs inputs = {
struct pan_compile_inputs inputs = {
.gpu_id = cache->gpu_id,
.is_blend = true,
.blend.nr_samples = key.nr_samples,
@ -123,7 +123,7 @@ GENX(pan_blend_get_shader_locked)(struct pan_blend_shader_cache *cache,
util_dynarray_init(&binary, NULL);
pan_shader_compile(nir, &inputs, &binary, &info);
struct panfrost_ptr bin =
struct pan_ptr bin =
pan_pool_alloc_aligned(cache->bin_pool, binary.size, 64);
memcpy(bin.cpu, binary.data, binary.size);
util_dynarray_fini(&binary);

2
src/gallium/drivers/panfrost/pan_bo.h
View file

@ -100,7 +100,7 @@ struct panfrost_bo {
struct panfrost_device *dev;
/* Mapping for the entire object (all levels) */
struct panfrost_ptr ptr;
struct pan_ptr ptr;
uint32_t flags;

136
src/gallium/drivers/panfrost/pan_cmdstream.c
View file

@ -150,7 +150,7 @@ panfrost_sampler_compare_func(const struct pipe_sampler_state *cso)
{
return !cso->compare_mode
? MALI_FUNC_NEVER
: panfrost_flip_compare_func((enum mali_func)cso->compare_func);
: pan_flip_compare_func((enum mali_func)cso->compare_func);
}
static enum mali_mipmap_mode
@ -187,12 +187,12 @@ pan_afbc_reswizzle_border_color(const struct pipe_sampler_state *cso,
* undo this bijection, by swizzling with its inverse.
*/
unsigned mali_format =
GENX(panfrost_format_from_pipe_format)(cso->border_color_format)->hw;
GENX(pan_format_from_pipe_format)(cso->border_color_format)->hw;
enum mali_rgb_component_order order = mali_format & BITFIELD_MASK(12);
unsigned char inverted_swizzle[4];
panfrost_invert_swizzle(GENX(pan_decompose_swizzle)(order).post,
inverted_swizzle);
pan_invert_swizzle(GENX(pan_decompose_swizzle)(order).post,
inverted_swizzle);
util_format_apply_color_swizzle(&so->base.border_color, &cso->border_color,
inverted_swizzle,
@ -378,8 +378,8 @@ panfrost_emit_blend(struct panfrost_batch *batch, void *rts,
* num_comps must be set to 4
*/
cfg.fixed_function.num_comps = 4;
cfg.fixed_function.conversion.memory_format = GENX(
panfrost_dithered_format_from_pipe_format)(format, dithered);
cfg.fixed_function.conversion.memory_format =
GENX(pan_dithered_format_from_pipe_format)(format, dithered);
cfg.fixed_function.rt = i;
#if PAN_ARCH >= 7
@ -555,7 +555,7 @@ panfrost_prepare_fs_state(struct panfrost_context *ctx, uint64_t *blend_shaders,
}
#elif PAN_ARCH == 5
/* Workaround */
cfg.legacy_blend_shader = panfrost_last_nonnull(blend_shaders, rt_count);
cfg.legacy_blend_shader = pan_last_nonnull(blend_shaders, rt_count);
#endif
cfg.multisample_misc.sample_mask = msaa ? ctx->sample_mask : 0xFFFF;
@ -663,7 +663,7 @@ panfrost_emit_frag_shader_meta(struct panfrost_batch *batch)
panfrost_batch_add_bo(batch, ss->bin.bo, PIPE_SHADER_FRAGMENT);
panfrost_batch_add_bo(batch, ss->state.bo, PIPE_SHADER_FRAGMENT);
struct panfrost_ptr xfer;
struct pan_ptr xfer;
#if PAN_ARCH == 4
xfer = pan_pool_alloc_desc(&batch->pool.base, RENDERER_STATE);
@ -807,7 +807,7 @@ panfrost_emit_viewport(struct panfrost_batch *batch)
batch->maximum_z = maxz;
#if PAN_ARCH <= 7
struct panfrost_ptr T = pan_pool_alloc_desc(&batch->pool.base, VIEWPORT);
struct pan_ptr T = pan_pool_alloc_desc(&batch->pool.base, VIEWPORT);
if (!T.cpu)
return 0;
@ -853,8 +853,7 @@ panfrost_emit_depth_stencil(struct panfrost_batch *batch)
struct panfrost_compiled_shader *fs = ctx->prog[PIPE_SHADER_FRAGMENT];
bool back_enab = zsa->base.stencil[1].enabled;
struct panfrost_ptr T =
pan_pool_alloc_desc(&batch->pool.base, DEPTH_STENCIL);
struct pan_ptr T = pan_pool_alloc_desc(&batch->pool.base, DEPTH_STENCIL);
if (!T.cpu)
return 0;
@ -894,7 +893,7 @@ panfrost_emit_blend_valhall(struct panfrost_batch *batch)
{
unsigned rt_count = MAX2(batch->key.nr_cbufs, 1);
struct panfrost_ptr T =
struct pan_ptr T =
pan_pool_alloc_desc_array(&batch->pool.base, rt_count, BLEND);
if (!T.cpu)
@ -924,7 +923,7 @@ panfrost_emit_vertex_buffers(struct panfrost_batch *batch)
{
struct panfrost_context *ctx = batch->ctx;
unsigned buffer_count = util_last_bit(ctx->vb_mask);
struct panfrost_ptr T =
struct pan_ptr T =
pan_pool_alloc_desc_array(&batch->pool.base, buffer_count, BUFFER);
if (!T.cpu)
@ -972,7 +971,7 @@ panfrost_emit_images(struct panfrost_batch *batch, enum pipe_shader_type stage)
struct panfrost_context *ctx = batch->ctx;
unsigned last_bit = util_last_bit(ctx->image_mask[stage]);
struct panfrost_ptr T =
struct pan_ptr T =
pan_pool_alloc_desc_array(&batch->pool.base, last_bit, TEXTURE);
struct mali_texture_packed *out = (struct mali_texture_packed *)T.cpu;
@ -1228,7 +1227,7 @@ panfrost_upload_sample_positions_sysval(struct panfrost_batch *batch,
unsigned samples = util_framebuffer_get_num_samples(&batch->key);
uniform->du[0] =
dev->sample_positions->ptr.gpu +
panfrost_sample_positions_offset(pan_sample_pattern(samples));
pan_sample_positions_offset(pan_sample_pattern(samples));
}
static void
@ -1264,7 +1263,7 @@ panfrost_upload_rt_conversion_sysval(struct panfrost_batch *batch,
} else {
pan_cast_and_pack(&uniform->u[0], INTERNAL_CONVERSION, cfg)
cfg.memory_format =
GENX(panfrost_format_from_pipe_format)(PIPE_FORMAT_NONE)->hw;
GENX(pan_format_from_pipe_format)(PIPE_FORMAT_NONE)->hw;
}
}
#endif
@ -1426,7 +1425,7 @@ panfrost_emit_ssbos(struct panfrost_batch *batch, enum pipe_shader_type st)
if (!ssbo_count)
return 0;
struct panfrost_ptr ssbos =
struct pan_ptr ssbos =
pan_pool_alloc_desc_array(&batch->pool.base, ssbo_count, BUFFER);
struct mali_buffer_packed *bufs = ssbos.cpu;
@ -1465,7 +1464,7 @@ panfrost_emit_const_buf(struct panfrost_batch *batch,
/* Allocate room for the sysval and the uniforms */
size_t sys_size = sizeof(float) * 4 * ss->sysvals.sysval_count;
struct panfrost_ptr transfer =
struct pan_ptr transfer =
pan_pool_alloc_aligned(&batch->pool.base, sys_size, 16);
if (!transfer.cpu)
@ -1481,7 +1480,7 @@ panfrost_emit_const_buf(struct panfrost_batch *batch,
unsigned ubo_count = shader->info.ubo_count - (sys_size ? 1 : 0);
unsigned sysval_ubo = sys_size ? PAN_UBO_SYSVALS : ~0;
unsigned desc_size;
struct panfrost_ptr ubos = {0};
struct pan_ptr ubos = {0};
#if PAN_ARCH >= 9
desc_size = sizeof(struct mali_buffer_packed);
@ -1542,7 +1541,7 @@ panfrost_emit_const_buf(struct panfrost_batch *batch,
return ubos.gpu;
/* Copy push constants required by the shader */
struct panfrost_ptr push_transfer =
struct pan_ptr push_transfer =
pan_pool_alloc_aligned(&batch->pool.base, ss->info.push.count * 4, 16);
if (!push_transfer.cpu)
@ -1552,7 +1551,7 @@ panfrost_emit_const_buf(struct panfrost_batch *batch,
*push_constants = push_transfer.gpu;
for (unsigned i = 0; i < ss->info.push.count; ++i) {
struct panfrost_ubo_word src = ss->info.push.words[i];
struct pan_ubo_word src = ss->info.push.words[i];
if (src.ubo == sysval_ubo) {
unsigned sysval_idx = src.offset / 16;
@ -1635,8 +1634,7 @@ panfrost_emit_shared_memory(struct panfrost_batch *batch,
struct panfrost_context *ctx = batch->ctx;
struct panfrost_device *dev = pan_device(ctx->base.screen);
struct panfrost_compiled_shader *ss = ctx->prog[PIPE_SHADER_COMPUTE];
struct panfrost_ptr t =
pan_pool_alloc_desc(&batch->pool.base, LOCAL_STORAGE);
struct pan_ptr t = pan_pool_alloc_desc(&batch->pool.base, LOCAL_STORAGE);
struct pan_tls_info info = {
.tls.size = ss->info.tls_size,
@ -1711,7 +1709,7 @@ panfrost_create_sampler_view_bo(struct panfrost_sampler_view *so,
} else if (prsrc->shadow_image) {
prsrc = prsrc->shadow_image;
texture = &prsrc->base;
format = texture ->format;
format = texture->format;
is_shadow = true;
}
@ -1770,8 +1768,7 @@ panfrost_create_sampler_view_bo(struct panfrost_sampler_view *so,
#endif
#if PAN_ARCH == 7
/* v7 requires AFBC reswizzle */
if (!util_format_is_depth_or_stencil(format) &&
!panfrost_format_is_yuv(format) &&
if (!util_format_is_depth_or_stencil(format) && !pan_format_is_yuv(format) &&
pan_format_supports_afbc(PAN_ARCH, format))
GENX(pan_texture_afbc_reswizzle)(&iview);
#endif
@ -1782,7 +1779,7 @@ panfrost_create_sampler_view_bo(struct panfrost_sampler_view *so,
GENX(pan_texture_estimate_payload_size)(&iview);
struct panfrost_pool *pool = so->pool ?: &ctx->descs;
struct panfrost_ptr payload = pan_pool_alloc_aligned(&pool->base, size, 64);
struct pan_ptr payload = pan_pool_alloc_aligned(&pool->base, size, 64);
if (!payload.cpu) {
mesa_loge("panfrost_create_sampler_view_bo failed");
@ -1801,8 +1798,8 @@ panfrost_create_sampler_view_bo(struct panfrost_sampler_view *so,
const struct util_format_description *desc =
util_format_description(format);
if ((device->debug & PAN_DBG_YUV) && panfrost_format_is_yuv(format) &&
!(is_shadow && pan_format_supports_mtk_tiled(format)) ) {
if ((device->debug & PAN_DBG_YUV) && pan_format_is_yuv(format) &&
!(is_shadow && pan_format_supports_mtk_tiled(format))) {
if (desc->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED) {
iview.swizzle[1] = PIPE_SWIZZLE_0;
iview.swizzle[2] = PIPE_SWIZZLE_1;
@ -1870,7 +1867,7 @@ panfrost_emit_texture_descriptors(struct panfrost_batch *batch,
return 0;
#if PAN_ARCH >= 6
struct panfrost_ptr T =
struct pan_ptr T =
pan_pool_alloc_desc_array(&batch->pool.base, alloc_count, TEXTURE);
if (!T.cpu)
@ -1928,7 +1925,7 @@ panfrost_emit_texture_descriptors(struct panfrost_batch *batch,
static uint64_t
panfrost_upload_wa_sampler(struct panfrost_batch *batch)
{
struct panfrost_ptr T = pan_pool_alloc_desc(&batch->pool.base, SAMPLER);
struct pan_ptr T = pan_pool_alloc_desc(&batch->pool.base, SAMPLER);
pan_cast_and_pack(T.cpu, SAMPLER, cfg)
;
return T.gpu;
@ -1944,7 +1941,7 @@ panfrost_emit_sampler_descriptors(struct panfrost_batch *batch,
if (!ctx->sampler_count[stage])
return panfrost_upload_wa_sampler(batch);
struct panfrost_ptr T = pan_pool_alloc_desc_array(
struct pan_ptr T = pan_pool_alloc_desc_array(
&batch->pool.base, ctx->sampler_count[stage], SAMPLER);
if (!T.cpu)
@ -1979,7 +1976,7 @@ emit_image_attribs(struct panfrost_context *ctx, enum pipe_shader_type shader,
/* Continuation record means 2 buffers per image */
cfg.buffer_index = first_buf + (i * 2);
cfg.offset_enable = (PAN_ARCH <= 5);
cfg.format = GENX(panfrost_format_from_pipe_format)(format)->hw;
cfg.format = GENX(pan_format_from_pipe_format)(format)->hw;
}
}
}
@ -2070,12 +2067,13 @@ emit_image_bufs(struct panfrost_batch *batch, enum pipe_shader_type shader,
if (is_msaa) {
if (cfg.r_dimension == 1) {
unsigned slice_stride =
pan_image_surface_stride(&rsrc->image.layout, level);
/* regular multisampled images get the sample index in
the R dimension */
cfg.r_dimension = samples;
cfg.slice_stride =
pan_image_surface_stride(&rsrc->image.layout, level) /
samples;
cfg.slice_stride = slice_stride / samples;
} else {
/* multisampled image arrays are emulated by making the
image "samples" times higher than the original image,
@ -2104,10 +2102,10 @@ panfrost_emit_image_attribs(struct panfrost_batch *batch, uint64_t *buffers,
unsigned attr_count = shader->info.attribute_count;
unsigned buf_count = (attr_count * 2) + (PAN_ARCH >= 6 ? 1 : 0);
struct panfrost_ptr bufs =
struct pan_ptr bufs =
pan_pool_alloc_desc_array(&batch->pool.base, buf_count, ATTRIBUTE_BUFFER);
struct panfrost_ptr attribs =
struct pan_ptr attribs =
pan_pool_alloc_desc_array(&batch->pool.base, attr_count, ATTRIBUTE);
emit_image_attribs(ctx, type, attribs.cpu, 0);
@ -2164,9 +2162,9 @@ panfrost_emit_vertex_data(struct panfrost_batch *batch, uint64_t *buffers)
return 0;
}
struct panfrost_ptr S =
struct pan_ptr S =
pan_pool_alloc_desc_array(&batch->pool.base, nr_bufs, ATTRIBUTE_BUFFER);
struct panfrost_ptr T =
struct pan_ptr T =
pan_pool_alloc_desc_array(&batch->pool.base, count, ATTRIBUTE);
struct mali_attribute_buffer_packed *bufs =
@ -2239,7 +2237,7 @@ panfrost_emit_vertex_data(struct panfrost_batch *batch, uint64_t *buffers)
unsigned shift = 0, extra_flags = 0;
unsigned magic_divisor =
panfrost_compute_magic_divisor(hw_divisor, &shift, &extra_flags);
pan_compute_magic_divisor(hw_divisor, &shift, &extra_flags);
/* Records with continuations must be aligned */
k = ALIGN_POT(k, 2);
@ -2270,18 +2268,18 @@ panfrost_emit_vertex_data(struct panfrost_batch *batch, uint64_t *buffers)
#if PAN_ARCH <= 5
/* Add special gl_VertexID/gl_InstanceID buffers */
if (special_vbufs) {
panfrost_vertex_id(ctx->padded_count,
(struct mali_attribute_vertex_id_packed *)&bufs[k],
ctx->instance_count > 1);
pan_vertex_id(ctx->padded_count,
(struct mali_attribute_vertex_id_packed *)&bufs[k],
ctx->instance_count > 1);
pan_pack(out + PAN_VERTEX_ID, ATTRIBUTE, cfg) {
cfg.buffer_index = k++;
cfg.format = so->formats[PAN_VERTEX_ID];
}
panfrost_instance_id(ctx->padded_count,
(struct mali_attribute_instance_id_packed *)&bufs[k],
ctx->instance_count > 1);
pan_instance_id(ctx->padded_count,
(struct mali_attribute_instance_id_packed *)&bufs[k],
ctx->instance_count > 1);
pan_pack(out + PAN_INSTANCE_ID, ATTRIBUTE, cfg) {
cfg.buffer_index = k++;
@ -2457,7 +2455,7 @@ pan_special_format(const struct panfrost_device *dev,
#if PAN_ARCH <= 6
unsigned nr = pan_varying_formats[buf].components;
format |= panfrost_get_default_swizzle(nr);
format |= pan_get_default_swizzle(nr);
#endif
return format;
@ -2537,7 +2535,7 @@ panfrost_emit_varying(const struct panfrost_device *dev,
*/
gl_varying_slot loc = varying.location;
mali_pixel_format format =
GENX(panfrost_format_from_pipe_format)(pipe_format)->hw;
GENX(pan_format_from_pipe_format)(pipe_format)->hw;
if (util_varying_is_point_coord(loc, point_sprite_mask)) {
pan_emit_vary_special(dev, out, present, PAN_VARY_PNTCOORD);
@ -2574,7 +2572,7 @@ panfrost_emit_varying_descs(struct panfrost_pool *pool,
assert(consumer_count <= ARRAY_SIZE(offsets));
/* Allocate enough descriptors for both shader stages */
struct panfrost_ptr T = pan_pool_alloc_desc_array(
struct pan_ptr T = pan_pool_alloc_desc_array(
&pool->base, producer_count + consumer_count, ATTRIBUTE);
/* Take a reference if we're being put on the CSO */
@ -2679,7 +2677,7 @@ panfrost_emit_varying_descriptor(struct panfrost_batch *batch,
unsigned present = linkage->present, stride = linkage->stride;
unsigned count = util_bitcount(present);
struct panfrost_ptr T =
struct pan_ptr T =
pan_pool_alloc_desc_array(&batch->pool.base, count + 1, ATTRIBUTE_BUFFER);
if (!T.cpu) {
@ -2742,14 +2740,13 @@ get_tls_info(struct panfrost_device *dev, struct panfrost_batch *batch)
{
struct panfrost_bo *tls_bo = NULL;
if (batch->stack_size) {
tls_bo = panfrost_batch_get_scratchpad(batch, batch->stack_size,
dev->thread_tls_alloc,
dev->core_id_range);
tls_bo = panfrost_batch_get_scratchpad(
batch, batch->stack_size, dev->thread_tls_alloc, dev->core_id_range);
if (!tls_bo)
mesa_loge("failed to allocate scratch-pad memory for stack");
}
return (struct pan_tls_info) {
return (struct pan_tls_info){
.tls =
{
.ptr = tls_bo ? tls_bo->ptr.gpu : 0,
@ -2758,7 +2755,6 @@ get_tls_info(struct panfrost_device *dev, struct panfrost_batch *batch)
};
}
static void
emit_tls(struct panfrost_batch *batch)
{
@ -2784,7 +2780,7 @@ emit_fbd(struct panfrost_batch *batch, struct pan_fb_info *fb)
#if PAN_ARCH >= 6
fb->sample_positions =
dev->sample_positions->ptr.gpu +
panfrost_sample_positions_offset(pan_sample_pattern(fb->nr_samples));
pan_sample_positions_offset(pan_sample_pattern(fb->nr_samples));
#endif
JOBX(emit_fbds)(batch, fb, &tls);
@ -2909,7 +2905,7 @@ panfrost_emit_varying_descriptors(struct panfrost_batch *batch)
const uint32_t fs_in_slots = fs->info.varyings.input_count +
util_bitcount(fs_in_mask);
struct panfrost_ptr bufs =
struct pan_ptr bufs =
pan_pool_alloc_desc_array(&batch->pool.base, fs_in_slots, ATTRIBUTE);
struct mali_attribute_packed *descs = bufs.cpu;
@ -2932,7 +2928,7 @@ panfrost_emit_varying_descriptors(struct panfrost_batch *batch)
pan_pack(&descs[i], ATTRIBUTE, cfg) {
cfg.attribute_type = MALI_ATTRIBUTE_TYPE_VERTEX_PACKET;
cfg.offset_enable = false;
cfg.format = GENX(panfrost_format_from_pipe_format)(var->format)->hw;
cfg.format = GENX(pan_format_from_pipe_format)(var->format)->hw;
cfg.table = 61;
cfg.frequency = MALI_ATTRIBUTE_FREQUENCY_VERTEX;
cfg.offset = 1024 + (index * 16);
@ -3198,7 +3194,7 @@ panfrost_draw_get_vertex_count(struct panfrost_batch *batch,
if (idvs)
count = ALIGN_POT(count, 4);
ctx->padded_count = panfrost_padded_vertex_count(count);
ctx->padded_count = pan_padded_vertex_count(count);
} else {
ctx->padded_count = vertex_count;
}
@ -3764,7 +3760,7 @@ panfrost_pack_attribute(struct panfrost_device *dev,
cfg.frequency = (el.instance_divisor > 0)
? MALI_ATTRIBUTE_FREQUENCY_INSTANCE
: MALI_ATTRIBUTE_FREQUENCY_VERTEX;
cfg.format = GENX(panfrost_format_from_pipe_format)(el.src_format)->hw;
cfg.format = GENX(pan_format_from_pipe_format)(el.src_format)->hw;
cfg.offset = el.src_offset;
cfg.buffer_index = el.vertex_buffer_index;
cfg.stride = el.src_stride;
@ -3784,7 +3780,7 @@ panfrost_pack_attribute(struct panfrost_device *dev,
cfg.attribute_type = MALI_ATTRIBUTE_TYPE_1D_NPOT_DIVISOR;
cfg.frequency = MALI_ATTRIBUTE_FREQUENCY_INSTANCE;
cfg.divisor_d = panfrost_compute_magic_divisor(
cfg.divisor_d = pan_compute_magic_divisor(
el.instance_divisor, &cfg.divisor_r, &cfg.divisor_e);
}
}
@ -3820,16 +3816,16 @@ panfrost_create_vertex_elements_state(struct pipe_context *pctx,
for (int i = 0; i < num_elements; ++i) {
enum pipe_format fmt = elements[i].src_format;
so->formats[i] = GENX(panfrost_format_from_pipe_format)(fmt)->hw;
so->formats[i] = GENX(pan_format_from_pipe_format)(fmt)->hw;
assert(MALI_EXTRACT_INDEX(so->formats[i]) && "format must be supported");
}
/* Let's also prepare vertex builtins */
so->formats[PAN_VERTEX_ID] =
GENX(panfrost_format_from_pipe_format)(PIPE_FORMAT_R32_UINT)->hw;
GENX(pan_format_from_pipe_format)(PIPE_FORMAT_R32_UINT)->hw;
so->formats[PAN_INSTANCE_ID] =
GENX(panfrost_format_from_pipe_format)(PIPE_FORMAT_R32_UINT)->hw;
GENX(pan_format_from_pipe_format)(PIPE_FORMAT_R32_UINT)->hw;
#endif
return so;
@ -3976,8 +3972,7 @@ panfrost_create_sampler_view(struct pipe_context *pctx,
rzalloc(pctx, struct panfrost_sampler_view);
struct panfrost_resource *ptexture = pan_resource(texture);
pan_legalize_format(ctx, ptexture, template->format, false,
false);
pan_legalize_format(ctx, ptexture, template->format, false, false);
pipe_reference(NULL, &texture->reference);
so->base = *template;
@ -4120,8 +4115,7 @@ prepare_shader(struct panfrost_compiled_shader *state,
(struct mali_renderer_state_packed *)&state->partial_rsd;
if (upload) {
struct panfrost_ptr ptr =
pan_pool_alloc_desc(&pool->base, RENDERER_STATE);
struct pan_ptr ptr = pan_pool_alloc_desc(&pool->base, RENDERER_STATE);
state->state = panfrost_pool_take_ref(pool, ptr.gpu);
out = ptr.cpu;
@ -4150,7 +4144,7 @@ prepare_shader(struct panfrost_compiled_shader *state,
unsigned nr_variants = secondary_enable ? 3 : vs ? 2 : 1;
#endif
struct panfrost_ptr ptr =
struct pan_ptr ptr =
pan_pool_alloc_desc_array(&pool->base, nr_variants, SHADER_PROGRAM);
state->state = panfrost_pool_take_ref(pool, ptr.gpu);
@ -4272,7 +4266,7 @@ batch_get_polygon_list(struct panfrost_batch *batch)
if (!batch->tiler_ctx.midgard.polygon_list) {
bool has_draws = batch->draw_count > 0;
unsigned size = panfrost_tiler_get_polygon_list_size(
unsigned size = pan_tiler_get_polygon_list_size(
batch->key.width, batch->key.height, batch->vertex_count,
!dev->model->quirks.no_hierarchical_tiling);

38
src/gallium/drivers/panfrost/pan_cmdstream.h
View file

@ -284,7 +284,7 @@ panfrost_emit_resources(struct panfrost_batch *batch,
enum pipe_shader_type stage)
{
struct panfrost_context *ctx = batch->ctx;
struct panfrost_ptr T;
struct pan_ptr T;
unsigned nr_tables = PAN_NUM_RESOURCE_TABLES;
/* Although individual resources need only 16 byte alignment, the
@ -297,35 +297,33 @@ panfrost_emit_resources(struct panfrost_batch *batch,
memset(T.cpu, 0, nr_tables * pan_size(RESOURCE));
panfrost_make_resource_table(T, PAN_TABLE_UBO, batch->uniform_buffers[stage],
batch->nr_uniform_buffers[stage]);
pan_make_resource_table(T, PAN_TABLE_UBO, batch->uniform_buffers[stage],
batch->nr_uniform_buffers[stage]);
panfrost_make_resource_table(T, PAN_TABLE_TEXTURE, batch->textures[stage],
ctx->sampler_view_count[stage]);
pan_make_resource_table(T, PAN_TABLE_TEXTURE, batch->textures[stage],
ctx->sampler_view_count[stage]);
/* We always need at least 1 sampler for txf to work */
panfrost_make_resource_table(T, PAN_TABLE_SAMPLER, batch->samplers[stage],
MAX2(ctx->sampler_count[stage], 1));
pan_make_resource_table(T, PAN_TABLE_SAMPLER, batch->samplers[stage],
MAX2(ctx->sampler_count[stage], 1));
panfrost_make_resource_table(T, PAN_TABLE_IMAGE, batch->images[stage],
util_last_bit(ctx->image_mask[stage]));
pan_make_resource_table(T, PAN_TABLE_IMAGE, batch->images[stage],
util_last_bit(ctx->image_mask[stage]));
if (stage == PIPE_SHADER_FRAGMENT) {
panfrost_make_resource_table(T, PAN_TABLE_ATTRIBUTE,
batch->attribs[stage],
batch->nr_varying_attribs[PIPE_SHADER_FRAGMENT]);
pan_make_resource_table(T, PAN_TABLE_ATTRIBUTE, batch->attribs[stage],
batch->nr_varying_attribs[PIPE_SHADER_FRAGMENT]);
} else if (stage == PIPE_SHADER_VERTEX) {
panfrost_make_resource_table(T, PAN_TABLE_ATTRIBUTE,
batch->attribs[stage],
ctx->vertex->num_elements);
pan_make_resource_table(T, PAN_TABLE_ATTRIBUTE, batch->attribs[stage],
ctx->vertex->num_elements);
panfrost_make_resource_table(T, PAN_TABLE_ATTRIBUTE_BUFFER,
batch->attrib_bufs[stage],
util_last_bit(ctx->vb_mask));
pan_make_resource_table(T, PAN_TABLE_ATTRIBUTE_BUFFER,
batch->attrib_bufs[stage],
util_last_bit(ctx->vb_mask));
}
panfrost_make_resource_table(T, PAN_TABLE_SSBO, batch->ssbos[stage],
util_last_bit(ctx->ssbo_mask[stage]));
pan_make_resource_table(T, PAN_TABLE_SSBO, batch->ssbos[stage],
util_last_bit(ctx->ssbo_mask[stage]));
return T.gpu | nr_tables;
}

2
src/gallium/drivers/panfrost/pan_context.c
View file

@ -49,7 +49,7 @@
#include "util/u_vbuf.h"
#include "util/perf/cpu_trace.h"
#include "clc/panfrost_compile.h"
#include "clc/pan_compile.h"
#include "compiler/nir/nir_serialize.h"
#include "util/pan_lower_framebuffer.h"
#include "decode.h"

6
src/gallium/drivers/panfrost/pan_context.h
View file

@ -469,7 +469,7 @@ bool panfrost_nir_lower_sysvals(nir_shader *s, unsigned arch,
struct panfrost_sysvals *sysvals);
bool panfrost_nir_lower_res_indices(nir_shader *shader,
struct panfrost_compile_inputs *inputs);
struct pan_compile_inputs *inputs);
/** (Vertex buffer index, divisor) tuple that will become an Attribute Buffer
* Descriptor at draw-time on Midgard
@ -505,8 +505,8 @@ struct pipe_context *panfrost_create_context(struct pipe_screen *screen,
bool panfrost_writes_point_size(struct panfrost_context *ctx);
struct panfrost_ptr panfrost_vertex_tiler_job(struct panfrost_context *ctx,
bool is_tiler);
struct pan_ptr panfrost_vertex_tiler_job(struct panfrost_context *ctx,
bool is_tiler);
void panfrost_flush(struct pipe_context *pipe, struct pipe_fence_handle **fence,
unsigned flags);

15
src/gallium/drivers/panfrost/pan_csf.c
View file

@ -46,7 +46,7 @@ csf_alloc_cs_buffer(void *cookie)
struct panfrost_batch *batch = cookie;
unsigned capacity = 4096;
struct panfrost_ptr ptr =
struct pan_ptr ptr =
pan_pool_alloc_aligned(&batch->csf.cs_chunk_pool.base, capacity * 8, 64);
return (struct cs_buffer){
@ -89,8 +89,8 @@ csf_update_tiler_oom_ctx(struct cs_builder *b, uint64_t addr)
#define FBD_OFFSET(_pass) \
(FIELD_OFFSET(fbds) + \
(PAN_INCREMENTAL_RENDERING_##_pass##_PASS * sizeof(struct panfrost_ptr)) + \
offsetof(struct panfrost_ptr, gpu))
(PAN_INCREMENTAL_RENDERING_##_pass##_PASS * sizeof(struct pan_ptr)) + \
offsetof(struct pan_ptr, gpu))
static int
csf_oom_handler_init(struct panfrost_context *ctx)
@ -229,7 +229,7 @@ GENX(csf_cleanup_batch)(struct panfrost_batch *batch)
panfrost_pool_cleanup(&batch->csf.cs_chunk_pool);
}
static inline struct panfrost_ptr
static inline struct pan_ptr
alloc_fbd(struct panfrost_batch *batch)
{
return pan_pool_alloc_desc_aggregate(
@ -665,8 +665,7 @@ csf_get_tiler_desc(struct panfrost_batch *batch)
if (batch->tiler_ctx.valhall.desc)
return batch->tiler_ctx.valhall.desc;
struct panfrost_ptr t =
pan_pool_alloc_desc(&batch->pool.base, TILER_CONTEXT);
struct pan_ptr t = pan_pool_alloc_desc(&batch->pool.base, TILER_CONTEXT);
batch->csf.pending_tiler_desc = t.cpu;
batch->tiler_ctx.valhall.desc = t.gpu;
@ -928,8 +927,8 @@ GENX(csf_launch_grid)(struct panfrost_batch *batch,
cs_move32_to(b, cs_sr_reg32(b, COMPUTE, JOB_OFFSET_Z), 0);
unsigned threads_per_wg = info->block[0] * info->block[1] * info->block[2];
unsigned max_thread_cnt = panfrost_compute_max_thread_count(
&dev->kmod.props, cs->info.work_reg_count);
unsigned max_thread_cnt =
pan_compute_max_thread_count(&dev->kmod.props, cs->info.work_reg_count);
if (info->indirect) {
/* Load size in workgroups per dimension from memory */

6
src/gallium/drivers/panfrost/pan_csf.h
View file

@ -46,7 +46,7 @@ struct pan_csf_tiler_oom_ctx {
uint32_t counter;
/* Alternative framebuffer descriptors for incremental rendering */
struct panfrost_ptr fbds[PAN_INCREMENTAL_RENDERING_PASS_COUNT];
struct pan_ptr fbds[PAN_INCREMENTAL_RENDERING_PASS_COUNT];
/* Bounding Box (Register 42 and 43) */
uint32_t bbox_min;
@ -67,13 +67,13 @@ struct panfrost_csf_batch {
/* CS state, written through the CS, and checked when PAN_MESA_DEBUG=sync.
*/
struct panfrost_ptr state;
struct pan_ptr state;
} cs;
/* Pool used to allocate CS chunks. */
struct panfrost_pool cs_chunk_pool;
struct panfrost_ptr tiler_oom_ctx;
struct pan_ptr tiler_oom_ctx;
struct mali_tiler_context_packed *pending_tiler_desc;
};

33
src/gallium/drivers/panfrost/pan_device.c
View file

@ -63,8 +63,8 @@ panfrost_open_device(void *memctx, int fd, struct panfrost_device *dev)
pan_kmod_dev_query_props(dev->kmod.dev, &dev->kmod.props);
dev->arch = pan_arch(dev->kmod.props.gpu_prod_id);
dev->model = panfrost_get_model(dev->kmod.props.gpu_prod_id,
dev->kmod.props.gpu_variant);
dev->model =
pan_get_model(dev->kmod.props.gpu_prod_id, dev->kmod.props.gpu_variant);
/* If we don't recognize the model, bail early */
if (!dev->model)
@ -74,9 +74,9 @@ panfrost_open_device(void *memctx, int fd, struct panfrost_device *dev)
* things so it matches kmod VA range limitations.
*/
uint64_t user_va_start =
panfrost_clamp_to_usable_va_range(dev->kmod.dev, PAN_VA_USER_START);
pan_clamp_to_usable_va_range(dev->kmod.dev, PAN_VA_USER_START);
uint64_t user_va_end =
panfrost_clamp_to_usable_va_range(dev->kmod.dev, PAN_VA_USER_END);
pan_clamp_to_usable_va_range(dev->kmod.dev, PAN_VA_USER_END);
dev->kmod.vm = pan_kmod_vm_create(
dev->kmod.dev, PAN_KMOD_VM_FLAG_AUTO_VA | PAN_KMOD_VM_FLAG_TRACK_ACTIVITY,
@ -85,17 +85,16 @@ panfrost_open_device(void *memctx, int fd, struct panfrost_device *dev)
goto err_free_kmod_dev;
dev->core_count =
panfrost_query_core_count(&dev->kmod.props, &dev->core_id_range);
dev->thread_tls_alloc = panfrost_query_thread_tls_alloc(&dev->kmod.props);
dev->optimal_tib_size = panfrost_query_optimal_tib_size(dev->model);
dev->optimal_z_tib_size = panfrost_query_optimal_z_tib_size(dev->model);
dev->compressed_formats =
panfrost_query_compressed_formats(&dev->kmod.props);
dev->tiler_features = panfrost_query_tiler_features(&dev->kmod.props);
dev->has_afbc = panfrost_query_afbc(&dev->kmod.props);
dev->has_afrc = panfrost_query_afrc(&dev->kmod.props);
dev->formats = panfrost_format_table(dev->arch);
dev->blendable_formats = panfrost_blendable_format_table(dev->arch);
pan_query_core_count(&dev->kmod.props, &dev->core_id_range);
dev->thread_tls_alloc = pan_query_thread_tls_alloc(&dev->kmod.props);
dev->optimal_tib_size = pan_query_optimal_tib_size(dev->model);
dev->optimal_z_tib_size = pan_query_optimal_z_tib_size(dev->model);
dev->compressed_formats = pan_query_compressed_formats(&dev->kmod.props);
dev->tiler_features = pan_query_tiler_features(&dev->kmod.props);
dev->has_afbc = pan_query_afbc(&dev->kmod.props);
dev->has_afrc = pan_query_afrc(&dev->kmod.props);
dev->formats = pan_format_table(dev->arch);
dev->blendable_formats = pan_blendable_format_table(dev->arch);
util_sparse_array_init(&dev->bo_map, sizeof(struct panfrost_bo), 512);
@ -128,11 +127,11 @@ panfrost_open_device(void *memctx, int fd, struct panfrost_device *dev)
/* Done once on init */
dev->sample_positions = panfrost_bo_create(
dev, panfrost_sample_positions_buffer_size(), 0, "Sample positions");
dev, pan_sample_positions_buffer_size(), 0, "Sample positions");
if (!dev->sample_positions)
goto err_free_kmod_dev;
panfrost_upload_sample_positions(dev->sample_positions->ptr.cpu);
pan_upload_sample_positions(dev->sample_positions->ptr.cpu);
return 0;
err_free_kmod_dev:

6
src/gallium/drivers/panfrost/pan_device.h
View file

@ -116,13 +116,13 @@ struct panfrost_device {
unsigned optimal_z_tib_size;
unsigned thread_tls_alloc;
struct panfrost_tiler_features tiler_features;
const struct panfrost_model *model;
struct pan_tiler_features tiler_features;
const struct pan_model *model;
bool has_afbc;
bool has_afrc;
/* Table of formats, indexed by a PIPE format */
const struct panfrost_format *formats;
const struct pan_format *formats;
const struct pan_blendable_format *blendable_formats;
/* Bitmask of supported compressed texture formats */

85
src/gallium/drivers/panfrost/pan_fb_preload.c
View file

@ -153,8 +153,8 @@ pan_preload_emit_blend(unsigned rt,
nir_alu_type type = preload_shader->key.surfaces[rt].type;
cfg.internal.fixed_function.num_comps = 4;
cfg.internal.fixed_function.conversion.memory_format = GENX(
panfrost_dithered_format_from_pipe_format)(iview->format, false);
cfg.internal.fixed_function.conversion.memory_format =
GENX(pan_dithered_format_from_pipe_format)(iview->format, false);
cfg.internal.fixed_function.conversion.register_format =
nir_type_to_reg_fmt(type);
@ -262,7 +262,7 @@ pan_preload_emit_rsd(const struct pan_preload_shader_data *preload_shader,
uint64_t blend_shader =
blend_shaders
? panfrost_last_nonnull(blend_shaders, MAX2(views->rt_count, 1))
? pan_last_nonnull(blend_shaders, MAX2(views->rt_count, 1))
: 0;
cfg.properties.work_register_count = 4;
@ -320,7 +320,7 @@ pan_preload_get_blend_shaders(struct pan_fb_preload_cache *cache,
};
for (unsigned i = 0; i < rt_count; i++) {
if (!rts[i] || panfrost_blendable_formats_v7[rts[i]->format].internal)
if (!rts[i] || pan_blendable_formats_v7[rts[i]->format].internal)
continue;
blend_state.rts[i] = (struct pan_blend_rt_state){
@ -494,7 +494,6 @@ pan_preload_get_shader(struct pan_fb_preload_cache *cache,
break;
}
nir_tex_instr *tex = nir_tex_instr_create(b.shader, ms ? 3 : 1);
tex->dest_type = key->surfaces[i].type;
@ -544,7 +543,7 @@ pan_preload_get_shader(struct pan_fb_preload_cache *cache,
active_count++;
}
struct panfrost_compile_inputs inputs = {
struct pan_compile_inputs inputs = {
.gpu_id = cache->gpu_id,
.is_blit = true,
.no_idvs = true,
@ -682,13 +681,13 @@ pan_preload_get_rsd(struct pan_fb_preload_cache *cache,
rsd->key = rsd_key;
#if PAN_ARCH == 4
struct panfrost_ptr rsd_ptr =
struct pan_ptr rsd_ptr =
pan_pool_alloc_desc(cache->rsds.pool, RENDERER_STATE);
#else
unsigned bd_count = PAN_ARCH >= 5 ? MAX2(views->rt_count, 1) : 0;
struct panfrost_ptr rsd_ptr = pan_pool_alloc_desc_aggregate(
cache->rsds.pool, PAN_DESC(RENDERER_STATE),
PAN_DESC_ARRAY(bd_count, BLEND));
struct pan_ptr rsd_ptr =
pan_pool_alloc_desc_aggregate(cache->rsds.pool, PAN_DESC(RENDERER_STATE),
PAN_DESC_ARRAY(bd_count, BLEND));
#endif
if (!rsd_ptr.cpu)
@ -780,7 +779,7 @@ pan_preload_needed(const struct pan_fb_info *fb, bool zs)
static uint64_t
pan_preload_emit_varying(struct pan_pool *pool)
{
struct panfrost_ptr varying = pan_pool_alloc_desc(pool, ATTRIBUTE);
struct pan_ptr varying = pan_pool_alloc_desc(pool, ATTRIBUTE);
if (!varying.cpu)
return 0;
@ -789,7 +788,7 @@ pan_preload_emit_varying(struct pan_pool *pool)
cfg.buffer_index = 0;
cfg.offset_enable = PAN_ARCH <= 5;
cfg.format =
GENX(panfrost_format_from_pipe_format)(PIPE_FORMAT_R32G32B32_FLOAT)->hw;
GENX(pan_format_from_pipe_format)(PIPE_FORMAT_R32G32B32_FLOAT)->hw;
#if PAN_ARCH >= 9
cfg.attribute_type = MALI_ATTRIBUTE_TYPE_1D;
@ -806,7 +805,7 @@ static uint64_t
pan_preload_emit_varying_buffer(struct pan_pool *pool, uint64_t coordinates)
{
#if PAN_ARCH >= 9
struct panfrost_ptr varying_buffer = pan_pool_alloc_desc(pool, BUFFER);
struct pan_ptr varying_buffer = pan_pool_alloc_desc(pool, BUFFER);
if (!varying_buffer.cpu)
return 0;
@ -819,7 +818,7 @@ pan_preload_emit_varying_buffer(struct pan_pool *pool, uint64_t coordinates)
/* Bifrost needs an empty desc to mark end of prefetching */
bool padding_buffer = PAN_ARCH >= 6;
struct panfrost_ptr varying_buffer = pan_pool_alloc_desc_array(
struct pan_ptr varying_buffer = pan_pool_alloc_desc_array(
pool, (padding_buffer ? 2 : 1), ATTRIBUTE_BUFFER);
if (!varying_buffer.cpu)
@ -844,7 +843,7 @@ pan_preload_emit_varying_buffer(struct pan_pool *pool, uint64_t coordinates)
static uint64_t
pan_preload_emit_sampler(struct pan_pool *pool, bool nearest_filter)
{
struct panfrost_ptr sampler = pan_pool_alloc_desc(pool, SAMPLER);
struct pan_ptr sampler = pan_pool_alloc_desc(pool, SAMPLER);
if (!sampler.cpu)
return 0;
@ -920,7 +919,7 @@ pan_preload_emit_textures(struct pan_pool *pool, const struct pan_fb_info *fb,
const struct pan_image_view *view = fb->rts[i].view;
#if PAN_ARCH == 7
/* v7 requires AFBC reswizzle. */
if (!panfrost_format_is_yuv(view->format) &&
if (!pan_format_is_yuv(view->format) &&
pan_format_supports_afbc(PAN_ARCH, view->format)) {
struct pan_image_view *pview = &patched_views[patched_count++];
*pview = *view;
@ -936,7 +935,7 @@ pan_preload_emit_textures(struct pan_pool *pool, const struct pan_fb_info *fb,
*tex_count_out = tex_count;
#if PAN_ARCH >= 6
struct panfrost_ptr textures =
struct pan_ptr textures =
pan_pool_alloc_desc_array(pool, tex_count, TEXTURE);
if (!textures.cpu)
@ -946,8 +945,7 @@ pan_preload_emit_textures(struct pan_pool *pool, const struct pan_fb_info *fb,
void *texture = textures.cpu + (pan_size(TEXTURE) * i);
size_t payload_size =
GENX(pan_texture_estimate_payload_size)(views[i]);
struct panfrost_ptr surfaces =
pan_pool_alloc_aligned(pool, payload_size, 64);
struct pan_ptr surfaces = pan_pool_alloc_aligned(pool, payload_size, 64);
GENX(pan_texture_emit)(views[i], texture, &surfaces);
}
@ -959,9 +957,9 @@ pan_preload_emit_textures(struct pan_pool *pool, const struct pan_fb_info *fb,
for (unsigned i = 0; i < tex_count; i++) {
size_t sz = pan_size(TEXTURE) +
GENX(pan_texture_estimate_payload_size)(views[i]);
struct panfrost_ptr texture =
struct pan_ptr texture =
pan_pool_alloc_aligned(pool, sz, pan_alignment(TEXTURE));
struct panfrost_ptr surfaces = {
struct pan_ptr surfaces = {
.cpu = texture.cpu + pan_size(TEXTURE),
.gpu = texture.gpu + pan_size(TEXTURE),
};
@ -980,7 +978,7 @@ pan_preload_emit_textures(struct pan_pool *pool, const struct pan_fb_info *fb,
static uint64_t
pan_preload_emit_zs(struct pan_pool *pool, bool z, bool s)
{
struct panfrost_ptr zsd = pan_pool_alloc_desc(pool, DEPTH_STENCIL);
struct pan_ptr zsd = pan_pool_alloc_desc(pool, DEPTH_STENCIL);
if (!zsd.cpu)
return 0;
@ -1019,7 +1017,7 @@ static uint64_t
pan_preload_emit_viewport(struct pan_pool *pool, uint16_t minx, uint16_t miny,
uint16_t maxx, uint16_t maxy)
{
struct panfrost_ptr vp = pan_pool_alloc_desc(pool, VIEWPORT);
struct pan_ptr vp = pan_pool_alloc_desc(pool, VIEWPORT);
if (!vp.cpu)
return 0;
@ -1091,7 +1089,7 @@ pan_preload_emit_dcd(struct pan_fb_preload_cache *cache, struct pan_pool *pool,
#endif
}
#else
struct panfrost_ptr T;
struct pan_ptr T;
unsigned nr_tables = PAN_BLIT_NUM_RESOURCE_TABLES;
/* Although individual resources need only 16 byte alignment, the
@ -1100,11 +1098,11 @@ pan_preload_emit_dcd(struct pan_fb_preload_cache *cache, struct pan_pool *pool,
T = pan_pool_alloc_aligned(pool, nr_tables * pan_size(RESOURCE), 64);
memset(T.cpu, 0, nr_tables * pan_size(RESOURCE));
panfrost_make_resource_table(T, PAN_BLIT_TABLE_TEXTURE, textures, tex_count);
panfrost_make_resource_table(T, PAN_BLIT_TABLE_SAMPLER, samplers, 1);
panfrost_make_resource_table(T, PAN_BLIT_TABLE_ATTRIBUTE, varyings, 1);
panfrost_make_resource_table(T, PAN_BLIT_TABLE_ATTRIBUTE_BUFFER,
varying_buffers, 1);
pan_make_resource_table(T, PAN_BLIT_TABLE_TEXTURE, textures, tex_count);
pan_make_resource_table(T, PAN_BLIT_TABLE_SAMPLER, samplers, 1);
pan_make_resource_table(T, PAN_BLIT_TABLE_ATTRIBUTE, varyings, 1);
pan_make_resource_table(T, PAN_BLIT_TABLE_ATTRIBUTE_BUFFER, varying_buffers,
1);
struct pan_preload_shader_key key = pan_preload_get_key(&views);
const struct pan_preload_shader_data *preload_shader =
@ -1114,7 +1112,7 @@ pan_preload_emit_dcd(struct pan_fb_preload_cache *cache, struct pan_pool *pool,
bool s = fb->zs.preload.s;
bool ms = pan_preload_is_ms(&views);
struct panfrost_ptr spd = pan_pool_alloc_desc(pool, SHADER_PROGRAM);
struct pan_ptr spd = pan_pool_alloc_desc(pool, SHADER_PROGRAM);
if (!spd.cpu) {
mesa_loge("pan_pool_alloc_desc failed");
@ -1130,7 +1128,7 @@ pan_preload_emit_dcd(struct pan_fb_preload_cache *cache, struct pan_pool *pool,
}
unsigned bd_count = views.rt_count;
struct panfrost_ptr blend = pan_pool_alloc_desc_array(pool, bd_count, BLEND);
struct pan_ptr blend = pan_pool_alloc_desc_array(pool, bd_count, BLEND);
if (!blend.cpu) {
mesa_loge("pan_pool_alloc_desc_array failed");
@ -1271,15 +1269,15 @@ pan_preload_emit_pre_frame_dcd(struct pan_fb_preload_cache *cache,
}
}
#else
static struct panfrost_ptr
pan_preload_emit_tiler_job(struct pan_fb_preload_cache *cache, struct pan_pool *desc_pool,
struct pan_fb_info *fb, bool zs, uint64_t coords,
uint64_t tsd)
static struct pan_ptr
pan_preload_emit_tiler_job(struct pan_fb_preload_cache *cache,
struct pan_pool *desc_pool, struct pan_fb_info *fb,
bool zs, uint64_t coords, uint64_t tsd)
{
struct panfrost_ptr job = pan_pool_alloc_desc(desc_pool, TILER_JOB);
struct pan_ptr job = pan_pool_alloc_desc(desc_pool, TILER_JOB);
if (!job.cpu)
return (struct panfrost_ptr){0};
return (struct pan_ptr){0};
pan_preload_emit_dcd(cache, desc_pool, fb, zs, coords, tsd,
pan_section_ptr(job.cpu, TILER_JOB, DRAW), false);
@ -1295,18 +1293,18 @@ pan_preload_emit_tiler_job(struct pan_fb_preload_cache *cache, struct pan_pool *
}
void *invoc = pan_section_ptr(job.cpu, TILER_JOB, INVOCATION);
panfrost_pack_work_groups_compute(invoc, 1, 4, 1, 1, 1, 1, true, false);
pan_pack_work_groups_compute(invoc, 1, 4, 1, 1, 1, 1, true, false);
return job;
}
#endif
static struct panfrost_ptr
static struct pan_ptr
pan_preload_fb_part(struct pan_fb_preload_cache *cache, struct pan_pool *pool,
struct pan_fb_info *fb, bool zs, uint64_t coords,
uint64_t tsd)
{
struct panfrost_ptr job = {0};
struct pan_ptr job = {0};
#if PAN_ARCH >= 6
pan_preload_emit_pre_frame_dcd(cache, pool, fb, zs, coords, tsd);
@ -1318,8 +1316,7 @@ pan_preload_fb_part(struct pan_fb_preload_cache *cache, struct pan_pool *pool,
unsigned
GENX(pan_preload_fb)(struct pan_fb_preload_cache *cache, struct pan_pool *pool,
struct pan_fb_info *fb, uint64_t tsd,
struct panfrost_ptr *jobs)
struct pan_fb_info *fb, uint64_t tsd, struct pan_ptr *jobs)
{
bool preload_zs = pan_preload_needed(fb, true);
bool preload_rts = pan_preload_needed(fb, false);
@ -1339,14 +1336,14 @@ GENX(pan_preload_fb)(struct pan_fb_preload_cache *cache, struct pan_pool *pool,
unsigned njobs = 0;
if (preload_zs) {
struct panfrost_ptr job =
struct pan_ptr job =
pan_preload_fb_part(cache, pool, fb, true, coords, tsd);
if (jobs && job.cpu)
jobs[njobs++] = job;
}
if (preload_rts) {
struct panfrost_ptr job =
struct pan_ptr job =
pan_preload_fb_part(cache, pool, fb, false, coords, tsd);
if (jobs && job.cpu)
jobs[njobs++] = job;

2
src/gallium/drivers/panfrost/pan_fb_preload.h
View file

@ -61,7 +61,7 @@ void GENX(pan_fb_preload_cache_cleanup)(struct pan_fb_preload_cache *cache);
unsigned GENX(pan_preload_fb)(struct pan_fb_preload_cache *cache,
struct pan_pool *desc_pool,
struct pan_fb_info *fb, uint64_t tsd,
struct panfrost_ptr *jobs);
struct pan_ptr *jobs);
#endif
#endif

13
src/gallium/drivers/panfrost/pan_helpers.c
View file

@ -109,7 +109,7 @@ panfrost_get_index_buffer(struct panfrost_batch *batch,
} else {
/* Otherwise, we need to upload to transient memory */
const uint8_t *ibuf8 = (const uint8_t *)info->index.user;
struct panfrost_ptr T = pan_pool_alloc_aligned(
struct pan_ptr T = pan_pool_alloc_aligned(
&batch->pool.base, draw->count * info->index_size, info->index_size);
memcpy(T.cpu, ibuf8 + offset, draw->count * info->index_size);
@ -145,9 +145,9 @@ panfrost_get_index_buffer_bounded(struct panfrost_batch *batch,
needs_indices = false;
} else if (!info->has_user_indices) {
/* Check the cache */
needs_indices = !panfrost_minmax_cache_get(
rsrc->index_cache, info->index_size, draw->start, draw->count,
min_index, max_index);
needs_indices =
!pan_minmax_cache_get(rsrc->index_cache, info->index_size, draw->start,
draw->count, min_index, max_index);
}
if (needs_indices) {
@ -155,9 +155,8 @@ panfrost_get_index_buffer_bounded(struct panfrost_batch *batch,
u_vbuf_get_minmax_index(&ctx->base, info, draw, min_index, max_index);
if (!info->has_user_indices)
panfrost_minmax_cache_add(rsrc->index_cache, info->index_size,
draw->start, draw->count,
*min_index, *max_index);
pan_minmax_cache_add(rsrc->index_cache, info->index_size, draw->start,
draw->count, *min_index, *max_index);
}
return panfrost_get_index_buffer(batch, info, draw);

37
src/gallium/drivers/panfrost/pan_jm.c
View file

@ -248,7 +248,7 @@ void
GENX(jm_preload_fb)(struct panfrost_batch *batch, struct pan_fb_info *fb)
{
struct panfrost_device *dev = pan_device(batch->ctx->base.screen);
struct panfrost_ptr preload_jobs[2];
struct pan_ptr preload_jobs[2];
unsigned preload_job_count =
GENX(pan_preload_fb)(&dev->fb_preload_cache, &batch->pool.base, fb,
@ -274,7 +274,7 @@ void
GENX(jm_emit_fragment_job)(struct panfrost_batch *batch,
const struct pan_fb_info *pfb)
{
struct panfrost_ptr transfer =
struct pan_ptr transfer =
pan_pool_alloc_desc(&batch->pool.base, FRAGMENT_JOB);
GENX(pan_emit_fragment_job_payload)
@ -308,7 +308,7 @@ void
GENX(jm_launch_grid)(struct panfrost_batch *batch,
const struct pipe_grid_info *info)
{
struct panfrost_ptr t = pan_pool_alloc_desc(&batch->pool.base, COMPUTE_JOB);
struct pan_ptr t = pan_pool_alloc_desc(&batch->pool.base, COMPUTE_JOB);
/* Invoke according to the grid info */
@ -318,10 +318,10 @@ GENX(jm_launch_grid)(struct panfrost_batch *batch,
num_wg[0] = num_wg[1] = num_wg[2] = 1;
#if PAN_ARCH <= 7
panfrost_pack_work_groups_compute(
pan_section_ptr(t.cpu, COMPUTE_JOB, INVOCATION), num_wg[0], num_wg[1],
num_wg[2], info->block[0], info->block[1], info->block[2], false,
info->indirect != NULL);
pan_pack_work_groups_compute(pan_section_ptr(t.cpu, COMPUTE_JOB, INVOCATION),
num_wg[0], num_wg[1], num_wg[2], info->block[0],
info->block[1], info->block[2], false,
info->indirect != NULL);
pan_section_pack(t.cpu, COMPUTE_JOB, PARAMETERS, cfg) {
cfg.job_task_split = util_logbase2_ceil(info->block[0] + 1) +
@ -411,7 +411,7 @@ jm_emit_tiler_desc(struct panfrost_batch *batch)
if (tiler_desc)
return tiler_desc;
struct panfrost_ptr t = pan_pool_alloc_desc(&batch->pool.base, TILER_HEAP);
struct pan_ptr t = pan_pool_alloc_desc(&batch->pool.base, TILER_HEAP);
pan_cast_and_pack(t.cpu, TILER_HEAP, heap) {
heap.size = panfrost_bo_size(dev->tiler_heap);
@ -867,7 +867,7 @@ void
GENX(jm_launch_xfb)(struct panfrost_batch *batch,
const struct pipe_draw_info *info, unsigned count)
{
struct panfrost_ptr t = pan_pool_alloc_desc(&batch->pool.base, COMPUTE_JOB);
struct pan_ptr t = pan_pool_alloc_desc(&batch->pool.base, COMPUTE_JOB);
#if PAN_ARCH == 9
pan_section_pack(t.cpu, COMPUTE_JOB, PAYLOAD, cfg) {
@ -895,9 +895,8 @@ GENX(jm_launch_xfb)(struct panfrost_batch *batch,
#else
struct mali_invocation_packed invocation;
panfrost_pack_work_groups_compute(&invocation, 1, count,
info->instance_count, 1, 1, 1,
PAN_ARCH <= 5, false);
pan_pack_work_groups_compute(&invocation, 1, count, info->instance_count, 1,
1, 1, PAN_ARCH <= 5, false);
/* No varyings on XFB compute jobs. */
uint64_t saved_vs_varyings = batch->varyings.vs;
@ -923,8 +922,8 @@ GENX(jm_launch_xfb)(struct panfrost_batch *batch,
*/
static void
jm_push_vertex_tiler_jobs(struct panfrost_batch *batch,
const struct panfrost_ptr *vertex_job,
const struct panfrost_ptr *tiler_job)
const struct pan_ptr *vertex_job,
const struct pan_ptr *tiler_job)
{
unsigned vertex =
pan_jc_add_job(&batch->jm.jobs.vtc_jc, MALI_JOB_TYPE_VERTEX, false, false,
@ -949,9 +948,8 @@ GENX(jm_launch_draw)(struct panfrost_batch *batch,
#if PAN_ARCH <= 7
struct mali_invocation_packed invocation;
if (info->instance_count > 1) {
panfrost_pack_work_groups_compute(&invocation, 1, vertex_count,
info->instance_count, 1, 1, 1, true,
false);
pan_pack_work_groups_compute(&invocation, 1, vertex_count,
info->instance_count, 1, 1, 1, true, false);
} else {
pan_pack(&invocation, INVOCATION, cfg) {
cfg.invocations = vertex_count - 1;
@ -967,7 +965,7 @@ GENX(jm_launch_draw)(struct panfrost_batch *batch,
/* Emit all sort of descriptors. */
#endif
UNUSED struct panfrost_ptr tiler, vertex;
UNUSED struct pan_ptr tiler, vertex;
if (idvs) {
#if PAN_ARCH == 9
@ -1026,8 +1024,7 @@ void
GENX(jm_emit_write_timestamp)(struct panfrost_batch *batch,
struct panfrost_resource *dst, unsigned offset)
{
struct panfrost_ptr job =
pan_pool_alloc_desc(&batch->pool.base, WRITE_VALUE_JOB);
struct pan_ptr job = pan_pool_alloc_desc(&batch->pool.base, WRITE_VALUE_JOB);
pan_section_pack(job.cpu, WRITE_VALUE_JOB, PAYLOAD, cfg) {
cfg.address = dst->image.data.base + dst->image.data.offset + offset;

4
src/gallium/drivers/panfrost/pan_job.c
View file

@ -432,8 +432,8 @@ panfrost_batch_get_scratchpad(struct panfrost_batch *batch,
unsigned size_per_thread,
unsigned thread_tls_alloc, unsigned core_id_range)
{
unsigned size = panfrost_get_total_stack_size(
size_per_thread, thread_tls_alloc, core_id_range);
unsigned size = pan_get_total_stack_size(size_per_thread, thread_tls_alloc,
core_id_range);
if (batch->scratchpad) {
assert(panfrost_bo_size(batch->scratchpad) >= size);

4
src/gallium/drivers/panfrost/pan_job.h
View file

@ -102,10 +102,10 @@ struct panfrost_batch {
struct panfrost_bo *shared_memory;
/* Framebuffer descriptor. */
struct panfrost_ptr framebuffer;
struct pan_ptr framebuffer;
/* Thread local storage descriptor. */
struct panfrost_ptr tls;
struct pan_ptr tls;
/* Vertex count */
uint32_t vertex_count;

8
src/gallium/drivers/panfrost/pan_mempool.c
View file

@ -129,7 +129,7 @@ panfrost_pool_get_bo_handles(struct panfrost_pool *pool, uint32_t *handles)
#define PAN_GUARD_SIZE 4096
static struct panfrost_ptr
static struct pan_ptr
panfrost_pool_alloc_aligned(struct panfrost_pool *pool, size_t sz,
unsigned alignment)
{
@ -149,7 +149,7 @@ panfrost_pool_alloc_aligned(struct panfrost_pool *pool, size_t sz,
bo = panfrost_pool_alloc_backing(pool, bo_size);
if (!bo)
return (struct panfrost_ptr){0};
return (struct pan_ptr){0};
memset(bo->ptr.cpu, 0xbb, bo_size);
@ -169,14 +169,14 @@ panfrost_pool_alloc_aligned(struct panfrost_pool *pool, size_t sz,
bo = panfrost_pool_alloc_backing(
pool, ALIGN_POT(MAX2(pool->base.slab_size, sz), 4096));
if (!bo)
return (struct panfrost_ptr){0};
return (struct pan_ptr){0};
offset = 0;
}
pool->transient_offset = offset + sz;
struct panfrost_ptr ret = {
struct pan_ptr ret = {
.cpu = bo->ptr.cpu + offset,
.gpu = bo->ptr.gpu + offset,
};

8
src/gallium/drivers/panfrost/pan_nir_lower_res_indices.c
View file

@ -75,7 +75,7 @@ lower_image_intrin(nir_builder *b, nir_intrinsic_instr *intrin)
static bool
lower_input_intrin(nir_builder *b, nir_intrinsic_instr *intrin,
const struct panfrost_compile_inputs *inputs)
const struct pan_compile_inputs *inputs)
{
/* All vertex attributes come from the attribute table.
* Fragment inputs come from the attribute table too, unless they've
@ -120,7 +120,7 @@ lower_ssbo_intrin(nir_builder *b, nir_intrinsic_instr *intrin)
static bool
lower_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin,
const struct panfrost_compile_inputs *inputs)
const struct pan_compile_inputs *inputs)
{
switch (intrin->intrinsic) {
case nir_intrinsic_image_load:
@ -143,7 +143,7 @@ lower_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin,
static bool
lower_instr(nir_builder *b, nir_instr *instr, void *data)
{
const struct panfrost_compile_inputs *inputs = data;
const struct pan_compile_inputs *inputs = data;
switch (instr->type) {
case nir_instr_type_tex:
@ -157,7 +157,7 @@ lower_instr(nir_builder *b, nir_instr *instr, void *data)
bool
panfrost_nir_lower_res_indices(nir_shader *shader,
struct panfrost_compile_inputs *inputs)
struct pan_compile_inputs *inputs)
{
/**
* Starting with Valhall, we are required to encode table indices by the

20
src/gallium/drivers/panfrost/pan_precomp.c
View file

@ -70,7 +70,7 @@ panfrost_precomp_shader_create(
};
res->local_size = local_dim;
struct panfrost_ptr bin =
struct pan_ptr bin =
pan_pool_alloc_aligned(cache->bin_pool, info->binary_size, 64);
if (!bin.gpu)
@ -80,8 +80,7 @@ panfrost_precomp_shader_create(
res->code_ptr = bin.gpu;
#if PAN_ARCH <= 7
struct panfrost_ptr rsd =
pan_pool_alloc_desc(cache->desc_pool, RENDERER_STATE);
struct pan_ptr rsd = pan_pool_alloc_desc(cache->desc_pool, RENDERER_STATE);
if (!rsd.gpu)
goto err;
@ -92,8 +91,7 @@ panfrost_precomp_shader_create(
res->state_ptr = rsd.gpu;
#else
struct panfrost_ptr spd =
pan_pool_alloc_desc(cache->desc_pool, SHADER_PROGRAM);
struct pan_ptr spd = pan_pool_alloc_desc(cache->desc_pool, SHADER_PROGRAM);
if (!spd.gpu)
goto err;
@ -194,8 +192,7 @@ emit_tls(struct panfrost_batch *batch,
{
struct panfrost_context *ctx = batch->ctx;
struct panfrost_device *dev = pan_device(ctx->base.screen);
struct panfrost_ptr t =
pan_pool_alloc_desc(&batch->pool.base, LOCAL_STORAGE);
struct pan_ptr t = pan_pool_alloc_desc(&batch->pool.base, LOCAL_STORAGE);
struct pan_tls_info info = {
.tls.size = shader->info.tls_size,
@ -240,7 +237,7 @@ GENX(panfrost_launch_precomp)(struct panfrost_batch *batch,
panfrost_precomp_cache_get(dev->precomp_cache, idx);
assert(shader);
struct panfrost_ptr push_uniforms = pan_pool_alloc_aligned(
struct pan_ptr push_uniforms = pan_pool_alloc_aligned(
&batch->pool.base, BIFROST_PRECOMPILED_KERNEL_SYSVALS_SIZE + data_size,
16);
assert(push_uniforms.gpu);
@ -261,12 +258,11 @@ GENX(panfrost_launch_precomp)(struct panfrost_batch *batch,
data_size, &sysvals);
#if PAN_ARCH <= 9
struct panfrost_ptr job =
pan_pool_alloc_desc(&batch->pool.base, COMPUTE_JOB);
struct pan_ptr job = pan_pool_alloc_desc(&batch->pool.base, COMPUTE_JOB);
assert(job.gpu);
#if PAN_ARCH <= 7
panfrost_pack_work_groups_compute(
pan_pack_work_groups_compute(
pan_section_ptr(job.cpu, COMPUTE_JOB, INVOCATION), grid.count[0],
grid.count[1], grid.count[2], shader->local_size.x, shader->local_size.y,
shader->local_size.z, false, false);
@ -355,7 +351,7 @@ GENX(panfrost_launch_precomp)(struct panfrost_batch *batch,
unsigned threads_per_wg =
shader->local_size.x * shader->local_size.y * shader->local_size.z;
unsigned max_thread_cnt = panfrost_compute_max_thread_count(
unsigned max_thread_cnt = pan_compute_max_thread_count(
&dev->kmod.props, shader->info.work_reg_count);
/* Pick the task_axis and task_increment to maximize thread utilization. */

32
src/gallium/drivers/panfrost/pan_resource.c
View file

@ -872,7 +872,7 @@ panfrost_resource_create_with_modifier(struct pipe_screen *screen,
panfrost_resource_set_damage_region(screen, &so->base, 0, NULL);
if (template->bind & PIPE_BIND_INDEX_BUFFER)
so->index_cache = CALLOC_STRUCT(panfrost_minmax_cache);
so->index_cache = CALLOC_STRUCT(pan_minmax_cache);
return (struct pipe_resource *)so;
}
@ -1037,11 +1037,11 @@ panfrost_load_tiled_images(struct panfrost_transfer *transfer,
uint8_t *map = bo->ptr.cpu + rsrc->image.layout.slices[level].offset +
(z + ptrans->box.z) * stride;
panfrost_load_tiled_image(dst, map, ptrans->box.x, ptrans->box.y,
ptrans->box.width, ptrans->box.height,
ptrans->stride,
rsrc->image.layout.slices[level].row_stride,
rsrc->image.layout.format);
pan_load_tiled_image(dst, map, ptrans->box.x, ptrans->box.y,
ptrans->box.width, ptrans->box.height,
ptrans->stride,
rsrc->image.layout.slices[level].row_stride,
rsrc->image.layout.format);
}
}
@ -1190,10 +1190,10 @@ panfrost_store_tiled_images(struct panfrost_transfer *transfer,
uint8_t *map = bo->ptr.cpu + rsrc->image.layout.slices[level].offset +
(z + ptrans->box.z) * stride;
panfrost_store_tiled_image(map, src, ptrans->box.x, ptrans->box.y,
ptrans->box.width, ptrans->box.height,
rsrc->image.layout.slices[level].row_stride,
ptrans->stride, rsrc->image.layout.format);
pan_store_tiled_image(map, src, ptrans->box.x, ptrans->box.y,
ptrans->box.width, ptrans->box.height,
rsrc->image.layout.slices[level].row_stride,
ptrans->stride, rsrc->image.layout.format);
}
}
@ -1446,9 +1446,8 @@ panfrost_ptr_map(struct pipe_context *pctx, struct pipe_resource *resource,
if (usage & PIPE_MAP_WRITE) {
BITSET_SET(rsrc->valid.data, level);
panfrost_minmax_cache_invalidate(
rsrc->index_cache,
util_format_get_blocksize(rsrc->base.format),
pan_minmax_cache_invalidate(
rsrc->index_cache, util_format_get_blocksize(rsrc->base.format),
transfer->base.box.x, transfer->base.box.width);
}
@ -1935,10 +1934,9 @@ panfrost_ptr_unmap(struct pipe_context *pctx, struct pipe_transfer *transfer)
transfer->box.x + transfer->box.width);
if (transfer->usage & PIPE_MAP_WRITE) {
panfrost_minmax_cache_invalidate(prsrc->index_cache,
util_format_get_blocksize(prsrc->base.format),
transfer->box.x,
transfer->box.width);
pan_minmax_cache_invalidate(prsrc->index_cache,
util_format_get_blocksize(prsrc->base.format),
transfer->box.x, transfer->box.width);
}
/* Derefence the resource */

2
src/gallium/drivers/panfrost/pan_resource.h
View file

@ -85,7 +85,7 @@ struct panfrost_resource {
uint8_t stencil_value;
/* Cached min/max values for index buffers */
struct panfrost_minmax_cache *index_cache;
struct pan_minmax_cache *index_cache;
};
static inline struct panfrost_resource *

6
src/gallium/drivers/panfrost/pan_screen.c
View file

@ -187,7 +187,7 @@ panfrost_is_format_supported(struct pipe_screen *screen,
/* Check we support the format with the given bind */
unsigned pan_bind_flags = pipe_to_pan_bind_flags(bind);
struct panfrost_format fmt = dev->formats[format];
struct pan_format fmt = dev->formats[format];
unsigned fmt_bind_flags = fmt.bind;
/* Also check that compressed texture formats are supported on this
@ -458,9 +458,9 @@ panfrost_init_compute_caps(struct panfrost_screen *screen)
* things so it matches kmod VA range limitations.
*/
uint64_t user_va_start =
panfrost_clamp_to_usable_va_range(dev->kmod.dev, PAN_VA_USER_START);
pan_clamp_to_usable_va_range(dev->kmod.dev, PAN_VA_USER_START);
uint64_t user_va_end =
panfrost_clamp_to_usable_va_range(dev->kmod.dev, PAN_VA_USER_END);
pan_clamp_to_usable_va_range(dev->kmod.dev, PAN_VA_USER_END);
/* We cannot support more than the VA limit */
caps->max_global_size =

2
src/gallium/drivers/panfrost/pan_screen.h
View file

@ -85,7 +85,7 @@ struct panfrost_vtable {
struct pan_blend_shader_cache *cache, const struct pan_blend_state *,
nir_alu_type, nir_alu_type, unsigned rt);
void (*compile_shader)(nir_shader *s, struct panfrost_compile_inputs *inputs,
void (*compile_shader)(nir_shader *s, struct pan_compile_inputs *inputs,
struct util_dynarray *binary,
struct pan_shader_info *info);

22
src/gallium/drivers/panfrost/pan_shader.c
View file

@ -139,19 +139,19 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
if (gl_shader_stage_is_compute(s->info.stage))
pan_shader_preprocess(s, panfrost_device_gpu_id(dev));
struct panfrost_compile_inputs inputs = {
struct pan_compile_inputs inputs = {
.gpu_id = panfrost_device_gpu_id(dev),
};
/* Lower this early so the backends don't have to worry about it */
if (s->info.stage == MESA_SHADER_FRAGMENT) {
inputs.fixed_varying_mask =
panfrost_get_fixed_varying_mask(s->info.inputs_read);
pan_get_fixed_varying_mask(s->info.inputs_read);
} else if (s->info.stage == MESA_SHADER_VERTEX) {
/* No IDVS for internal XFB shaders */
inputs.no_idvs = s->info.has_transform_feedback_varyings;
inputs.fixed_varying_mask =
panfrost_get_fixed_varying_mask(s->info.outputs_written);
pan_get_fixed_varying_mask(s->info.outputs_written);
if (s->info.has_transform_feedback_varyings) {
NIR_PASS(_, s, nir_io_add_const_offset_to_base,
@ -179,7 +179,7 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
NIR_PASS(_, s, nir_lower_clip_fs, key->fs.clip_plane_enable,
false, true);
inputs.fixed_varying_mask =
panfrost_get_fixed_varying_mask(s->info.inputs_read);
pan_get_fixed_varying_mask(s->info.inputs_read);
}
if (key->fs.line_smooth) {
@ -225,12 +225,12 @@ panfrost_shader_compile(struct panfrost_screen *screen, const nir_shader *ir,
screen->vtbl.compile_shader(s, &inputs, &out->binary, &out->info);
panfrost_stats_util_debug(dbg, gl_shader_stage_name(s->info.stage),
&out->info.stats);
pan_stats_util_debug(dbg, gl_shader_stage_name(s->info.stage),
&out->info.stats);
if (s->info.stage == MESA_SHADER_VERTEX && out->info.vs.idvs) {
panfrost_stats_util_debug(dbg, "MESA_SHADER_POSITION",
&out->info.stats_idvs_varying);
pan_stats_util_debug(dbg, "MESA_SHADER_POSITION",
&out->info.stats_idvs_varying);
}
assert(req_local_mem >= out->info.wls_size);
@ -338,7 +338,7 @@ panfrost_build_fs_key(struct panfrost_context *ctx,
if ((fb->nr_cbufs > i) && fb->cbufs[i])
fmt = fb->cbufs[i]->format;
if (panfrost_blendable_formats_v6[fmt].internal)
if (pan_blendable_formats_v6[fmt].internal)
fmt = PIPE_FORMAT_NONE;
key->rt_formats[i] = fmt;
@ -625,8 +625,8 @@ panfrost_get_compute_state_info(struct pipe_context *pipe, void *cso,
struct panfrost_compiled_shader *cs =
util_dynarray_begin(&uncompiled->variants);
info->max_threads = panfrost_compute_max_thread_count(
&dev->kmod.props, cs->info.work_reg_count);
info->max_threads =
pan_compute_max_thread_count(&dev->kmod.props, cs->info.work_reg_count);
info->private_memory = cs->info.tls_size;
info->simd_sizes = pan_subgroup_size(dev->arch);
info->preferred_simd_size = info->simd_sizes;

2
src/panfrost/clc/meson.build
View file

@ -8,7 +8,7 @@ if get_option('precomp-compiler') == 'system'
else
prog_panfrost_compile = executable(
'panfrost_compile',
['panfrost_compile.c'],
['pan_compile.c'],
link_with : [libpanfrost_bifrost],
include_directories : [inc_include, inc_src],
c_args : [c_msvc_compat_args, no_override_init_args],

7
src/panfrost/clc/panfrost_compile.c → src/panfrost/clc/pan_compile.c
View file

@ -5,7 +5,7 @@
* SPDX-License-Identifier: MIT
*/
#include "panfrost_compile.h"
#include "pan_compile.h"
#include "compiler/glsl_types.h"
#include "compiler/spirv/nir_spirv.h"
#include "panfrost/compiler/bifrost_compile.h"
@ -28,7 +28,6 @@
#include "util/macros.h"
#include "util/u_dynarray.h"
#include <sys/mman.h>
#include "panfrost_compile.h"
static const struct spirv_to_nir_options spirv_options = {
.environment = NIR_SPIRV_OPENCL,
@ -283,7 +282,7 @@ remap_variant(nir_function *func, unsigned variant, const char *target)
return "default";
}
void pan_shader_compile(nir_shader *nir, struct panfrost_compile_inputs *inputs,
void pan_shader_compile(nir_shader *nir, struct pan_compile_inputs *inputs,
struct util_dynarray *binary,
struct pan_shader_info *info);
@ -381,7 +380,7 @@ main(int argc, const char **argv)
* to readjust it here. */
s->scratch_size = MAX2(s->scratch_size, nir->scratch_size);
struct panfrost_compile_inputs inputs = {
struct pan_compile_inputs inputs = {
.gpu_id = target_arch << 12,
};

0
src/panfrost/clc/panfrost_compile.h → src/panfrost/clc/pan_compile.h
View file

12
src/panfrost/compiler/bi_opt_push_ubo.c
View file

@ -119,7 +119,7 @@ bi_pick_blend_constants(bi_context *ctx, struct bi_ubo_analysis *analysis)
assert(ctx->info.push->count == 0);
for (unsigned channel = 0; channel < 4; channel++) {
struct panfrost_ubo_word word = {
struct pan_ubo_word word = {
.ubo = sysval_ubo,
.offset = offset + channel * 4,
};
@ -138,7 +138,7 @@ bi_pick_blend_constants(bi_context *ctx, struct bi_ubo_analysis *analysis)
* sophisticated. Select from the last UBO first to prioritize sysvals. */
static void
bi_pick_ubo(struct panfrost_ubo_push *push, struct bi_ubo_analysis *analysis)
bi_pick_ubo(struct pan_ubo_push *push, struct bi_ubo_analysis *analysis)
{
for (signed ubo = analysis->nr_blocks - 1; ubo >= 0; --ubo) {
struct bi_ubo_block *block = &analysis->blocks[ubo];
@ -155,7 +155,7 @@ bi_pick_ubo(struct panfrost_ubo_push *push, struct bi_ubo_analysis *analysis)
return;
for (unsigned offs = 0; offs < range; ++offs) {
struct panfrost_ubo_word word = {
struct pan_ubo_word word = {
.ubo = ubo,
.offset = (r + offs) * 4,
};
@ -319,7 +319,7 @@ bi_create_fau_interference_graph(bi_context *ctx, adjacency_row *adjacency)
* together arbitrarily.
*
* After a new ordering is selected, pushed uniforms in the program and the
* panfrost_ubo_push data structure must be remapped to use the new ordering.
* pan_ubo_push data structure must be remapped to use the new ordering.
*/
void
bi_opt_reorder_push(bi_context *ctx)
@ -331,7 +331,7 @@ bi_opt_reorder_push(bi_context *ctx)
unsigned unpaired[PAN_MAX_PUSH] = {0};
unsigned pushed = 0, unpaired_count = 0;
struct panfrost_ubo_push *push = ctx->info.push;
struct pan_ubo_push *push = ctx->info.push;
unsigned push_offset = ctx->info.push_offset;
bi_create_fau_interference_graph(ctx, adjacency);
@ -387,7 +387,7 @@ bi_opt_reorder_push(bi_context *ctx)
}
/* Use new ordering for push */
struct panfrost_ubo_push old = *push;
struct pan_ubo_push old = *push;
for (unsigned i = 0; i < pushed; ++i)
push->words[push_offset + i] = old.words[ordering[i]];

2
src/panfrost/compiler/bi_test.h
View file

@ -51,7 +51,7 @@ bit_builder(void *memctx)
{
bi_context *ctx = rzalloc(memctx, bi_context);
list_inithead(&ctx->blocks);
ctx->inputs = rzalloc(memctx, struct panfrost_compile_inputs);
ctx->inputs = rzalloc(memctx, struct pan_compile_inputs);
bi_block *blk = bit_block(ctx);

20
src/panfrost/compiler/bifrost_compile.c
View file

@ -912,7 +912,7 @@ bi_emit_blend_op(bi_builder *b, bi_index rgba, nir_alu_type T, bi_index rgba2,
unsigned size_2 = nir_alu_type_get_type_size(T2);
unsigned sr_count = (size <= 16) ? 2 : 4;
unsigned sr_count_2 = (size_2 <= 16) ? 2 : 4;
const struct panfrost_compile_inputs *inputs = b->shader->inputs;
const struct pan_compile_inputs *inputs = b->shader->inputs;
uint64_t blend_desc = inputs->blend.bifrost_blend_desc;
enum bi_register_format regfmt = bi_reg_fmt_for_nir(T);
@ -5923,9 +5923,9 @@ bifrost_preprocess_nir(nir_shader *nir, unsigned gpu_id)
static bi_context *
bi_compile_variant_nir(nir_shader *nir,
const struct panfrost_compile_inputs *inputs,
const struct pan_compile_inputs *inputs,
struct util_dynarray *binary, struct bi_shader_info info,
struct panfrost_stats *stats, enum bi_idvs_mode idvs)
struct pan_stats *stats, enum bi_idvs_mode idvs)
{
bi_context *ctx = rzalloc(NULL, bi_context);
@ -6173,16 +6173,16 @@ bi_compile_variant_nir(nir_shader *nir,
}
if (ctx->arch >= 9) {
stats->isa = PANFROST_STAT_VALHALL;
stats->isa = PAN_STAT_VALHALL;
va_gather_stats(ctx, binary->size - offset, &stats->valhall);
} else {
stats->isa = PANFROST_STAT_BIFROST;
stats->isa = PAN_STAT_BIFROST;
bi_gather_stats(ctx, binary->size - offset, &stats->bifrost);
}
if ((bifrost_debug & BIFROST_DBG_SHADERDB) && !skip_internal) {
const char *prefix = bi_shader_stage_name(ctx);
panfrost_stats_fprintf(stderr, prefix, stats);
pan_stats_fprintf(stderr, prefix, stats);
}
return ctx;
@ -6190,7 +6190,7 @@ bi_compile_variant_nir(nir_shader *nir,
static void
bi_compile_variant(nir_shader *nir,
const struct panfrost_compile_inputs *inputs,
const struct pan_compile_inputs *inputs,
struct util_dynarray *binary, struct pan_shader_info *info,
enum bi_idvs_mode idvs)
{
@ -6215,7 +6215,7 @@ bi_compile_variant(nir_shader *nir,
* offset, to keep the ABI simple. */
assert((offset == 0) ^ (idvs == BI_IDVS_VARYING));
struct panfrost_stats *stats =
struct pan_stats *stats =
idvs == BI_IDVS_VARYING ? &info->stats_idvs_varying : &info->stats;
bi_context *ctx =
@ -6295,7 +6295,7 @@ bi_compile_variant(nir_shader *nir,
/* Decide if Index-Driven Vertex Shading should be used for a given shader */
static bool
bi_should_idvs(nir_shader *nir, const struct panfrost_compile_inputs *inputs)
bi_should_idvs(nir_shader *nir, const struct pan_compile_inputs *inputs)
{
/* Opt-out */
if (inputs->no_idvs || bifrost_debug & BIFROST_DBG_NOIDVS)
@ -6316,7 +6316,7 @@ bi_should_idvs(nir_shader *nir, const struct panfrost_compile_inputs *inputs)
void
bifrost_compile_shader_nir(nir_shader *nir,
const struct panfrost_compile_inputs *inputs,
const struct pan_compile_inputs *inputs,
struct util_dynarray *binary,
struct pan_shader_info *info)
{

2
src/panfrost/compiler/bifrost_compile.h
View file

@ -84,7 +84,7 @@ bifrost_precompiled_kernel_prepare_push_uniforms(
void bifrost_preprocess_nir(nir_shader *nir, unsigned gpu_id);
void bifrost_compile_shader_nir(nir_shader *nir,
const struct panfrost_compile_inputs *inputs,
const struct pan_compile_inputs *inputs,
struct util_dynarray *binary,
struct pan_shader_info *info);

6
src/panfrost/compiler/compiler.h
View file

@ -880,9 +880,9 @@ bi_block_add_successor(bi_block *block, bi_block *successor)
/* Subset of pan_shader_info needed per-variant, in order to support IDVS */
struct bi_shader_info {
struct panfrost_ubo_push *push;
struct pan_ubo_push *push;
struct bifrost_shader_info *bifrost;
struct panfrost_stats stats;
struct pan_stats stats;
unsigned tls_size;
unsigned work_reg_count;
unsigned push_offset;
@ -904,7 +904,7 @@ enum bi_idvs_mode {
};
typedef struct {
const struct panfrost_compile_inputs *inputs;
const struct pan_compile_inputs *inputs;
nir_shader *nir;
struct bi_shader_info info;
gl_shader_stage stage;

4
src/panfrost/ds/pan_pps_driver.cpp
View file

@ -58,9 +58,9 @@ PanfrostDriver::create_available_counters(const PanfrostPerf &perf)
counter.set_getter([=](const Counter &c, const Driver &d) {
auto &pan_driver = PanfrostDriver::into(d);
struct panfrost_perf *perf = pan_driver.perf->perf;
struct pan_perf *perf = pan_driver.perf->perf;
const auto counter = &perf->cfg->categories[gid].counters[id];
return int64_t(panfrost_perf_counter_read(counter, perf));
return int64_t(pan_perf_counter_read(counter, perf));
});
group.counters.push_back(cid++);

14
src/panfrost/ds/pan_pps_perf.cpp
View file

@ -29,18 +29,18 @@ PanfrostDevice::operator=(PanfrostDevice &&o)
}
PanfrostPerf::PanfrostPerf(const PanfrostDevice &dev)
: perf{reinterpret_cast<struct panfrost_perf *>(
rzalloc(nullptr, struct panfrost_perf))}
: perf{reinterpret_cast<struct pan_perf *>(
rzalloc(nullptr, struct pan_perf))}
{
assert(perf);
assert(dev.fd >= 0);
panfrost_perf_init(perf, dev.fd);
pan_perf_init(perf, dev.fd);
}
PanfrostPerf::~PanfrostPerf()
{
if (perf) {
panfrost_perf_disable(perf);
pan_perf_disable(perf);
ralloc_free(perf);
}
}
@ -61,21 +61,21 @@ int
PanfrostPerf::enable() const
{
assert(perf);
return panfrost_perf_enable(perf);
return pan_perf_enable(perf);
}
void
PanfrostPerf::disable() const
{
assert(perf);
panfrost_perf_disable(perf);
pan_perf_disable(perf);
}
int
PanfrostPerf::dump() const
{
assert(perf);
return panfrost_perf_dump(perf);
return pan_perf_dump(perf);
}
} // namespace pps

4
src/panfrost/ds/pan_pps_perf.h
View file

@ -7,7 +7,7 @@
#pragma once
struct panfrost_perf;
struct pan_perf;
namespace pps {
class PanfrostDevice {
@ -39,7 +39,7 @@ class PanfrostPerf {
void disable() const;
int dump() const;
struct panfrost_perf *perf = nullptr;
struct pan_perf *perf = nullptr;
};
} // namespace pps

4
src/panfrost/genxml/decode.c
View file

@ -230,7 +230,7 @@ GENX(pandecode_blend)(struct pandecode_context *ctx,
#if PAN_ARCH <= 7
static bool
panfrost_is_yuv_format(uint32_t packed)
pan_is_yuv_format(uint32_t packed)
{
#if PAN_ARCH == 7
enum mali_format mali_fmt = packed >> 12;
@ -301,7 +301,7 @@ pandecode_texture_payload(struct pandecode_context *ctx, uint64_t payload,
PANDECODE_EMIT_TEX_PAYLOAD_DESC(SURFACE_WITH_STRIDE, "Surface With Stride");
#else
STATIC_ASSERT(PAN_ARCH == 7);
if (panfrost_is_yuv_format(tex->format)) {
if (pan_is_yuv_format(tex->format)) {
PANDECODE_EMIT_TEX_PAYLOAD_DESC(MULTIPLANAR_SURFACE, "Surface YUV");
} else {
PANDECODE_EMIT_TEX_PAYLOAD_DESC(SURFACE_WITH_STRIDE,

16
src/panfrost/lib/pan_attributes.c
View file

@ -37,7 +37,7 @@
#define ODD(odd) ((odd - 1) >> 1)
static unsigned
panfrost_small_padded_vertex_count(unsigned idx)
pan_small_padded_vertex_count(unsigned idx)
{
if (idx < 10)
return idx;
@ -46,7 +46,7 @@ panfrost_small_padded_vertex_count(unsigned idx)
}
static unsigned
panfrost_large_padded_vertex_count(uint32_t vertex_count)
pan_large_padded_vertex_count(uint32_t vertex_count)
{
/* First, we have to find the highest set one */
unsigned highest = 32 - __builtin_clz(vertex_count);
@ -79,20 +79,20 @@ panfrost_large_padded_vertex_count(uint32_t vertex_count)
}
unsigned
panfrost_padded_vertex_count(unsigned vertex_count)
pan_padded_vertex_count(unsigned vertex_count)
{
if (vertex_count < 20)
return panfrost_small_padded_vertex_count(vertex_count);
return pan_small_padded_vertex_count(vertex_count);
else
return panfrost_large_padded_vertex_count(vertex_count);
return pan_large_padded_vertex_count(vertex_count);
}
/* The much, much more irritating case -- instancing is enabled. See
* panfrost_job.h for notes on how this works */
* pan_job.h for notes on how this works */
unsigned
panfrost_compute_magic_divisor(unsigned hw_divisor, unsigned *o_shift,
unsigned *extra_flags)
pan_compute_magic_divisor(unsigned hw_divisor, unsigned *o_shift,
unsigned *extra_flags)
{
/* We have a NPOT divisor. Here's the fun one (multipling by
* the inverse and shifting) */

18
src/panfrost/lib/pan_blend.c
View file

@ -175,10 +175,10 @@ to_c_factor(enum pipe_blendfactor factor)
}
static void
to_panfrost_function(enum pipe_blend_func blend_func,
enum pipe_blendfactor src_factor,
enum pipe_blendfactor dest_factor, bool is_alpha,
struct MALI_BLEND_FUNCTION *function)
to_mali_function(enum pipe_blend_func blend_func,
enum pipe_blendfactor src_factor,
enum pipe_blendfactor dest_factor, bool is_alpha,
struct MALI_BLEND_FUNCTION *function)
{
assert(can_fixed_function_equation(blend_func, src_factor, dest_factor,
is_alpha, true));
@ -446,10 +446,10 @@ pan_blend_to_fixed_function_equation(const struct pan_blend_equation equation,
}
/* Compile the fixed-function blend */
to_panfrost_function(equation.rgb_func, equation.rgb_src_factor,
equation.rgb_dst_factor, false, &out->rgb);
to_panfrost_function(equation.alpha_func, equation.alpha_src_factor,
equation.alpha_dst_factor, true, &out->alpha);
to_mali_function(equation.rgb_func, equation.rgb_src_factor,
equation.rgb_dst_factor, false, &out->rgb);
to_mali_function(equation.alpha_func, equation.alpha_src_factor,
equation.alpha_dst_factor, true, &out->alpha);
out->color_mask = equation.color_mask;
}
@ -752,7 +752,7 @@ GENX(pan_blend_get_internal_desc)(enum pipe_format fmt, unsigned rt,
}
cfg.fixed_function.conversion.memory_format =
GENX(panfrost_dithered_format_from_pipe_format)(fmt, dithered);
GENX(pan_dithered_format_from_pipe_format)(fmt, dithered);
}
return res.opaque[0] | ((uint64_t)res.opaque[1] << 32);

36
src/panfrost/lib/pan_desc.c
View file

@ -342,7 +342,7 @@ static unsigned
pan_bytes_per_pixel_tib(enum pipe_format format)
{
const struct pan_blendable_format *bf =
GENX(panfrost_blendable_format_from_pipe_format)(format);
GENX(pan_blendable_format_from_pipe_format)(format);
if (bf->internal) {
/* Blendable formats are always 32-bits in the tile buffer,
@ -444,8 +444,7 @@ GENX(pan_select_tile_size)(struct pan_fb_info *fb)
#endif
/* Clamp tile size to hardware limits */
fb->tile_size =
MIN2(fb->tile_size, panfrost_max_effective_tile_size(PAN_ARCH));
fb->tile_size = MIN2(fb->tile_size, pan_max_effective_tile_size(PAN_ARCH));
assert(fb->tile_size >= 4 * 4);
/* Colour buffer allocations must be 1K aligned. */
@ -507,13 +506,13 @@ pan_rt_init_format(const struct pan_image_view *rt,
cfg->srgb = true;
struct pan_blendable_format fmt =
*GENX(panfrost_blendable_format_from_pipe_format)(rt->format);
*GENX(pan_blendable_format_from_pipe_format)(rt->format);
enum mali_color_format writeback_format;
if (fmt.internal) {
cfg->internal_format = fmt.internal;
writeback_format = fmt.writeback;
panfrost_invert_swizzle(desc->swizzle, swizzle);
pan_invert_swizzle(desc->swizzle, swizzle);
} else {
/* Construct RAW internal/writeback, where internal is
* specified logarithmically (round to next power-of-two).
@ -539,7 +538,7 @@ pan_rt_init_format(const struct pan_image_view *rt,
cfg->writeback_format = writeback_format;
#endif
cfg->swizzle = panfrost_translate_swizzle_4(swizzle);
cfg->swizzle = pan_translate_swizzle_4(swizzle);
}
/* forward declaration */
@ -679,7 +678,7 @@ GENX(pan_emit_tls)(const struct pan_tls_info *info,
{
pan_pack(out, LOCAL_STORAGE, cfg) {
if (info->tls.size) {
unsigned shift = panfrost_get_stack_shift(info->tls.size);
unsigned shift = pan_get_stack_shift(info->tls.size);
cfg.tls_size = shift;
#if PAN_ARCH >= 9
@ -732,11 +731,11 @@ pan_emit_midgard_tiler(const struct pan_fb_info *fb,
cfg.heap_start = tiler_ctx->midgard.polygon_list;
cfg.heap_end = tiler_ctx->midgard.polygon_list;
} else {
cfg.hierarchy_mask = panfrost_choose_hierarchy_mask(
cfg.hierarchy_mask = pan_choose_hierarchy_mask(
fb->width, fb->height, tiler_ctx->midgard.vertex_count, hierarchy);
header_size = panfrost_tiler_header_size(
fb->width, fb->height, cfg.hierarchy_mask, hierarchy);
cfg.polygon_list_size = panfrost_tiler_full_size(
header_size = pan_tiler_header_size(fb->width, fb->height,
cfg.hierarchy_mask, hierarchy);
cfg.polygon_list_size = pan_tiler_full_size(
fb->width, fb->height, cfg.hierarchy_mask, hierarchy);
cfg.heap_start = tiler_ctx->midgard.heap.start;
cfg.heap_end = cfg.heap_start + tiler_ctx->midgard.heap.size;
@ -794,7 +793,7 @@ pan_force_clean_write_on(const struct pan_image *image, unsigned tile_size)
pan_afbc_renderblock_size(image->layout.modifier);
assert(renderblk_sz.width >= 16 && renderblk_sz.height >= 16);
assert(tile_size <= panfrost_max_effective_tile_size(PAN_ARCH));
assert(tile_size <= pan_max_effective_tile_size(PAN_ARCH));
return tile_size != renderblk_sz.width * renderblk_sz.height;
}
@ -803,7 +802,7 @@ static bool
pan_force_clean_write(const struct pan_fb_info *fb, unsigned tile_size)
{
/* Maximum tile size */
assert(tile_size <= panfrost_max_effective_tile_size(PAN_ARCH));
assert(tile_size <= pan_max_effective_tile_size(PAN_ARCH));
for (unsigned i = 0; i < fb->rt_count; ++i) {
if (!fb->rts[i].view || fb->rts[i].discard)
@ -882,7 +881,7 @@ GENX(pan_emit_fbd)(const struct pan_fb_info *fb, unsigned layer_idx,
/* Default to 24 bit depth if there's no surface. */
cfg.z_internal_format =
fb->zs.view.zs ? panfrost_get_z_internal_format(fb->zs.view.zs->format)
fb->zs.view.zs ? pan_get_z_internal_format(fb->zs.view.zs->format)
: MALI_Z_INTERNAL_FORMAT_D24;
cfg.z_clear = fb->zs.clear_value.depth;
@ -987,7 +986,8 @@ GENX(pan_emit_fbd)(const struct pan_fb_info *fb, unsigned layer_idx,
continue;
cbuf_offset += pan_bytes_per_pixel_tib(fb->rts[i].view->format) *
fb->tile_size * pan_image_view_get_nr_samples(fb->rts[i].view);
fb->tile_size *
pan_image_view_get_nr_samples(fb->rts[i].view);
if (i != crc_rt)
*(fb->rts[i].crc_valid) = false;
@ -1060,11 +1060,11 @@ GENX(pan_emit_fbd)(const struct pan_fb_info *fb, unsigned layer_idx,
/* The swizzle for rendering is inverted from texturing */
unsigned char swizzle[4];
panfrost_invert_swizzle(desc->swizzle, swizzle);
cfg.swizzle = panfrost_translate_swizzle_4(swizzle);
pan_invert_swizzle(desc->swizzle, swizzle);
cfg.swizzle = pan_translate_swizzle_4(swizzle);
struct pan_blendable_format fmt =
*GENX(panfrost_blendable_format_from_pipe_format)(rt->format);
*GENX(pan_blendable_format_from_pipe_format)(rt->format);
if (fmt.internal) {
cfg.internal_format = fmt.internal;

2
src/panfrost/lib/pan_desc.h
View file

@ -113,7 +113,7 @@ struct pan_tls_info {
struct pan_fb_bifrost_info {
struct {
struct panfrost_ptr dcds;
struct pan_ptr dcds;
unsigned modes[3];
} pre_post;
};

70
src/panfrost/lib/pan_encoder.h
View file

@ -37,55 +37,53 @@
/* Tiler structure size computation */
unsigned panfrost_tiler_header_size(unsigned width, unsigned height,
unsigned mask, bool hierarchy);
unsigned pan_tiler_header_size(unsigned width, unsigned height, unsigned mask,
bool hierarchy);
unsigned panfrost_tiler_full_size(unsigned width, unsigned height,
unsigned mask, bool hierarchy);
unsigned pan_tiler_full_size(unsigned width, unsigned height, unsigned mask,
bool hierarchy);
unsigned panfrost_choose_hierarchy_mask(unsigned width, unsigned height,
unsigned vertex_count, bool hierarchy);
unsigned pan_choose_hierarchy_mask(unsigned width, unsigned height,
unsigned vertex_count, bool hierarchy);
#if defined(PAN_ARCH) && PAN_ARCH <= 5
static inline unsigned
panfrost_tiler_get_polygon_list_size(unsigned fb_width, unsigned fb_height,
unsigned vertex_count, bool hierarchy)
pan_tiler_get_polygon_list_size(unsigned fb_width, unsigned fb_height,
unsigned vertex_count, bool hierarchy)
{
if (!vertex_count)
return MALI_MIDGARD_TILER_MINIMUM_HEADER_SIZE + 4;
unsigned hierarchy_mask = panfrost_choose_hierarchy_mask(
fb_width, fb_height, vertex_count, hierarchy);
unsigned hierarchy_mask =
pan_choose_hierarchy_mask(fb_width, fb_height, vertex_count, hierarchy);
return panfrost_tiler_full_size(fb_width, fb_height, hierarchy_mask,
hierarchy) +
panfrost_tiler_header_size(fb_width, fb_height, hierarchy_mask,
hierarchy);
return pan_tiler_full_size(fb_width, fb_height, hierarchy_mask, hierarchy) +
pan_tiler_header_size(fb_width, fb_height, hierarchy_mask, hierarchy);
}
#endif
/* Stack sizes */
unsigned panfrost_get_stack_shift(unsigned stack_size);
unsigned pan_get_stack_shift(unsigned stack_size);
unsigned panfrost_get_total_stack_size(unsigned thread_size,
unsigned threads_per_core,
unsigned core_id_range);
unsigned pan_get_total_stack_size(unsigned thread_size,
unsigned threads_per_core,
unsigned core_id_range);
/* Attributes / instancing */
unsigned panfrost_padded_vertex_count(unsigned vertex_count);
unsigned pan_padded_vertex_count(unsigned vertex_count);
unsigned panfrost_compute_magic_divisor(unsigned hw_divisor, unsigned *o_shift,
unsigned *extra_flags);
unsigned pan_compute_magic_divisor(unsigned hw_divisor, unsigned *o_shift,
unsigned *extra_flags);
#ifdef PAN_ARCH
/* Records for gl_VertexID and gl_InstanceID use special encodings on Midgard */
#if PAN_ARCH <= 5
static inline void
panfrost_vertex_id(unsigned padded_count,
struct mali_attribute_vertex_id_packed *attr, bool instanced)
pan_vertex_id(unsigned padded_count,
struct mali_attribute_vertex_id_packed *attr, bool instanced)
{
pan_pack(attr, ATTRIBUTE_VERTEX_ID, cfg) {
if (instanced) {
@ -100,9 +98,8 @@ panfrost_vertex_id(unsigned padded_count,
}
static inline void
panfrost_instance_id(unsigned padded_count,
struct mali_attribute_instance_id_packed *attr,
bool instanced)
pan_instance_id(unsigned padded_count,
struct mali_attribute_instance_id_packed *attr, bool instanced)
{
pan_pack(attr, ATTRIBUTE_INSTANCE_ID, cfg) {
if (!instanced || padded_count <= 1) {
@ -114,8 +111,8 @@ panfrost_instance_id(unsigned padded_count,
/* Can't underflow since padded_count >= 2 */
cfg.divisor_r = __builtin_ctz(padded_count) - 1;
} else {
cfg.divisor_p = panfrost_compute_magic_divisor(
padded_count, &cfg.divisor_r, &cfg.divisor_e);
cfg.divisor_p = pan_compute_magic_divisor(padded_count, &cfg.divisor_r,
&cfg.divisor_e);
}
}
}
@ -125,7 +122,7 @@ panfrost_instance_id(unsigned padded_count,
* need to be able to flip accordingly */
static inline enum mali_func
panfrost_flip_compare_func(enum mali_func f)
pan_flip_compare_func(enum mali_func f)
{
switch (f) {
case MALI_FUNC_LESS:
@ -148,11 +145,10 @@ panfrost_flip_compare_func(enum mali_func f)
* together in a dynamic bitfield, packed by this routine. */
static inline void
panfrost_pack_work_groups_compute(struct mali_invocation_packed *out,
unsigned num_x, unsigned num_y,
unsigned num_z, unsigned size_x,
unsigned size_y, unsigned size_z,
bool quirk_graphics, bool indirect_dispatch)
pan_pack_work_groups_compute(struct mali_invocation_packed *out, unsigned num_x,
unsigned num_y, unsigned num_z, unsigned size_x,
unsigned size_y, unsigned size_z,
bool quirk_graphics, bool indirect_dispatch)
{
/* The values needing packing, in order, and the corresponding shifts.
* Indicies into shift are off-by-one to make the logic easier */
@ -207,7 +203,7 @@ panfrost_pack_work_groups_compute(struct mali_invocation_packed *out,
#if PAN_ARCH >= 5
/* Format conversion */
static inline enum mali_z_internal_format
panfrost_get_z_internal_format(enum pipe_format fmt)
pan_get_z_internal_format(enum pipe_format fmt)
{
switch (fmt) {
case PIPE_FORMAT_Z16_UNORM:
@ -229,8 +225,8 @@ panfrost_get_z_internal_format(enum pipe_format fmt)
#if PAN_ARCH >= 9
static inline void
panfrost_make_resource_table(struct panfrost_ptr base, unsigned index,
uint64_t address, unsigned resource_count)
pan_make_resource_table(struct pan_ptr base, unsigned index, uint64_t address,
unsigned resource_count)
{
if (resource_count == 0)
return;

6
src/panfrost/lib/pan_format.c
View file

@ -78,7 +78,7 @@
BFMT2(pipe##_SRGB, R8G8B8A8, writeback, 1)
const struct pan_blendable_format
GENX(panfrost_blendable_formats)[PIPE_FORMAT_COUNT] = {
GENX(pan_blendable_formats)[PIPE_FORMAT_COUNT] = {
BFMT_SRGB(L8, R8),
BFMT_SRGB(L8A8, R8G8),
BFMT_SRGB(R8, R8),
@ -174,7 +174,7 @@ const struct pan_blendable_format
#endif
/* clang-format off */
const struct panfrost_format GENX(panfrost_pipe_format)[PIPE_FORMAT_COUNT] = {
const struct pan_format GENX(pan_pipe_format)[PIPE_FORMAT_COUNT] = {
FMT(NONE, CONSTANT, 0000, L, VTR_I),
#if PAN_ARCH >= 7
@ -578,7 +578,7 @@ pan_raw_format_mask_midgard(enum pipe_format *formats)
for (unsigned i = 0; i < 8; i++) {
enum pipe_format fmt = formats[i];
unsigned wb_fmt = panfrost_blendable_formats_v6[fmt].writeback;
unsigned wb_fmt = pan_blendable_formats_v6[fmt].writeback;
if (wb_fmt < MALI_COLOR_FORMAT_R8)
out |= BITFIELD_BIT(i);

66
src/panfrost/lib/pan_format.h
View file

@ -125,7 +125,7 @@ typedef uint32_t mali_pixel_format;
#define PAN_BIND_VERTEX_BUFFER BITFIELD_BIT(3)
#define PAN_BIND_STORAGE_IMAGE BITFIELD_BIT(4)
struct panfrost_format {
struct pan_format {
uint32_t hw : 22;
uint32_t texfeat_bit : 5;
uint32_t bind : 5;
@ -139,29 +139,29 @@ struct pan_blendable_format {
mali_pixel_format bifrost[2];
};
#define panfrost_blendable_formats_v4 panfrost_blendable_formats_v5
#define pan_blendable_formats_v4 pan_blendable_formats_v5
extern const struct pan_blendable_format
panfrost_blendable_formats_v5[PIPE_FORMAT_COUNT];
pan_blendable_formats_v5[PIPE_FORMAT_COUNT];
extern const struct pan_blendable_format
panfrost_blendable_formats_v6[PIPE_FORMAT_COUNT];
pan_blendable_formats_v6[PIPE_FORMAT_COUNT];
extern const struct pan_blendable_format
panfrost_blendable_formats_v7[PIPE_FORMAT_COUNT];
pan_blendable_formats_v7[PIPE_FORMAT_COUNT];
extern const struct pan_blendable_format
panfrost_blendable_formats_v9[PIPE_FORMAT_COUNT];
pan_blendable_formats_v9[PIPE_FORMAT_COUNT];
extern const struct pan_blendable_format
panfrost_blendable_formats_v10[PIPE_FORMAT_COUNT];
pan_blendable_formats_v10[PIPE_FORMAT_COUNT];
extern const struct pan_blendable_format
panfrost_blendable_formats_v12[PIPE_FORMAT_COUNT];
pan_blendable_formats_v12[PIPE_FORMAT_COUNT];
extern const struct pan_blendable_format
panfrost_blendable_formats_v13[PIPE_FORMAT_COUNT];
pan_blendable_formats_v13[PIPE_FORMAT_COUNT];
uint8_t pan_raw_format_mask_midgard(enum pipe_format *formats);
static inline const struct pan_blendable_format *
panfrost_blendable_format_table(unsigned arch)
pan_blendable_format_table(unsigned arch)
{
switch (arch) {
#define FMT_TABLE(x) case x: return panfrost_blendable_formats_v ## x
#define FMT_TABLE(x) case x: return pan_blendable_formats_v ## x
FMT_TABLE(4);
FMT_TABLE(5);
FMT_TABLE(6);
@ -177,20 +177,20 @@ panfrost_blendable_format_table(unsigned arch)
}
}
#define panfrost_pipe_format_v4 panfrost_pipe_format_v5
extern const struct panfrost_format panfrost_pipe_format_v5[PIPE_FORMAT_COUNT];
extern const struct panfrost_format panfrost_pipe_format_v6[PIPE_FORMAT_COUNT];
extern const struct panfrost_format panfrost_pipe_format_v7[PIPE_FORMAT_COUNT];
extern const struct panfrost_format panfrost_pipe_format_v9[PIPE_FORMAT_COUNT];
extern const struct panfrost_format panfrost_pipe_format_v10[PIPE_FORMAT_COUNT];
extern const struct panfrost_format panfrost_pipe_format_v12[PIPE_FORMAT_COUNT];
extern const struct panfrost_format panfrost_pipe_format_v13[PIPE_FORMAT_COUNT];
#define pan_pipe_format_v4 pan_pipe_format_v5
extern const struct pan_format pan_pipe_format_v5[PIPE_FORMAT_COUNT];
extern const struct pan_format pan_pipe_format_v6[PIPE_FORMAT_COUNT];
extern const struct pan_format pan_pipe_format_v7[PIPE_FORMAT_COUNT];
extern const struct pan_format pan_pipe_format_v9[PIPE_FORMAT_COUNT];
extern const struct pan_format pan_pipe_format_v10[PIPE_FORMAT_COUNT];
extern const struct pan_format pan_pipe_format_v12[PIPE_FORMAT_COUNT];
extern const struct pan_format pan_pipe_format_v13[PIPE_FORMAT_COUNT];
static inline const struct panfrost_format *
panfrost_format_table(unsigned arch)
static inline const struct pan_format *
pan_format_table(unsigned arch)
{
switch (arch) {
#define FMT_TABLE(x) case x: return panfrost_pipe_format_v ## x
#define FMT_TABLE(x) case x: return pan_pipe_format_v ## x
FMT_TABLE(4);
FMT_TABLE(5);
FMT_TABLE(6);
@ -213,7 +213,7 @@ panfrost_format_table(unsigned arch)
((MALI_CHANNEL_##B) << 6) | ((MALI_CHANNEL_##A) << 9))
static inline unsigned
panfrost_get_default_swizzle(unsigned components)
pan_get_default_swizzle(unsigned components)
{
switch (components) {
case 1:
@ -289,7 +289,8 @@ struct pan_decomposed_swizzle
#define MALI_EXTRACT_INDEX(pixfmt) (((pixfmt) >> 12) & 0xFF)
static inline bool panfrost_format_is_yuv(enum pipe_format f)
static inline bool
pan_format_is_yuv(enum pipe_format f)
{
enum util_format_layout layout = util_format_description(f)->layout;
@ -300,29 +301,28 @@ static inline bool panfrost_format_is_yuv(enum pipe_format f)
}
#ifdef PAN_ARCH
static inline const struct panfrost_format *
GENX(panfrost_format_from_pipe_format)(enum pipe_format f)
static inline const struct pan_format *
GENX(pan_format_from_pipe_format)(enum pipe_format f)
{
return &GENX(panfrost_pipe_format)[f];
return &GENX(pan_pipe_format)[f];
}
static inline const struct pan_blendable_format *
GENX(panfrost_blendable_format_from_pipe_format)(enum pipe_format f)
GENX(pan_blendable_format_from_pipe_format)(enum pipe_format f)
{
return &GENX(panfrost_blendable_formats)[f];
return &GENX(pan_blendable_formats)[f];
}
#if PAN_ARCH >= 6
static inline unsigned
GENX(panfrost_dithered_format_from_pipe_format)(enum pipe_format f, bool dithered)
GENX(pan_dithered_format_from_pipe_format)(enum pipe_format f, bool dithered)
{
mali_pixel_format pixfmt =
GENX(panfrost_blendable_formats)[f].bifrost[dithered];
mali_pixel_format pixfmt = GENX(pan_blendable_formats)[f].bifrost[dithered];
/* Formats requiring blend shaders are stored raw in the tilebuffer and will
* have 0 as their pixel format. Assumes dithering is set, I don't know of a
* case when it makes sense to turn off dithering. */
return pixfmt ?: GENX(panfrost_format_from_pipe_format)(f)->hw;
return pixfmt ?: GENX(pan_format_from_pipe_format)(f)->hw;
}
#endif
#endif

16
src/panfrost/lib/pan_indirect_dispatch.c
View file

@ -106,7 +106,7 @@ pan_indirect_dispatch_init(struct pan_indirect_dispatch_meta *meta)
nir_pop_if(&b, NULL);
struct panfrost_compile_inputs inputs = {
struct pan_compile_inputs inputs = {
.gpu_id = meta->gpu_id,
};
struct pan_shader_info shader_info;
@ -124,16 +124,13 @@ pan_indirect_dispatch_init(struct pan_indirect_dispatch_meta *meta)
shader_info.push.count =
DIV_ROUND_UP(sizeof(struct pan_indirect_dispatch_info), 4);
struct panfrost_ptr bin =
pan_pool_alloc_aligned(meta->bin_pool, binary.size, 64);
struct pan_ptr bin = pan_pool_alloc_aligned(meta->bin_pool, binary.size, 64);
memcpy(bin.cpu, binary.data, binary.size);
util_dynarray_fini(&binary);
struct panfrost_ptr rsd =
pan_pool_alloc_desc(meta->desc_pool, RENDERER_STATE);
struct panfrost_ptr tsd =
pan_pool_alloc_desc(meta->desc_pool, LOCAL_STORAGE);
struct pan_ptr rsd = pan_pool_alloc_desc(meta->desc_pool, RENDERER_STATE);
struct pan_ptr tsd = pan_pool_alloc_desc(meta->desc_pool, LOCAL_STORAGE);
pan_cast_and_pack(rsd.cpu, RENDERER_STATE, cfg) {
pan_shader_prepare_rsd(&shader_info, bin.gpu, &cfg);
@ -152,15 +149,14 @@ GENX(pan_indirect_dispatch_emit)(struct pan_indirect_dispatch_meta *meta,
struct pan_pool *pool, struct pan_jc *jc,
const struct pan_indirect_dispatch_info *inputs)
{
struct panfrost_ptr job = pan_pool_alloc_desc(pool, COMPUTE_JOB);
struct pan_ptr job = pan_pool_alloc_desc(pool, COMPUTE_JOB);
void *invocation = pan_section_ptr(job.cpu, COMPUTE_JOB, INVOCATION);
/* If we haven't compiled the indirect dispatch shader yet, do it now */
if (!meta->rsd)
pan_indirect_dispatch_init(meta);
panfrost_pack_work_groups_compute(invocation, 1, 1, 1, 1, 1, 1, false,
false);
pan_pack_work_groups_compute(invocation, 1, 1, 1, 1, 1, 1, false, false);
pan_section_pack(job.cpu, COMPUTE_JOB, PARAMETERS, cfg) {
cfg.job_task_split = 2;

2
src/panfrost/lib/pan_indirect_dispatch.h
View file

@ -33,7 +33,7 @@ struct pan_jc;
struct pan_pool;
struct pan_indirect_dispatch_meta {
struct panfrost_ubo_push push;
struct pan_ubo_push push;
unsigned gpu_id;

9
src/panfrost/lib/pan_jc.h
View file

@ -157,7 +157,7 @@ job_uses_tiling(enum mali_job_type type)
static inline unsigned
pan_jc_add_job(struct pan_jc *jc, enum mali_job_type type, bool barrier,
bool suppress_prefetch, unsigned local_dep, unsigned global_dep,
const struct panfrost_ptr *job, bool inject)
const struct pan_ptr *job, bool inject)
{
if (job_uses_tiling(type)) {
/* Tiler jobs must be chained, and on Midgard, the first tiler
@ -233,12 +233,11 @@ pan_jc_add_job(struct pan_jc *jc, enum mali_job_type type, bool barrier,
/* Generates a write value job, used to initialize the tiler structures. Note
* this is called right before frame submission. */
static inline struct panfrost_ptr
pan_jc_initialize_tiler(struct pan_pool *pool,
struct pan_jc *jc,
static inline struct pan_ptr
pan_jc_initialize_tiler(struct pan_pool *pool, struct pan_jc *jc,
uint64_t polygon_list)
{
struct panfrost_ptr transfer = {0};
struct pan_ptr transfer = {0};
/* Check if we even need tiling */
if (PAN_ARCH >= 6 || !jc->first_tiler)

2
src/panfrost/lib/pan_layout.c
View file

@ -122,7 +122,7 @@ static void
init_slice_crc_info(unsigned arch, struct pan_image_slice_layout *slice,
unsigned width, unsigned height, unsigned offset)
{
unsigned checksum_region_size = panfrost_meta_tile_size(arch);
unsigned checksum_region_size = pan_meta_tile_size(arch);
unsigned checksum_x_tile_per_region =
(checksum_region_size / CHECKSUM_TILE_WIDTH);
unsigned checksum_y_tile_per_region =

14
src/panfrost/lib/pan_pool.h
View file

@ -30,7 +30,7 @@
#include "util/u_dynarray.h"
struct panfrost_ptr {
struct pan_ptr {
/* CPU address */
void *cpu;
@ -54,12 +54,12 @@ pan_pool_init(struct pan_pool *pool, size_t slab_size)
/* Represents a fat pointer for GPU-mapped memory, returned from the transient
* allocator and not used for much else */
struct panfrost_ptr pan_pool_alloc_aligned(struct pan_pool *pool, size_t sz,
unsigned alignment);
struct pan_ptr pan_pool_alloc_aligned(struct pan_pool *pool, size_t sz,
unsigned alignment);
#define PAN_POOL_ALLOCATOR(pool_subclass, alloc_func) \
struct panfrost_ptr pan_pool_alloc_aligned(struct pan_pool *p, size_t sz, \
unsigned alignment) \
struct pan_ptr pan_pool_alloc_aligned(struct pan_pool *p, size_t sz, \
unsigned alignment) \
{ \
pool_subclass *pool = container_of(p, pool_subclass, base); \
return alloc_func(pool, sz, alignment); \
@ -69,7 +69,7 @@ static inline uint64_t
pan_pool_upload_aligned(struct pan_pool *pool, const void *data, size_t sz,
unsigned alignment)
{
struct panfrost_ptr transfer = pan_pool_alloc_aligned(pool, sz, alignment);
struct pan_ptr transfer = pan_pool_alloc_aligned(pool, sz, alignment);
if (transfer.cpu)
memcpy(transfer.cpu, data, sz);
@ -102,7 +102,7 @@ struct pan_desc_alloc_info {
__VA_ARGS__, {0}, \
}
static inline struct panfrost_ptr
static inline struct pan_ptr
pan_pool_alloc_descs(struct pan_pool *pool,
const struct pan_desc_alloc_info *descs)
{

44
src/panfrost/lib/pan_props.c
View file

@ -50,7 +50,7 @@
/* Table of supported Mali GPUs */
/* clang-format off */
const struct panfrost_model panfrost_model_list[] = {
const struct pan_model pan_model_list[] = {
MODEL(0x600, 0, "T600", "T60x", NO_ANISO, 8192, 8192, {}),
MODEL(0x620, 0, "T620", "T62x", NO_ANISO, 8192, 8192, {}),
MODEL(0x720, 0, "T720", "T72x", NO_ANISO, 8192, 8192, { .no_hierarchical_tiling = true }),
@ -91,41 +91,41 @@ const struct panfrost_model panfrost_model_list[] = {
* Look up a supported model by its GPU ID, or return NULL if the model is not
* supported at this time.
*/
const struct panfrost_model *
panfrost_get_model(uint32_t gpu_id, uint32_t gpu_variant)
const struct pan_model *
pan_get_model(uint32_t gpu_id, uint32_t gpu_variant)
{
for (unsigned i = 0; i < ARRAY_SIZE(panfrost_model_list); ++i) {
if (panfrost_model_list[i].gpu_id == gpu_id &&
panfrost_model_list[i].gpu_variant == gpu_variant)
return &panfrost_model_list[i];
for (unsigned i = 0; i < ARRAY_SIZE(pan_model_list); ++i) {
if (pan_model_list[i].gpu_id == gpu_id &&
pan_model_list[i].gpu_variant == gpu_variant)
return &pan_model_list[i];
}
return NULL;
}
unsigned
panfrost_query_l2_slices(const struct pan_kmod_dev_props *props)
pan_query_l2_slices(const struct pan_kmod_dev_props *props)
{
/* L2_SLICES is MEM_FEATURES[11:8] minus(1) */
return ((props->mem_features >> 8) & 0xF) + 1;
}
struct panfrost_tiler_features
panfrost_query_tiler_features(const struct pan_kmod_dev_props *props)
struct pan_tiler_features
pan_query_tiler_features(const struct pan_kmod_dev_props *props)
{
/* Default value (2^9 bytes and 8 levels) to match old behaviour */
uint32_t raw = props->tiler_features;
/* Bin size is log2 in the first byte, max levels in the second byte */
return (struct panfrost_tiler_features){
return (struct pan_tiler_features){
.bin_size = (1 << (raw & BITFIELD_MASK(5))),
.max_levels = (raw >> 8) & BITFIELD_MASK(4),
};
}
unsigned
panfrost_query_core_count(const struct pan_kmod_dev_props *props,
unsigned *core_id_range)
pan_query_core_count(const struct pan_kmod_dev_props *props,
unsigned *core_id_range)
{
/* On older kernels, worst-case to 16 cores */
@ -142,14 +142,14 @@ panfrost_query_core_count(const struct pan_kmod_dev_props *props,
}
unsigned
panfrost_query_thread_tls_alloc(const struct pan_kmod_dev_props *props)
pan_query_thread_tls_alloc(const struct pan_kmod_dev_props *props)
{
return props->max_tls_instance_per_core ?: props->max_threads_per_core;
}
unsigned
panfrost_compute_max_thread_count(const struct pan_kmod_dev_props *props,
unsigned work_reg_count)
pan_compute_max_thread_count(const struct pan_kmod_dev_props *props,
unsigned work_reg_count)
{
unsigned aligned_reg_count;
@ -168,7 +168,7 @@ panfrost_compute_max_thread_count(const struct pan_kmod_dev_props *props,
}
uint32_t
panfrost_query_compressed_formats(const struct pan_kmod_dev_props *props)
pan_query_compressed_formats(const struct pan_kmod_dev_props *props)
{
return props->texture_features[0];
}
@ -177,7 +177,7 @@ panfrost_query_compressed_formats(const struct pan_kmod_dev_props *props)
* may omit it, signaled as a nonzero value in the AFBC_FEATURES property. */
bool
panfrost_query_afbc(const struct pan_kmod_dev_props *props)
pan_query_afbc(const struct pan_kmod_dev_props *props)
{
unsigned reg = props->afbc_features;
@ -188,7 +188,7 @@ panfrost_query_afbc(const struct pan_kmod_dev_props *props)
* may omit it, signaled in bit 25 of TEXTURE_FEATURES_0 property. */
bool
panfrost_query_afrc(const struct pan_kmod_dev_props *props)
pan_query_afrc(const struct pan_kmod_dev_props *props)
{
return (pan_arch(props->gpu_prod_id) >= 10) &&
(props->texture_features[0] & (1 << 25));
@ -202,7 +202,7 @@ panfrost_query_afrc(const struct pan_kmod_dev_props *props)
* size for the particular variant. The CORE_FEATURES register might help.
*/
unsigned
panfrost_query_optimal_tib_size(const struct panfrost_model *model)
pan_query_optimal_tib_size(const struct pan_model *model)
{
/* Preconditions ensure the returned value is a multiple of 1 KiB, the
* granularity of the colour buffer allocation field.
@ -214,7 +214,7 @@ panfrost_query_optimal_tib_size(const struct panfrost_model *model)
}
unsigned
panfrost_query_optimal_z_tib_size(const struct panfrost_model *model)
pan_query_optimal_z_tib_size(const struct pan_model *model)
{
/* Preconditions ensure the returned value is a multiple of 1 KiB, the
* granularity of the colour buffer allocation field.
@ -226,7 +226,7 @@ panfrost_query_optimal_z_tib_size(const struct panfrost_model *model)
}
uint64_t
panfrost_clamp_to_usable_va_range(const struct pan_kmod_dev *dev, uint64_t va)
pan_clamp_to_usable_va_range(const struct pan_kmod_dev *dev, uint64_t va)
{
struct pan_kmod_va_range user_va_range =
pan_kmod_dev_query_user_va_range(dev);

48
src/panfrost/lib/pan_props.h
View file

@ -36,7 +36,7 @@ struct pan_kmod_dev;
struct pan_kmod_dev_props;
/** Implementation-defined tiler features */
struct panfrost_tiler_features {
struct pan_tiler_features {
/** Number of bytes per tiler bin */
unsigned bin_size;
@ -45,7 +45,7 @@ struct panfrost_tiler_features {
unsigned max_levels;
};
struct panfrost_model {
struct pan_model {
/* GPU ID */
uint32_t gpu_id;
@ -80,37 +80,33 @@ struct panfrost_model {
} quirks;
};
const struct panfrost_model *panfrost_get_model(uint32_t gpu_id,
uint32_t gpu_variant);
const struct pan_model *pan_get_model(uint32_t gpu_id, uint32_t gpu_variant);
unsigned panfrost_query_l2_slices(const struct pan_kmod_dev_props *props);
unsigned pan_query_l2_slices(const struct pan_kmod_dev_props *props);
struct panfrost_tiler_features
panfrost_query_tiler_features(const struct pan_kmod_dev_props *props);
struct pan_tiler_features
pan_query_tiler_features(const struct pan_kmod_dev_props *props);
unsigned
panfrost_query_thread_tls_alloc(const struct pan_kmod_dev_props *props);
unsigned pan_query_thread_tls_alloc(const struct pan_kmod_dev_props *props);
uint32_t
panfrost_query_compressed_formats(const struct pan_kmod_dev_props *props);
uint32_t pan_query_compressed_formats(const struct pan_kmod_dev_props *props);
unsigned panfrost_query_core_count(const struct pan_kmod_dev_props *props,
unsigned *core_id_range);
unsigned pan_query_core_count(const struct pan_kmod_dev_props *props,
unsigned *core_id_range);
bool panfrost_query_afbc(const struct pan_kmod_dev_props *props);
bool pan_query_afbc(const struct pan_kmod_dev_props *props);
bool panfrost_query_afrc(const struct pan_kmod_dev_props *props);
bool pan_query_afrc(const struct pan_kmod_dev_props *props);
unsigned panfrost_query_optimal_tib_size(const struct panfrost_model *model);
unsigned pan_query_optimal_tib_size(const struct pan_model *model);
unsigned panfrost_query_optimal_z_tib_size(const struct panfrost_model *model);
unsigned pan_query_optimal_z_tib_size(const struct pan_model *model);
uint64_t panfrost_clamp_to_usable_va_range(const struct pan_kmod_dev *dev,
uint64_t va);
uint64_t pan_clamp_to_usable_va_range(const struct pan_kmod_dev *dev,
uint64_t va);
unsigned
panfrost_compute_max_thread_count(const struct pan_kmod_dev_props *props,
unsigned work_reg_count);
unsigned pan_compute_max_thread_count(const struct pan_kmod_dev_props *props,
unsigned work_reg_count);
/* Returns the architecture version given a GPU ID, either from a table for
* old-style Midgard versions or directly for new-style Bifrost/Valhall
@ -136,7 +132,7 @@ pan_arch(unsigned gpu_id)
}
static inline unsigned
panfrost_max_effective_tile_size(unsigned arch)
pan_max_effective_tile_size(unsigned arch)
{
if (arch >= 12)
return 64 * 64;
@ -148,7 +144,7 @@ panfrost_max_effective_tile_size(unsigned arch)
}
static inline unsigned
panfrost_meta_tile_size(unsigned arch)
pan_meta_tile_size(unsigned arch)
{
if (arch >= 12)
return 64;
@ -160,9 +156,9 @@ panfrost_meta_tile_size(unsigned arch)
* the optimal tilebuffer-size, but not always.
*/
static inline unsigned
pan_get_max_tib_size(unsigned arch, const struct panfrost_model *model)
pan_get_max_tib_size(unsigned arch, const struct pan_model *model)
{
unsigned tib_size = panfrost_query_optimal_tib_size(model);
unsigned tib_size = pan_query_optimal_tib_size(model);
/* On V5, as well as V6 and later, we can disable pipelining to gain some
* extra tib memory.

7
src/panfrost/lib/pan_samples.c
View file

@ -136,13 +136,14 @@ const struct mali_sample_positions sample_position_lut[] = {
};
/* clang-format on */
unsigned panfrost_sample_positions_buffer_size(void)
unsigned
pan_sample_positions_buffer_size(void)
{
return sizeof(sample_position_lut);
}
unsigned
panfrost_sample_positions_offset(enum mali_sample_pattern pattern)
pan_sample_positions_offset(enum mali_sample_pattern pattern)
{
assert(pattern < ARRAY_SIZE(sample_position_lut));
unsigned offset = (pattern * sizeof(sample_position_lut[0]));
@ -150,7 +151,7 @@ panfrost_sample_positions_offset(enum mali_sample_pattern pattern)
}
void
panfrost_upload_sample_positions(void *buffer)
pan_upload_sample_positions(void *buffer)
{
memcpy(buffer, sample_position_lut, sizeof(sample_position_lut));
}

6
src/panfrost/lib/pan_samples.h
View file

@ -26,10 +26,10 @@
#include <genxml/gen_macros.h>
unsigned panfrost_sample_positions_buffer_size(void);
unsigned pan_sample_positions_buffer_size(void);
void panfrost_upload_sample_positions(void *buffer);
void pan_upload_sample_positions(void *buffer);
unsigned panfrost_sample_positions_offset(enum mali_sample_pattern pattern);
unsigned pan_sample_positions_offset(enum mali_sample_pattern pattern);
#endif

6
src/panfrost/lib/pan_scratch.c
View file

@ -64,7 +64,7 @@
/* Computes log_stack_size = log2(ceil(s / 16)) */
unsigned
panfrost_get_stack_shift(unsigned stack_size)
pan_get_stack_shift(unsigned stack_size)
{
if (stack_size)
return util_logbase2_ceil(DIV_ROUND_UP(stack_size, 16));
@ -75,8 +75,8 @@ panfrost_get_stack_shift(unsigned stack_size)
/* Computes the aligned stack size given the shift and thread count. */
unsigned
panfrost_get_total_stack_size(unsigned thread_size, unsigned threads_per_core,
unsigned core_id_range)
pan_get_total_stack_size(unsigned thread_size, unsigned threads_per_core,
unsigned core_id_range)
{
unsigned size_per_thread =
(thread_size == 0) ? 0

8
src/panfrost/lib/pan_shader.c
View file

@ -23,7 +23,7 @@
*/
#include "pan_shader.h"
#include "panfrost/clc/panfrost_compile.h"
#include "panfrost/clc/pan_compile.h"
#include "pan_blend.h"
#include "pan_format.h"
@ -54,7 +54,7 @@ pan_shader_get_compiler_options(unsigned arch)
}
void
pan_shader_compile(nir_shader *s, struct panfrost_compile_inputs *inputs,
pan_shader_compile(nir_shader *s, struct pan_compile_inputs *inputs,
struct util_dynarray *binary, struct pan_shader_info *info)
{
unsigned arch = pan_arch(inputs->gpu_id);
@ -101,7 +101,7 @@ pan_shader_compile(nir_shader *s, struct panfrost_compile_inputs *inputs,
/* Store the mask of special varyings, in case we need to emit ADs
* later. */
info->varyings.fixed_varyings =
panfrost_get_fixed_varying_mask(s->info.outputs_written);
pan_get_fixed_varying_mask(s->info.outputs_written);
}
break;
case MESA_SHADER_FRAGMENT:
@ -155,7 +155,7 @@ pan_shader_compile(nir_shader *s, struct panfrost_compile_inputs *inputs,
/* Store the mask of special varyings, in case we need to emit ADs
* later. */
info->varyings.fixed_varyings =
panfrost_get_fixed_varying_mask(s->info.inputs_read);
pan_get_fixed_varying_mask(s->info.inputs_read);
}
break;
default:

4
src/panfrost/lib/pan_shader.h
View file

@ -38,7 +38,7 @@ void bifrost_preprocess_nir(nir_shader *nir, unsigned gpu_id);
void midgard_preprocess_nir(nir_shader *nir, unsigned gpu_id);
static unsigned
panfrost_get_fixed_varying_mask(unsigned varyings_used)
pan_get_fixed_varying_mask(unsigned varyings_used)
{
return (varyings_used & BITFIELD_MASK(VARYING_SLOT_VAR0)) &
~VARYING_BIT_POS & ~VARYING_BIT_PSIZ;
@ -65,7 +65,7 @@ pan_shader_disassemble(FILE *fp, const void *code, size_t size, unsigned gpu_id,
disassemble_midgard(fp, code, size, gpu_id, verbose);
}
void pan_shader_compile(nir_shader *nir, struct panfrost_compile_inputs *inputs,
void pan_shader_compile(nir_shader *nir, struct pan_compile_inputs *inputs,
struct util_dynarray *binary,
struct pan_shader_info *info);

68
src/panfrost/lib/pan_texture.c
View file

@ -164,10 +164,10 @@ GENX(pan_texture_estimate_payload_size)(const struct pan_image_view *iview)
element_size = pan_size(PLANE);
/* 2-plane and 3-plane YUV use two plane descriptors. */
if (panfrost_format_is_yuv(iview->format) && iview->planes[1] != NULL)
if (pan_format_is_yuv(iview->format) && iview->planes[1] != NULL)
element_size *= 2;
#elif PAN_ARCH == 7
if (panfrost_format_is_yuv(iview->format))
if (pan_format_is_yuv(iview->format))
element_size = pan_size(MULTIPLANAR_SURFACE);
else
element_size = pan_size(SURFACE_WITH_STRIDE);
@ -288,20 +288,20 @@ pan_emit_multiplanar_surface(const struct pan_image_section_info *sections,
}
#endif
struct panfrost_tex_extent {
struct pan_tex_extent {
unsigned width;
unsigned height;
unsigned depth;
};
/* Special case for iview->buf.size as the passed layout->width is incorrect */
static struct panfrost_tex_extent
panfrost_texture_buf_get_extent(const struct pan_image_view *iview,
const struct pan_image_layout *layout)
static struct pan_tex_extent
pan_texture_buf_get_extent(const struct pan_image_view *iview,
const struct pan_image_layout *layout)
{
assert(iview->buf.size);
struct panfrost_tex_extent extent;
struct pan_tex_extent extent;
assert(iview->dim == MALI_TEXTURE_DIMENSION_1D);
assert(!iview->first_level && !iview->last_level);
@ -376,7 +376,7 @@ pan_clump_format(enum pipe_format format)
assert(!util_format_is_compressed(format));
/* YUV-sampling has special cases */
if (panfrost_format_is_yuv(format)) {
if (pan_format_is_yuv(format)) {
switch (format) {
case PIPE_FORMAT_R8G8_R8B8_UNORM:
case PIPE_FORMAT_G8R8_B8R8_UNORM:
@ -466,9 +466,9 @@ pan_emit_plane(const struct pan_image_view *iview,
cfg.row_stride = row_stride;
cfg.size = layout->slices[level].size;
#if PAN_ARCH >= 10
struct panfrost_tex_extent extent;
struct pan_tex_extent extent;
if (iview->buf.size)
extent = panfrost_texture_buf_get_extent(iview, layout);
extent = pan_texture_buf_get_extent(iview, layout);
else {
extent.width = u_minify(layout->width, level);
extent.height = u_minify(layout->height, level);
@ -486,7 +486,7 @@ pan_emit_plane(const struct pan_image_view *iview,
if (is_chroma_2p) {
cfg.two_plane_yuv_chroma.secondary_pointer =
sections[plane_index + 1].pointer;
} else if (!panfrost_format_is_yuv(layout->format)) {
} else if (!pan_format_is_yuv(layout->format)) {
cfg.slice_stride = layout->nr_samples > 1
? surface_stride
: pan_image_surface_stride(layout, level);
@ -560,7 +560,7 @@ pan_emit_surface(const struct pan_image_view *iview, unsigned level,
unsigned index, unsigned sample, void **payload)
{
#if PAN_ARCH == 7 || PAN_ARCH >= 9
if (panfrost_format_is_yuv(iview->format)) {
if (pan_format_is_yuv(iview->format)) {
struct pan_image_section_info sections[MAX_IMAGE_PLANES] = {0};
unsigned plane_count = 0;
@ -715,11 +715,10 @@ GENX(pan_texture_afbc_reswizzle)(struct pan_image_view *iview)
* This allows us to support AFBC(BGR) as well as AFBC(RGB).
*/
assert(!util_format_is_depth_or_stencil(iview->format));
assert(!panfrost_format_is_yuv(iview->format));
assert(!pan_format_is_yuv(iview->format));
assert(pan_format_supports_afbc(PAN_ARCH, iview->format));
uint32_t mali_format =
GENX(panfrost_format_from_pipe_format)(iview->format)->hw;
uint32_t mali_format = GENX(pan_format_from_pipe_format)(iview->format)->hw;
enum mali_rgb_component_order orig = mali_format & BITFIELD_MASK(12);
struct pan_decomposed_swizzle decomposed = GENX(pan_decompose_swizzle)(orig);
@ -730,7 +729,7 @@ GENX(pan_texture_afbc_reswizzle)(struct pan_image_view *iview)
/* Only RGB<->BGR should be allowed for AFBC */
assert(iview->format != PIPE_FORMAT_NONE);
assert(decomposed.pre ==
(GENX(panfrost_format_from_pipe_format)(iview->format)->hw &
(GENX(pan_format_from_pipe_format)(iview->format)->hw &
BITFIELD_MASK(12)));
/* Compose the new swizzle */
@ -740,7 +739,7 @@ GENX(pan_texture_afbc_reswizzle)(struct pan_image_view *iview)
#endif
static unsigned
panfrost_texture_get_array_size(const struct pan_image_view *iview)
pan_texture_get_array_size(const struct pan_image_view *iview)
{
unsigned array_size = iview->last_layer - iview->first_layer + 1;
@ -753,21 +752,21 @@ panfrost_texture_get_array_size(const struct pan_image_view *iview)
}
/* Multiplanar YUV textures require 2 surface descriptors. */
if (panfrost_format_is_yuv(iview->format) && PAN_ARCH >= 9 &&
if (pan_format_is_yuv(iview->format) && PAN_ARCH >= 9 &&
pan_image_view_get_plane(iview, 1) != NULL)
array_size *= 2;
return array_size;
}
static struct panfrost_tex_extent
panfrost_texture_get_extent(const struct pan_image_view *iview,
static struct pan_tex_extent
pan_texture_get_extent(const struct pan_image_view *iview,
const struct pan_image_layout *layout)
{
if (iview->buf.size)
return panfrost_texture_buf_get_extent(iview, layout);
return pan_texture_buf_get_extent(iview, layout);
struct panfrost_tex_extent extent;
struct pan_tex_extent extent;
extent.width = u_minify(layout->width, iview->first_level);
extent.height = u_minify(layout->height, iview->first_level);
extent.depth = u_minify(layout->depth, iview->first_level);
@ -800,15 +799,14 @@ panfrost_texture_get_extent(const struct pan_image_view *iview,
void
GENX(pan_texture_emit)(const struct pan_image_view *iview,
struct mali_texture_packed *out,
const struct panfrost_ptr *payload)
const struct pan_ptr *payload)
{
const struct util_format_description *desc =
util_format_description(iview->format);
const struct pan_image *first_plane = pan_image_view_get_first_plane(iview);
const struct pan_image_layout *layout = &first_plane->layout;
uint32_t mali_format = GENX(pan_format_from_pipe_format)(iview->format)->hw;
uint32_t mali_format =
GENX(panfrost_format_from_pipe_format)(iview->format)->hw;
if (desc->layout == UTIL_FORMAT_LAYOUT_ASTC && iview->astc.narrow &&
desc->colorspace != UTIL_FORMAT_COLORSPACE_SRGB) {
mali_format = MALI_PACK_FMT(RGBA8_UNORM, RGBA, L);
@ -816,10 +814,10 @@ GENX(pan_texture_emit)(const struct pan_image_view *iview,
pan_emit_texture_payload(iview, payload->cpu);
unsigned array_size = panfrost_texture_get_array_size(iview);
unsigned array_size = pan_texture_get_array_size(iview);
struct panfrost_tex_extent extent =
panfrost_texture_get_extent(iview, layout);
struct pan_tex_extent extent =
pan_texture_get_extent(iview, layout);
pan_pack(out, TEXTURE, cfg) {
cfg.dimension = iview->dim;
@ -830,7 +828,7 @@ GENX(pan_texture_emit)(const struct pan_image_view *iview,
cfg.depth = extent.depth;
else
cfg.sample_count = layout->nr_samples;
cfg.swizzle = panfrost_translate_swizzle_4(iview->swizzle);
cfg.swizzle = pan_translate_swizzle_4(iview->swizzle);
#if PAN_ARCH >= 9
cfg.texel_interleave = (layout->modifier != DRM_FORMAT_MOD_LINEAR) ||
util_format_is_compressed(iview->format);
@ -856,7 +854,7 @@ GENX(pan_texture_emit)(const struct pan_image_view *iview,
void
GENX(pan_storage_texture_emit)(const struct pan_image_view *iview,
struct mali_texture_packed *out,
const struct panfrost_ptr *payload)
const struct pan_ptr *payload)
{
const struct util_format_description *desc =
util_format_description(iview->format);
@ -868,7 +866,7 @@ GENX(pan_storage_texture_emit)(const struct pan_image_view *iview,
assert(!drm_is_afrc(layout->modifier));
uint32_t mali_format =
GENX(panfrost_format_from_pipe_format)(iview->format)->hw;
GENX(pan_format_from_pipe_format)(iview->format)->hw;
if (desc->layout == UTIL_FORMAT_LAYOUT_ASTC && iview->astc.narrow &&
desc->colorspace != UTIL_FORMAT_COLORSPACE_SRGB) {
mali_format = MALI_PACK_FMT(RGBA8_UNORM, RGBA, L);
@ -876,10 +874,10 @@ GENX(pan_storage_texture_emit)(const struct pan_image_view *iview,
pan_emit_texture_payload(iview, payload->cpu);
unsigned array_size = panfrost_texture_get_array_size(iview);
unsigned array_size = pan_texture_get_array_size(iview);
struct panfrost_tex_extent extent =
panfrost_texture_get_extent(iview, layout);
struct pan_tex_extent extent =
pan_texture_get_extent(iview, layout);
static const unsigned char rgba_swizzle[4] = {
PIPE_SWIZZLE_X,
@ -908,7 +906,7 @@ GENX(pan_storage_texture_emit)(const struct pan_image_view *iview,
cfg.minimum_lod = 0;
cfg.maximum_lod = 0;
cfg.minimum_level = 0;
cfg.swizzle = panfrost_translate_swizzle_4(rgba_swizzle);
cfg.swizzle = pan_translate_swizzle_4(rgba_swizzle);
}
}
#endif

6
src/panfrost/lib/pan_texture.h
View file

@ -34,7 +34,7 @@
#include "pan_image.h"
struct panfrost_ptr;
struct pan_ptr;
struct mali_texture_packed;
#if PAN_ARCH >= 7
@ -50,12 +50,12 @@ GENX(pan_texture_estimate_payload_size)(const struct pan_image_view *iview);
void GENX(pan_texture_emit)(const struct pan_image_view *iview,
struct mali_texture_packed *out,
const struct panfrost_ptr *payload);
const struct pan_ptr *payload);
#if PAN_ARCH >= 9
void GENX(pan_storage_texture_emit)(const struct pan_image_view *iview,
struct mali_texture_packed *out,
const struct panfrost_ptr *payload);
const struct pan_ptr *payload);
#endif
#endif

34
src/panfrost/lib/pan_tiler.c
View file

@ -219,8 +219,8 @@
#define FULL_BYTES_PER_TILE 0x200
static unsigned
panfrost_hierarchy_size(unsigned width, unsigned height, unsigned mask,
unsigned bytes_per_tile)
pan_hierarchy_size(unsigned width, unsigned height, unsigned mask,
unsigned bytes_per_tile)
{
unsigned size = PROLOGUE_SIZE;
@ -250,8 +250,8 @@ panfrost_hierarchy_size(unsigned width, unsigned height, unsigned mask,
*/
static unsigned
panfrost_flat_size(unsigned width, unsigned height, unsigned dim,
unsigned bytes_per_tile)
pan_flat_size(unsigned width, unsigned height, unsigned dim,
unsigned bytes_per_tile)
{
/* First, extract the tile dimensions */
unsigned tw = (1 << (dim & 0b111)) * 8;
@ -268,14 +268,13 @@ panfrost_flat_size(unsigned width, unsigned height, unsigned dim,
/* Given a hierarchy mask and a framebuffer size, compute the header size */
unsigned
panfrost_tiler_header_size(unsigned width, unsigned height, unsigned mask,
bool hierarchy)
pan_tiler_header_size(unsigned width, unsigned height, unsigned mask,
bool hierarchy)
{
if (hierarchy)
return panfrost_hierarchy_size(width, height, mask,
HEADER_BYTES_PER_TILE);
return pan_hierarchy_size(width, height, mask, HEADER_BYTES_PER_TILE);
else
return panfrost_flat_size(width, height, mask, HEADER_BYTES_PER_TILE);
return pan_flat_size(width, height, mask, HEADER_BYTES_PER_TILE);
}
/* The combined header/body is sized similarly (but it is significantly
@ -284,21 +283,20 @@ panfrost_tiler_header_size(unsigned width, unsigned height, unsigned mask,
*/
unsigned
panfrost_tiler_full_size(unsigned width, unsigned height, unsigned mask,
bool hierarchy)
pan_tiler_full_size(unsigned width, unsigned height, unsigned mask,
bool hierarchy)
{
if (hierarchy)
return panfrost_hierarchy_size(width, height, mask, FULL_BYTES_PER_TILE);
return pan_hierarchy_size(width, height, mask, FULL_BYTES_PER_TILE);
else
return panfrost_flat_size(width, height, mask, FULL_BYTES_PER_TILE);
return pan_flat_size(width, height, mask, FULL_BYTES_PER_TILE);
}
/* On GPUs without hierarchical tiling, we choose a tile size directly and
* stuff it into the field otherwise known as hierarchy mask (not a mask). */
static unsigned
panfrost_choose_tile_size(unsigned width, unsigned height,
unsigned vertex_count)
pan_choose_tile_size(unsigned width, unsigned height, unsigned vertex_count)
{
/* Figure out the ideal tile size. Eventually a heuristic should be
* used for this */
@ -320,8 +318,8 @@ panfrost_choose_tile_size(unsigned width, unsigned height,
}
unsigned
panfrost_choose_hierarchy_mask(unsigned width, unsigned height,
unsigned vertex_count, bool hierarchy)
pan_choose_hierarchy_mask(unsigned width, unsigned height,
unsigned vertex_count, bool hierarchy)
{
/* If there is no geometry, we don't bother enabling anything */
@ -329,7 +327,7 @@ panfrost_choose_hierarchy_mask(unsigned width, unsigned height,
return 0x00;
if (!hierarchy)
return panfrost_choose_tile_size(width, height, vertex_count);
return pan_choose_tile_size(width, height, vertex_count);
/* Heuristic: choose the largest minimum bin size such that there are an
* average of k vertices per bin at the lowest level. This is modeled as:

6
src/panfrost/lib/pan_util.c
View file

@ -21,8 +21,8 @@
* SOFTWARE.
*/
#include <stdio.h>
#include "pan_util.h"
#include <stdio.h>
/* Translate a PIPE swizzle quad to a 12-bit Mali swizzle code. PIPE
* swizzles line up with Mali swizzles for the XYZW01, but PIPE swizzles have
@ -30,7 +30,7 @@
* PIPE swizzles are sparse but Mali swizzles are packed */
unsigned
panfrost_translate_swizzle_4(const unsigned char swizzle[4])
pan_translate_swizzle_4(const unsigned char swizzle[4])
{
unsigned out = 0;
@ -43,7 +43,7 @@ panfrost_translate_swizzle_4(const unsigned char swizzle[4])
}
void
panfrost_invert_swizzle(const unsigned char *in, unsigned char *out)
pan_invert_swizzle(const unsigned char *in, unsigned char *out)
{
/* First, default to all zeroes, both to prevent uninitialized junk
and to provide a known baseline so we can tell when components

6
src/panfrost/lib/pan_util.h
View file

@ -58,9 +58,9 @@
struct pan_blendable_format;
unsigned panfrost_translate_swizzle_4(const unsigned char swizzle[4]);
unsigned pan_translate_swizzle_4(const unsigned char swizzle[4]);
void panfrost_invert_swizzle(const unsigned char *in, unsigned char *out);
void pan_invert_swizzle(const unsigned char *in, unsigned char *out);
void pan_pack_color(const struct pan_blendable_format *blendable_formats,
uint32_t *packed, const union pipe_color_union *color,
@ -69,7 +69,7 @@ void pan_pack_color(const struct pan_blendable_format *blendable_formats,
/* Get the last blend shader, for an erratum workaround on v5 */
static inline uint64_t
panfrost_last_nonnull(uint64_t *ptrs, unsigned count)
pan_last_nonnull(uint64_t *ptrs, unsigned count)
{
for (signed i = ((signed)count - 1); i >= 0; --i) {
if (ptrs[i])

4
src/panfrost/lib/tests/test-clear.c
View file

@ -176,8 +176,8 @@ main(int argc, const char **argv)
for (unsigned i = 0; i < ARRAY_SIZE(clear_tests); ++i) {
struct test T = clear_tests[i];
uint32_t packed[4];
pan_pack_color(panfrost_blendable_formats_v7, &packed[0], &T.colour,
T.format, T.dithered);
pan_pack_color(pan_blendable_formats_v7, &packed[0], &T.colour, T.format,
T.dithered);
ASSERT_EQ(T.packed, packed);
}

2
src/panfrost/midgard/compiler.h
View file

@ -257,7 +257,7 @@ enum midgard_rt_id {
#define MIDGARD_MAX_SAMPLE_ITER 16
typedef struct compiler_context {
const struct panfrost_compile_inputs *inputs;
const struct pan_compile_inputs *inputs;
nir_shader *nir;
struct pan_shader_info *info;
gl_shader_stage stage;

4
src/panfrost/midgard/midgard_compile.c
View file

@ -2991,7 +2991,7 @@ mir_add_writeout_loops(compiler_context *ctx)
void
midgard_compile_shader_nir(nir_shader *nir,
const struct panfrost_compile_inputs *inputs,
const struct pan_compile_inputs *inputs,
struct util_dynarray *binary,
struct pan_shader_info *info)
{
@ -3183,7 +3183,7 @@ midgard_compile_shader_nir(nir_shader *nir,
* register count for thread count */
stats.threads = (stats.registers <= 4) ? 4 : (stats.registers <= 8) ? 2 : 1;
info->stats.isa = PANFROST_STAT_MIDGARD;
info->stats.isa = PAN_STAT_MIDGARD;
info->stats.midgard = stats;
if ((midgard_debug & MIDGARD_DBG_SHADERDB) && !nir->info.internal) {

2
src/panfrost/midgard/midgard_compile.h
View file

@ -32,7 +32,7 @@
void midgard_preprocess_nir(nir_shader *nir, unsigned gpu_id);
void midgard_compile_shader_nir(nir_shader *nir,
const struct panfrost_compile_inputs *inputs,
const struct pan_compile_inputs *inputs,
struct util_dynarray *binary,
struct pan_shader_info *info);

4
src/panfrost/midgard/mir_promote_uniforms.c
View file

@ -109,7 +109,7 @@ mir_analyze_ranges(compiler_context *ctx)
* sophisticated. Select from the last UBO first to prioritize sysvals. */
static void
mir_pick_ubo(struct panfrost_ubo_push *push, struct mir_ubo_analysis *analysis,
mir_pick_ubo(struct pan_ubo_push *push, struct mir_ubo_analysis *analysis,
unsigned max_qwords)
{
unsigned max_words = MIN2(PAN_MAX_PUSH, max_qwords * 4);
@ -124,7 +124,7 @@ mir_pick_ubo(struct panfrost_ubo_push *push, struct mir_ubo_analysis *analysis,
return;
for (unsigned offs = 0; offs < 4; ++offs) {
struct panfrost_ubo_word word = {
struct pan_ubo_word word = {
.ubo = ubo,
.offset = (vec4 * 16) + (offs * 4),
};

10
src/panfrost/perf/pan_gen_perf.py
View file

@ -166,8 +166,8 @@ def main():
c.write("}\n")
current_struct_name = "panfrost_perf_config_%s" % prod.id
c.write("\nconst struct panfrost_perf_config %s = {" % current_struct_name)
current_struct_name = "pan_perf_config_%s" % prod.id
c.write("\nconst struct pan_perf_config %s = {" % current_struct_name)
c.indent(tab_size)
c.write(".name = \"%s\"," % prod.name)
@ -219,12 +219,12 @@ def main():
c.outdent(tab_size)
c.write("}; // %s\n" % current_struct_name)
h.write("extern const struct panfrost_perf_config * panfrost_perf_configs[%u];\n" % len(prods))
h.write("extern const struct pan_perf_config * pan_perf_configs[%u];\n" % len(prods))
c.write("\nconst struct panfrost_perf_config * panfrost_perf_configs[] = {")
c.write("\nconst struct pan_perf_config * pan_perf_configs[] = {")
c.indent(tab_size)
for prod in prods:
c.write("&panfrost_perf_config_%s," % prod.id)
c.write("&pan_perf_config_%s," % prod.id)
c.outdent(tab_size)
c.write("};")

38
src/panfrost/perf/pan_perf.c
View file

@ -39,8 +39,8 @@
#define PAN_SHADER_CORE_INDEX 3
uint32_t
panfrost_perf_counter_read(const struct panfrost_perf_counter *counter,
const struct panfrost_perf *perf)
pan_perf_counter_read(const struct pan_perf_counter *counter,
const struct pan_perf *perf)
{
unsigned offset = perf->category_offset[counter->category_index];
offset += counter->offset;
@ -58,19 +58,19 @@ panfrost_perf_counter_read(const struct panfrost_perf_counter *counter,
return ret;
}
static const struct panfrost_perf_config *
panfrost_lookup_counters(const char *name)
static const struct pan_perf_config *
pan_lookup_counters(const char *name)
{
for (unsigned i = 0; i < ARRAY_SIZE(panfrost_perf_configs); ++i) {
if (strcmp(panfrost_perf_configs[i]->name, name) == 0)
return panfrost_perf_configs[i];
for (unsigned i = 0; i < ARRAY_SIZE(pan_perf_configs); ++i) {
if (strcmp(pan_perf_configs[i]->name, name) == 0)
return pan_perf_configs[i];
}
return NULL;
}
void
panfrost_perf_init(struct panfrost_perf *perf, int fd)
pan_perf_init(struct pan_perf *perf, int fd)
{
ASSERTED drmVersionPtr version = drmGetVersion(fd);
@ -85,20 +85,20 @@ panfrost_perf_init(struct panfrost_perf *perf, int fd)
struct pan_kmod_dev_props props = {};
pan_kmod_dev_query_props(perf->dev, &props);
const struct panfrost_model *model =
panfrost_get_model(props.gpu_prod_id, props.gpu_variant);
const struct pan_model *model =
pan_get_model(props.gpu_prod_id, props.gpu_variant);
if (model == NULL)
unreachable("Invalid GPU ID");
perf->cfg = panfrost_lookup_counters(model->performance_counters);
perf->cfg = pan_lookup_counters(model->performance_counters);
if (perf->cfg == NULL)
unreachable("Performance counters missing!");
// Generally counter blocks are laid out in the following order:
// Job manager, tiler, one or more L2 caches, and one or more shader cores.
unsigned l2_slices = panfrost_query_l2_slices(&props);
panfrost_query_core_count(&props, &perf->core_id_range);
unsigned l2_slices = pan_query_l2_slices(&props);
pan_query_core_count(&props, &perf->core_id_range);
uint32_t n_blocks = 2 + l2_slices + perf->core_id_range;
perf->n_counter_values = PAN_COUNTERS_PER_CATEGORY * n_blocks;
@ -112,7 +112,7 @@ panfrost_perf_init(struct panfrost_perf *perf, int fd)
}
static int
panfrost_perf_query(struct panfrost_perf *perf, uint32_t enable)
pan_perf_query(struct pan_perf *perf, uint32_t enable)
{
struct drm_panfrost_perfcnt_enable perfcnt_enable = {enable, 0};
return pan_kmod_ioctl(perf->dev->fd, DRM_IOCTL_PANFROST_PERFCNT_ENABLE,
@ -120,19 +120,19 @@ panfrost_perf_query(struct panfrost_perf *perf, uint32_t enable)
}
int
panfrost_perf_enable(struct panfrost_perf *perf)
pan_perf_enable(struct pan_perf *perf)
{
return panfrost_perf_query(perf, 1 /* enable */);
return pan_perf_query(perf, 1 /* enable */);
}
int
panfrost_perf_disable(struct panfrost_perf *perf)
pan_perf_disable(struct pan_perf *perf)
{
return panfrost_perf_query(perf, 0 /* disable */);
return pan_perf_query(perf, 0 /* disable */);
}
int
panfrost_perf_dump(struct panfrost_perf *perf)
pan_perf_dump(struct pan_perf *perf)
{
// Dump performance counter values to the memory buffer pointed to by
// counter_values

36
src/panfrost/perf/pan_perf.h
View file

@ -35,11 +35,11 @@ extern "C" {
struct pan_kmod_dev;
struct pan_kmod_dev_props;
struct panfrost_model;
struct panfrost_perf_category;
struct panfrost_perf;
struct pan_model;
struct pan_perf_category;
struct pan_perf;
enum panfrost_perf_counter_units {
enum pan_perf_counter_units {
PAN_PERF_COUNTER_UNITS_CYCLES,
PAN_PERF_COUNTER_UNITS_JOBS,
PAN_PERF_COUNTER_UNITS_TASKS,
@ -57,37 +57,37 @@ enum panfrost_perf_counter_units {
PAN_PERF_COUNTER_UNITS_ISSUES,
};
struct panfrost_perf_counter {
struct pan_perf_counter {
const char *name;
const char *desc;
const char *symbol_name;
enum panfrost_perf_counter_units units;
enum pan_perf_counter_units units;
// Offset of this counter's value within the category
uint32_t offset;
unsigned category_index;
};
struct panfrost_perf_category {
struct pan_perf_category {
const char *name;
struct panfrost_perf_counter counters[PAN_PERF_MAX_COUNTERS];
struct pan_perf_counter counters[PAN_PERF_MAX_COUNTERS];
uint32_t n_counters;
/* Offset of this category within the counters memory block */
unsigned offset;
};
struct panfrost_perf_config {
struct pan_perf_config {
const char *name;
struct panfrost_perf_category categories[PAN_PERF_MAX_CATEGORIES];
struct pan_perf_category categories[PAN_PERF_MAX_CATEGORIES];
uint32_t n_categories;
};
struct panfrost_perf {
struct pan_perf {
struct pan_kmod_dev *dev;
unsigned core_id_range;
const struct panfrost_perf_config *cfg;
const struct pan_perf_config *cfg;
// Memory where to dump counter values
uint32_t *counter_values;
@ -97,16 +97,16 @@ struct panfrost_perf {
unsigned category_offset[PAN_PERF_MAX_CATEGORIES];
};
uint32_t panfrost_perf_counter_read(const struct panfrost_perf_counter *counter,
const struct panfrost_perf *perf);
uint32_t pan_perf_counter_read(const struct pan_perf_counter *counter,
const struct pan_perf *perf);
void panfrost_perf_init(struct panfrost_perf *perf, int fd);
void pan_perf_init(struct pan_perf *perf, int fd);
int panfrost_perf_enable(struct panfrost_perf *perf);
int pan_perf_enable(struct pan_perf *perf);
int panfrost_perf_disable(struct panfrost_perf *perf);
int pan_perf_disable(struct pan_perf *perf);
int panfrost_perf_dump(struct panfrost_perf *perf);
int pan_perf_dump(struct pan_perf *perf);
#if defined(__cplusplus)
} // extern "C"

16
src/panfrost/perf/quick.c
View file

@ -15,11 +15,11 @@ main(void)
}
void *ctx = ralloc_context(NULL);
struct panfrost_perf *perf = rzalloc(ctx, struct panfrost_perf);
struct pan_perf *perf = rzalloc(ctx, struct pan_perf);
panfrost_perf_init(perf, fd);
pan_perf_init(perf, fd);
int ret = panfrost_perf_enable(perf);
int ret = pan_perf_enable(perf);
if (ret < 0) {
fprintf(stderr, "failed to enable counters (%d)\n", ret);
@ -32,22 +32,22 @@ main(void)
sleep(1);
panfrost_perf_dump(perf);
pan_perf_dump(perf);
for (unsigned i = 0; i < perf->cfg->n_categories; ++i) {
const struct panfrost_perf_category *cat = &perf->cfg->categories[i];
const struct pan_perf_category *cat = &perf->cfg->categories[i];
printf("%s\n", cat->name);
for (unsigned j = 0; j < cat->n_counters; ++j) {
const struct panfrost_perf_counter *ctr = &cat->counters[j];
uint32_t val = panfrost_perf_counter_read(ctr, perf);
const struct pan_perf_counter *ctr = &cat->counters[j];
uint32_t val = pan_perf_counter_read(ctr, perf);
printf("%s (%s): %u\n", ctr->name, ctr->symbol_name, val);
}
printf("\n");
}
if (panfrost_perf_disable(perf) < 0) {
if (pan_perf_disable(perf) < 0) {
fprintf(stderr, "failed to disable counters\n");
exit(1);
}

23
src/panfrost/shared/pan_minmax_cache.c
View file

@ -47,7 +47,7 @@
* otherwise create a key that encodes the start, count, and index size
*/
static uint64_t
panfrost_calc_cache_key(struct panfrost_minmax_cache *cache, unsigned index_size,
pan_calc_cache_key(struct pan_minmax_cache *cache, unsigned index_size,
unsigned start, unsigned count)
{
uint64_t ht_key;
@ -83,11 +83,11 @@ panfrost_calc_cache_key(struct panfrost_minmax_cache *cache, unsigned index_size
}
bool
panfrost_minmax_cache_get(struct panfrost_minmax_cache *cache, unsigned index_size,
unsigned start, unsigned count,
unsigned *min_index, unsigned *max_index)
pan_minmax_cache_get(struct pan_minmax_cache *cache, unsigned index_size,
unsigned start, unsigned count, unsigned *min_index,
unsigned *max_index)
{
uint64_t ht_key = panfrost_calc_cache_key(cache, index_size, start, count);
uint64_t ht_key = pan_calc_cache_key(cache, index_size, start, count);
bool found = false;
if (!ht_key)
@ -109,11 +109,11 @@ panfrost_minmax_cache_get(struct panfrost_minmax_cache *cache, unsigned index_si
}
void
panfrost_minmax_cache_add(struct panfrost_minmax_cache *cache, unsigned index_size,
unsigned start, unsigned count,
unsigned min_index, unsigned max_index)
pan_minmax_cache_add(struct pan_minmax_cache *cache, unsigned index_size,
unsigned start, unsigned count, unsigned min_index,
unsigned max_index)
{
uint64_t ht_key = panfrost_calc_cache_key(cache, index_size, start, count);
uint64_t ht_key = pan_calc_cache_key(cache, index_size, start, count);
uint64_t value = min_index | (((uint64_t)max_index) << 32);
unsigned index = 0;
@ -136,9 +136,8 @@ panfrost_minmax_cache_add(struct panfrost_minmax_cache *cache, unsigned index_si
* what we've written, and throw out invalid entries. */
void
panfrost_minmax_cache_invalidate(struct panfrost_minmax_cache *cache,
unsigned index_size,
size_t offset, size_t size)
pan_minmax_cache_invalidate(struct pan_minmax_cache *cache, unsigned index_size,
size_t offset, size_t size)
{
/* Ensure there is a cache to invalidate and a write */
if (!cache)

22
src/panfrost/shared/pan_minmax_cache.h
View file

@ -33,25 +33,23 @@
#define PANFROST_MINMAX_SIZE 64
struct panfrost_minmax_cache {
struct pan_minmax_cache {
uint64_t keys[PANFROST_MINMAX_SIZE];
uint64_t values[PANFROST_MINMAX_SIZE];
unsigned size;
unsigned index;
};
bool panfrost_minmax_cache_get(struct panfrost_minmax_cache *cache,
unsigned index_size,
unsigned start, unsigned count,
unsigned *min_index, unsigned *max_index);
bool pan_minmax_cache_get(struct pan_minmax_cache *cache, unsigned index_size,
unsigned start, unsigned count, unsigned *min_index,
unsigned *max_index);
void panfrost_minmax_cache_add(struct panfrost_minmax_cache *cache,
unsigned index_size,
unsigned start, unsigned count,
unsigned min_index, unsigned max_index);
void pan_minmax_cache_add(struct pan_minmax_cache *cache, unsigned index_size,
unsigned start, unsigned count, unsigned min_index,
unsigned max_index);
void panfrost_minmax_cache_invalidate(struct panfrost_minmax_cache *cache,
unsigned index_size,
size_t offset, size_t size);
void pan_minmax_cache_invalidate(struct pan_minmax_cache *cache,
unsigned index_size, size_t offset,
size_t size);
#endif

85
src/panfrost/shared/pan_tiling.c
View file

@ -170,7 +170,7 @@ typedef struct {
*/
#define TILED_ACCESS_TYPE(pixel_t, shift) \
static ALWAYS_INLINE void panfrost_access_tiled_image_##pixel_t( \
static ALWAYS_INLINE void pan_access_tiled_image_##pixel_t( \
void *dst, void *src, uint16_t sx, uint16_t sy, uint16_t w, uint16_t h, \
uint32_t dst_stride, uint32_t src_stride, bool is_store) \
{ \
@ -248,11 +248,11 @@ TILED_ACCESS_TYPE(pan_uint128_t, 4);
* so we divide here. Alignment is assumed.
*/
static void
panfrost_access_tiled_image_generic(void *dst, void *src, unsigned sx,
unsigned sy, unsigned w, unsigned h,
uint32_t dst_stride, uint32_t src_stride,
const struct util_format_description *desc,
bool _is_store)
pan_access_tiled_image_generic(void *dst, void *src, unsigned sx, unsigned sy,
unsigned w, unsigned h, uint32_t dst_stride,
uint32_t src_stride,
const struct util_format_description *desc,
bool _is_store)
{
unsigned bpp = desc->block.bits;
@ -280,10 +280,9 @@ panfrost_access_tiled_image_generic(void *dst, void *src, unsigned sx,
(((_x)-orig_x) * (bpp / 8)))
static ALWAYS_INLINE void
panfrost_access_tiled_image(void *dst, void *src, unsigned x, unsigned y,
unsigned w, unsigned h, uint32_t dst_stride,
uint32_t src_stride, enum pipe_format format,
bool is_store)
pan_access_tiled_image(void *dst, void *src, unsigned x, unsigned y, unsigned w,
unsigned h, uint32_t dst_stride, uint32_t src_stride,
enum pipe_format format, bool is_store)
{
const struct util_format_description *desc = util_format_description(format);
unsigned bpp = desc->block.bits;
@ -298,8 +297,8 @@ panfrost_access_tiled_image(void *dst, void *src, unsigned x, unsigned y,
if (desc->block.width > 1 ||
!util_is_power_of_two_nonzero(desc->block.bits)) {
panfrost_access_tiled_image_generic(
dst, (void *)src, x, y, w, h, dst_stride, src_stride, desc, is_store);
pan_access_tiled_image_generic(dst, (void *)src, x, y, w, h, dst_stride,
src_stride, desc, is_store);
return;
}
@ -316,9 +315,8 @@ panfrost_access_tiled_image(void *dst, void *src, unsigned x, unsigned y,
if (first_full_tile_y != y) {
unsigned dist = MIN2(first_full_tile_y - y, h);
panfrost_access_tiled_image_generic(dst, OFFSET(src, x, y), x, y, w, dist,
dst_stride, src_stride, desc,
is_store);
pan_access_tiled_image_generic(dst, OFFSET(src, x, y), x, y, w, dist,
dst_stride, src_stride, desc, is_store);
if (dist == h)
return;
@ -331,9 +329,9 @@ panfrost_access_tiled_image(void *dst, void *src, unsigned x, unsigned y,
if (last_full_tile_y != (y + h)) {
unsigned dist = (y + h) - last_full_tile_y;
panfrost_access_tiled_image_generic(
dst, OFFSET(src, x, last_full_tile_y), x, last_full_tile_y, w, dist,
dst_stride, src_stride, desc, is_store);
pan_access_tiled_image_generic(dst, OFFSET(src, x, last_full_tile_y), x,
last_full_tile_y, w, dist, dst_stride,
src_stride, desc, is_store);
h -= dist;
}
@ -342,9 +340,8 @@ panfrost_access_tiled_image(void *dst, void *src, unsigned x, unsigned y,
if (first_full_tile_x != x) {
unsigned dist = MIN2(first_full_tile_x - x, w);
panfrost_access_tiled_image_generic(dst, OFFSET(src, x, y), x, y, dist, h,
dst_stride, src_stride, desc,
is_store);
pan_access_tiled_image_generic(dst, OFFSET(src, x, y), x, y, dist, h,
dst_stride, src_stride, desc, is_store);
if (dist == w)
return;
@ -357,28 +354,28 @@ panfrost_access_tiled_image(void *dst, void *src, unsigned x, unsigned y,
if (last_full_tile_x != (x + w)) {
unsigned dist = (x + w) - last_full_tile_x;
panfrost_access_tiled_image_generic(
dst, OFFSET(src, last_full_tile_x, y), last_full_tile_x, y, dist, h,
dst_stride, src_stride, desc, is_store);
pan_access_tiled_image_generic(dst, OFFSET(src, last_full_tile_x, y),
last_full_tile_x, y, dist, h, dst_stride,
src_stride, desc, is_store);
w -= dist;
}
if (bpp == 8)
panfrost_access_tiled_image_uint8_t(dst, OFFSET(src, x, y), x, y, w, h,
dst_stride, src_stride, is_store);
pan_access_tiled_image_uint8_t(dst, OFFSET(src, x, y), x, y, w, h,
dst_stride, src_stride, is_store);
else if (bpp == 16)
panfrost_access_tiled_image_uint16_t(dst, OFFSET(src, x, y), x, y, w, h,
dst_stride, src_stride, is_store);
pan_access_tiled_image_uint16_t(dst, OFFSET(src, x, y), x, y, w, h,
dst_stride, src_stride, is_store);
else if (bpp == 32)
panfrost_access_tiled_image_uint32_t(dst, OFFSET(src, x, y), x, y, w, h,
dst_stride, src_stride, is_store);
pan_access_tiled_image_uint32_t(dst, OFFSET(src, x, y), x, y, w, h,
dst_stride, src_stride, is_store);
else if (bpp == 64)
panfrost_access_tiled_image_uint64_t(dst, OFFSET(src, x, y), x, y, w, h,
dst_stride, src_stride, is_store);
pan_access_tiled_image_uint64_t(dst, OFFSET(src, x, y), x, y, w, h,
dst_stride, src_stride, is_store);
else if (bpp == 128)
panfrost_access_tiled_image_pan_uint128_t(
dst, OFFSET(src, x, y), x, y, w, h, dst_stride, src_stride, is_store);
pan_access_tiled_image_pan_uint128_t(dst, OFFSET(src, x, y), x, y, w, h,
dst_stride, src_stride, is_store);
}
/**
@ -387,19 +384,19 @@ panfrost_access_tiled_image(void *dst, void *src, unsigned x, unsigned y,
* are aligned to the block size.
*/
void
panfrost_store_tiled_image(void *dst, const void *src, unsigned x, unsigned y,
unsigned w, unsigned h, uint32_t dst_stride,
uint32_t src_stride, enum pipe_format format)
pan_store_tiled_image(void *dst, const void *src, unsigned x, unsigned y,
unsigned w, unsigned h, uint32_t dst_stride,
uint32_t src_stride, enum pipe_format format)
{
panfrost_access_tiled_image(dst, (void *)src, x, y, w, h, dst_stride,
src_stride, format, true);
pan_access_tiled_image(dst, (void *)src, x, y, w, h, dst_stride, src_stride,
format, true);
}
void
panfrost_load_tiled_image(void *dst, const void *src, unsigned x, unsigned y,
unsigned w, unsigned h, uint32_t dst_stride,
uint32_t src_stride, enum pipe_format format)
pan_load_tiled_image(void *dst, const void *src, unsigned x, unsigned y,
unsigned w, unsigned h, uint32_t dst_stride,
uint32_t src_stride, enum pipe_format format)
{
panfrost_access_tiled_image((void *)src, dst, x, y, w, h, src_stride,
dst_stride, format, false);
pan_access_tiled_image((void *)src, dst, x, y, w, h, src_stride, dst_stride,
format, false);
}

14
src/panfrost/shared/pan_tiling.h
View file

@ -47,10 +47,9 @@ extern "C" {
* @src_stride Number of bytes between adjacent rows of tiles in source.
* @format Format of the source and destination image
*/
void panfrost_load_tiled_image(void *dst, const void *src, unsigned x,
unsigned y, unsigned w, unsigned h,
uint32_t dst_stride, uint32_t src_stride,
enum pipe_format format);
void pan_load_tiled_image(void *dst, const void *src, unsigned x, unsigned y,
unsigned w, unsigned h, uint32_t dst_stride,
uint32_t src_stride, enum pipe_format format);
/**
* Store a linear staging image to a rectangular region of a tiled image.
@ -65,10 +64,9 @@ void panfrost_load_tiled_image(void *dst, const void *src, unsigned x,
* @src_stride Stride in bytes of linear source
* @format Format of the source and destination image
*/
void panfrost_store_tiled_image(void *dst, const void *src, unsigned x,
unsigned y, unsigned w, unsigned h,
uint32_t dst_stride, uint32_t src_stride,
enum pipe_format format);
void pan_store_tiled_image(void *dst, const void *src, unsigned x, unsigned y,
unsigned w, unsigned h, uint32_t dst_stride,
uint32_t src_stride, enum pipe_format format);
#ifdef __cplusplus
} /* extern C */

8
src/panfrost/shared/test/test-tiling.cpp
View file

@ -150,15 +150,15 @@ test(unsigned width, unsigned height, unsigned rx, unsigned ry, unsigned rw,
((uint8_t *)linear)[i] = (i & 0xFF);
}
panfrost_store_tiled_image(tiled, linear, rx, ry, rw, rh, dst_stride,
src_stride, format);
pan_store_tiled_image(tiled, linear, rx, ry, rw, rh, dst_stride,
src_stride, format);
} else {
for (unsigned i = 0; i < bpp * tiled_width * tiled_height; ++i) {
((uint8_t *)tiled)[i] = (i & 0xFF);
}
panfrost_load_tiled_image(linear, tiled, rx, ry, rw, rh, dst_stride,
src_stride, format);
pan_load_tiled_image(linear, tiled, rx, ry, rw, rh, dst_stride,
src_stride, format);
}
ref_access_tiled(ref, store ? linear : tiled, rx, ry, rw, rh, dst_stride,

2
src/panfrost/tools/panfrost_texfeatures.c
View file

@ -75,7 +75,7 @@ main(void)
pan_kmod_dev_query_props(dev, &props);
uint32_t supported = panfrost_query_compressed_formats(&props);
uint32_t supported = pan_query_compressed_formats(&props);
bool all_ok = true;
printf("System-on-chip compressed texture support:"

5
src/panfrost/util/pan_ir.c
View file

@ -71,10 +71,9 @@ pan_to_bytemask(unsigned bytes, unsigned mask)
/* Could optimize with a better data structure if anyone cares, TODO: profile */
unsigned
pan_lookup_pushed_ubo(struct panfrost_ubo_push *push, unsigned ubo,
unsigned offs)
pan_lookup_pushed_ubo(struct pan_ubo_push *push, unsigned ubo, unsigned offs)
{
struct panfrost_ubo_word word = {.ubo = ubo, .offset = offs};
struct pan_ubo_word word = {.ubo = ubo, .offset = offs};
for (unsigned i = 0; i < push->count; ++i) {
if (memcmp(push->words + i, &word, sizeof(word)) == 0)

14
src/panfrost/util/pan_ir.h
View file

@ -79,23 +79,23 @@ enum { PAN_VERTEX_ID = 16, PAN_INSTANCE_ID = 17, PAN_MAX_ATTRIBUTE };
/* Architectural invariants (Midgard and Bifrost): UBO must be <= 2^16 bytes so
* an offset to a word must be < 2^16. There are less than 2^8 UBOs */
struct panfrost_ubo_word {
struct pan_ubo_word {
uint16_t ubo;
uint16_t offset;
};
struct panfrost_ubo_push {
struct pan_ubo_push {
unsigned count;
struct panfrost_ubo_word words[PAN_MAX_PUSH];
struct pan_ubo_word words[PAN_MAX_PUSH];
};
/* Helper for searching the above. Note this is O(N) to the number of pushed
* constants, do not run in the draw call hot path */
unsigned pan_lookup_pushed_ubo(struct panfrost_ubo_push *push, unsigned ubo,
unsigned pan_lookup_pushed_ubo(struct pan_ubo_push *push, unsigned ubo,
unsigned offs);
struct panfrost_compile_inputs {
struct pan_compile_inputs {
unsigned gpu_id;
bool is_blend, is_blit;
struct {
@ -197,7 +197,7 @@ struct pan_shader_info {
unsigned tls_size;
unsigned wls_size;
struct panfrost_stats stats, stats_idvs_varying;
struct pan_stats stats, stats_idvs_varying;
/* Bit mask of preloaded registers */
uint64_t preload;
@ -303,7 +303,7 @@ struct pan_shader_info {
/* UBOs to push to Register Mapped Uniforms (Midgard) or Fast Access
* Uniforms (Bifrost) */
struct panfrost_ubo_push push;
struct pan_ubo_push push;
uint32_t ubo_mask;

12
src/panfrost/vulkan/bifrost/panvk_vX_meta_desc_copy.c
View file

@ -294,7 +294,7 @@ panvk_meta_desc_copy_rsd(struct panvk_device *dev)
nir_channel(&b, nir_load_global_invocation_id(&b, 32), 0);
single_desc_copy(&b, desc_copy_id);
struct panfrost_compile_inputs inputs = {
struct pan_compile_inputs inputs = {
.gpu_id = phys_dev->kmod.props.gpu_prod_id,
};
@ -337,11 +337,11 @@ panvk_per_arch(meta_get_copy_desc_job)(
struct panvk_cmd_buffer *cmdbuf, const struct panvk_shader *shader,
const struct panvk_descriptor_state *desc_state,
const struct panvk_shader_desc_state *shader_desc_state,
uint32_t attrib_buf_idx_offset, struct panfrost_ptr *job_desc)
uint32_t attrib_buf_idx_offset, struct pan_ptr *job_desc)
{
struct panvk_device *dev = to_panvk_device(cmdbuf->vk.base.device);
*job_desc = (struct panfrost_ptr){0};
*job_desc = (struct pan_ptr){0};
if (!shader)
return VK_SUCCESS;
@ -387,7 +387,7 @@ panvk_per_arch(meta_get_copy_desc_job)(
if (!desc_copy_rsd)
return VK_ERROR_OUT_OF_DEVICE_MEMORY;
struct panfrost_ptr push_uniforms =
struct pan_ptr push_uniforms =
panvk_cmd_alloc_dev_mem(cmdbuf, desc, sizeof(copy_info), 16);
if (!push_uniforms.gpu)
@ -406,7 +406,7 @@ panvk_per_arch(meta_get_copy_desc_job)(
assert(copy_count - 1 < BITFIELD_MASK(10));
panfrost_pack_work_groups_compute(
pan_pack_work_groups_compute(
pan_section_ptr(job_desc->cpu, COMPUTE_JOB, INVOCATION), 1, 1, 1,
copy_count, 1, 1, false, false);
@ -417,7 +417,7 @@ panvk_per_arch(meta_get_copy_desc_job)(
}
struct pan_tls_info tlsinfo = {0};
struct panfrost_ptr tls = panvk_cmd_alloc_desc(cmdbuf, LOCAL_STORAGE);
struct pan_ptr tls = panvk_cmd_alloc_desc(cmdbuf, LOCAL_STORAGE);
if (!tls.gpu)
return VK_ERROR_OUT_OF_DEVICE_MEMORY;

4
src/panfrost/vulkan/csf/panvk_cmd_buffer.h
View file

@ -347,7 +347,7 @@ panvk_cs_reg_whitelist(cmdbuf_regs, {PANVK_CS_REG_RUN_IDVS_SR_START,
#define cs_update_cmdbuf_regs(__b) panvk_cs_reg_upd_ctx(__b, cmdbuf_regs)
struct panvk_tls_state {
struct panfrost_ptr desc;
struct pan_ptr desc;
struct pan_tls_info info;
unsigned max_wg_count;
};
@ -434,7 +434,7 @@ panvk_per_arch(calculate_task_axis_and_increment)(
* utilization. */
unsigned threads_per_wg = shader->cs.local_size.x * shader->cs.local_size.y *
shader->cs.local_size.z;
unsigned max_thread_cnt = panfrost_compute_max_thread_count(
unsigned max_thread_cnt = pan_compute_max_thread_count(
&phys_dev->kmod.props, shader->info.work_reg_count);
unsigned threads_per_task = threads_per_wg;
unsigned local_size[3] = {

11
src/panfrost/vulkan/csf/panvk_vX_cmd_buffer.c
View file

@ -61,13 +61,13 @@ emit_tls(struct panvk_cmd_buffer *cmdbuf)
struct panvk_physical_device *phys_dev =
to_panvk_physical_device(dev->vk.physical);
unsigned core_id_range;
panfrost_query_core_count(&phys_dev->kmod.props, &core_id_range);
pan_query_core_count(&phys_dev->kmod.props, &core_id_range);
if (cmdbuf->state.tls.info.tls.size) {
unsigned thread_tls_alloc =
panfrost_query_thread_tls_alloc(&phys_dev->kmod.props);
unsigned size = panfrost_get_total_stack_size(
cmdbuf->state.tls.info.tls.size, thread_tls_alloc, core_id_range);
pan_query_thread_tls_alloc(&phys_dev->kmod.props);
unsigned size = pan_get_total_stack_size(cmdbuf->state.tls.info.tls.size,
thread_tls_alloc, core_id_range);
cmdbuf->state.tls.info.tls.ptr =
panvk_cmd_alloc_dev_mem(cmdbuf, tls, size, 4096).gpu;
@ -648,8 +648,7 @@ alloc_cs_buffer(void *cookie)
struct panvk_cmd_buffer *cmdbuf = cookie;
const unsigned capacity = 64 * 1024 / sizeof(uint64_t);
struct panfrost_ptr ptr =
panvk_cmd_alloc_dev_mem(cmdbuf, cs, capacity * 8, 64);
struct pan_ptr ptr = panvk_cmd_alloc_dev_mem(cmdbuf, cs, capacity * 8, 64);
return (struct cs_buffer){
.cpu = ptr.cpu,

6
src/panfrost/vulkan/csf/panvk_vX_cmd_dispatch.c
View file

@ -44,7 +44,7 @@ prepare_driver_set(struct panvk_cmd_buffer *cmdbuf)
&cmdbuf->state.compute.desc_state;
const struct panvk_shader *cs = cmdbuf->state.compute.shader;
uint32_t desc_count = cs->desc_info.dyn_bufs.count + 1;
struct panfrost_ptr driver_set = panvk_cmd_alloc_dev_mem(
struct pan_ptr driver_set = panvk_cmd_alloc_dev_mem(
cmdbuf, desc, desc_count * PANVK_DESCRIPTOR_SIZE, PANVK_DESCRIPTOR_SIZE);
struct panvk_opaque_desc *descs = driver_set.cpu;
@ -95,7 +95,7 @@ panvk_per_arch(cmd_dispatch_prepare_tls)(struct panvk_cmd_buffer *cmdbuf,
struct panvk_physical_device *phys_dev =
to_panvk_physical_device(cmdbuf->vk.base.device->physical);
struct panfrost_ptr tsd = panvk_cmd_alloc_desc(cmdbuf, LOCAL_STORAGE);
struct pan_ptr tsd = panvk_cmd_alloc_desc(cmdbuf, LOCAL_STORAGE);
if (!tsd.gpu)
return tsd.gpu;
@ -105,7 +105,7 @@ panvk_per_arch(cmd_dispatch_prepare_tls)(struct panvk_cmd_buffer *cmdbuf,
};
unsigned core_id_range;
unsigned core_count =
panfrost_query_core_count(&phys_dev->kmod.props, &core_id_range);
pan_query_core_count(&phys_dev->kmod.props, &core_id_range);
/* Only used for indirect dispatch */
unsigned wg_per_task = 0;

31
src/panfrost/vulkan/csf/panvk_vX_cmd_draw.c
View file

@ -66,7 +66,7 @@ emit_vs_attrib(struct panvk_cmd_buffer *cmdbuf,
if (per_instance)
cfg.offset += cmdbuf->state.gfx.sysvals.vs.base_instance * stride;
cfg.format = GENX(panfrost_format_from_pipe_format)(f)->hw;
cfg.format = GENX(pan_format_from_pipe_format)(f)->hw;
cfg.table = 0;
cfg.buffer_index = buf_idx;
cfg.stride = stride;
@ -93,7 +93,7 @@ emit_vs_attrib(struct panvk_cmd_buffer *cmdbuf,
/* Per-instance, NPOT divisor */
cfg.attribute_type = MALI_ATTRIBUTE_TYPE_1D_NPOT_DIVISOR;
cfg.frequency = MALI_ATTRIBUTE_FREQUENCY_INSTANCE;
cfg.divisor_d = panfrost_compute_magic_divisor(
cfg.divisor_d = pan_compute_magic_divisor(
buf_info->divisor, &cfg.divisor_r, &cfg.divisor_e);
}
}
@ -148,7 +148,7 @@ prepare_vs_driver_set(struct panvk_cmd_buffer *cmdbuf,
const struct panvk_descriptor_state *desc_state =
&cmdbuf->state.gfx.desc_state;
struct panfrost_ptr driver_set = panvk_cmd_alloc_dev_mem(
struct pan_ptr driver_set = panvk_cmd_alloc_dev_mem(
cmdbuf, desc, repeat_count * desc_count * PANVK_DESCRIPTOR_SIZE,
PANVK_DESCRIPTOR_SIZE);
struct panvk_opaque_desc *descs = driver_set.cpu;
@ -234,7 +234,7 @@ emit_varying_descs(const struct panvk_cmd_buffer *cmdbuf,
pan_pack(&descs[i], ATTRIBUTE, cfg) {
cfg.attribute_type = MALI_ATTRIBUTE_TYPE_VERTEX_PACKET;
cfg.offset_enable = false;
cfg.format = GENX(panfrost_format_from_pipe_format)(var->format)->hw;
cfg.format = GENX(pan_format_from_pipe_format)(var->format)->hw;
cfg.table = 61;
cfg.frequency = MALI_ATTRIBUTE_FREQUENCY_VERTEX;
cfg.offset = 1024 + (loc * 16);
@ -259,7 +259,7 @@ prepare_fs_driver_set(struct panvk_cmd_buffer *cmdbuf)
panvk_use_ld_var_buf(fs) ? 0 : fs->desc_info.max_varying_loads;
uint32_t desc_count =
fs->desc_info.dyn_bufs.count + num_varying_attr_descs + 1;
struct panfrost_ptr driver_set = panvk_cmd_alloc_dev_mem(
struct pan_ptr driver_set = panvk_cmd_alloc_dev_mem(
cmdbuf, desc, desc_count * PANVK_DESCRIPTOR_SIZE, PANVK_DESCRIPTOR_SIZE);
struct panvk_opaque_desc *descs = driver_set.cpu;
@ -492,8 +492,7 @@ prepare_blend(struct panvk_cmd_buffer *cmdbuf)
uint32_t bd_count = MAX2(cmdbuf->state.gfx.render.fb.info.rt_count, 1);
struct cs_builder *b =
panvk_get_cs_builder(cmdbuf, PANVK_SUBQUEUE_VERTEX_TILER);
struct panfrost_ptr ptr =
panvk_cmd_alloc_desc_array(cmdbuf, bd_count, BLEND);
struct pan_ptr ptr = panvk_cmd_alloc_desc_array(cmdbuf, bd_count, BLEND);
struct mali_blend_packed *bds = ptr.cpu;
if (bd_count && !ptr.gpu)
@ -830,11 +829,11 @@ get_tiler_desc(struct panvk_cmd_buffer *cmdbuf)
struct panvk_instance *instance =
to_panvk_instance(phys_dev->vk.instance);
bool tracing_enabled = instance->debug_flags & PANVK_DEBUG_TRACE;
struct panfrost_tiler_features tiler_features =
panfrost_query_tiler_features(&phys_dev->kmod.props);
struct pan_tiler_features tiler_features =
pan_query_tiler_features(&phys_dev->kmod.props);
bool simul_use =
cmdbuf->flags & VK_COMMAND_BUFFER_USAGE_SIMULTANEOUS_USE_BIT;
struct panfrost_ptr tiler_desc = {0};
struct pan_ptr tiler_desc = {0};
struct mali_tiler_context_packed tiler_tmpl;
uint32_t td_count = DIV_ROUND_UP(cmdbuf->state.gfx.render.layer_count,
MAX_LAYERS_PER_TILER_DESC);
@ -1161,13 +1160,13 @@ get_fb_descs(struct panvk_cmd_buffer *cmdbuf)
* "
*/
bool copy_fbds = simul_use && cmdbuf->state.gfx.render.tiler;
struct panfrost_ptr fbds = cmdbuf->state.gfx.render.fbds;
struct pan_ptr fbds = cmdbuf->state.gfx.render.fbds;
uint32_t fbd_flags = 0;
uint32_t fbd_ir_pass_offset = fbd_sz * calc_enabled_layer_count(cmdbuf);
fbinfo->sample_positions =
dev->sample_positions->addr.dev +
panfrost_sample_positions_offset(pan_sample_pattern(fbinfo->nr_samples));
pan_sample_positions_offset(pan_sample_pattern(fbinfo->nr_samples));
VkResult result = panvk_per_arch(cmd_fb_preload)(cmdbuf, fbinfo);
if (result != VK_SUCCESS)
@ -1498,7 +1497,7 @@ prepare_ds(struct panvk_cmd_buffer *cmdbuf, struct pan_earlyzs_state earlyzs)
bool test_z = has_depth_att(cmdbuf) && ds->depth.test_enable;
const struct panvk_shader *fs = get_fs(cmdbuf);
struct panfrost_ptr zsd = panvk_cmd_alloc_desc(cmdbuf, DEPTH_STENCIL);
struct pan_ptr zsd = panvk_cmd_alloc_desc(cmdbuf, DEPTH_STENCIL);
if (!zsd.gpu)
return VK_ERROR_OUT_OF_DEVICE_MEMORY;
@ -1565,7 +1564,7 @@ wrap_prev_oq(struct panvk_cmd_buffer *cmdbuf)
return VK_SUCCESS;
uint64_t prev_oq_node = cmdbuf->state.gfx.render.oq.chain;
struct panfrost_ptr new_oq_node = panvk_cmd_alloc_dev_mem(
struct pan_ptr new_oq_node = panvk_cmd_alloc_dev_mem(
cmdbuf, desc, sizeof(struct panvk_cs_occlusion_query), 8);
if (!new_oq_node.gpu)
@ -2526,8 +2525,8 @@ panvk_per_arch(cmd_inherit_render_state)(
/* If a draw was performed, the inherited sample count should match our current sample count */
assert(fbinfo->nr_samples == 0 || inheritance_info->rasterizationSamples == fbinfo->nr_samples);
*fbinfo = (struct pan_fb_info){
.tile_buf_budget = panfrost_query_optimal_tib_size(phys_dev->model),
.z_tile_buf_budget = panfrost_query_optimal_z_tib_size(phys_dev->model),
.tile_buf_budget = pan_query_optimal_tib_size(phys_dev->model),
.z_tile_buf_budget = pan_query_optimal_z_tib_size(phys_dev->model),
.tile_size = fbinfo->tile_size,
.cbuf_allocation = fbinfo->cbuf_allocation,
.nr_samples = inheritance_info->rasterizationSamples,

12
src/panfrost/vulkan/csf/panvk_vX_cmd_precomp.c
View file

@ -32,7 +32,7 @@ panvk_per_arch(dispatch_precomp)(struct panvk_precomp_ctx *ctx,
panvk_per_arch(precomp_cache_get)(dev->precomp_cache, idx);
assert(shader);
struct panfrost_ptr push_uniforms = panvk_cmd_alloc_dev_mem(
struct pan_ptr push_uniforms = panvk_cmd_alloc_dev_mem(
cmdbuf, desc, BIFROST_PRECOMPILED_KERNEL_SYSVALS_SIZE + data_size, 16);
assert(push_uniforms.gpu);
@ -51,19 +51,19 @@ panvk_per_arch(dispatch_precomp)(struct panvk_precomp_ctx *ctx,
if (tlsinfo.tls.size) {
unsigned thread_tls_alloc =
panfrost_query_thread_tls_alloc(&phys_dev->kmod.props);
pan_query_thread_tls_alloc(&phys_dev->kmod.props);
unsigned core_id_range;
panfrost_query_core_count(&phys_dev->kmod.props, &core_id_range);
pan_query_core_count(&phys_dev->kmod.props, &core_id_range);
unsigned size = panfrost_get_total_stack_size(
tlsinfo.tls.size, thread_tls_alloc, core_id_range);
unsigned size = pan_get_total_stack_size(tlsinfo.tls.size,
thread_tls_alloc, core_id_range);
tlsinfo.tls.ptr = panvk_cmd_alloc_dev_mem(cmdbuf, tls, size, 4096).gpu;
assert(tlsinfo.tls.ptr);
}
if (tlsinfo.wls.size) {
unsigned core_id_range;
panfrost_query_core_count(&phys_dev->kmod.props, &core_id_range);
pan_query_core_count(&phys_dev->kmod.props, &core_id_range);
struct pan_compute_dim wg_count = {.x = grid.count[0],
.y = grid.count[1],

3
src/panfrost/vulkan/csf/panvk_vX_utrace.c
View file

@ -136,8 +136,7 @@ alloc_clone_buffer(void *cookie)
const uint32_t size = 4 * 1024;
const uint32_t alignment = 64;
struct panfrost_ptr ptr =
pan_pool_alloc_aligned(&pool->base, size, alignment);
struct pan_ptr ptr = pan_pool_alloc_aligned(&pool->base, size, alignment);
return (struct cs_buffer){
.cpu = ptr.cpu,

8
src/panfrost/vulkan/jm/panvk_cmd_buffer.h
View file

@ -38,7 +38,7 @@ struct panvk_batch {
struct pan_jc vtc_jc;
struct pan_jc frag_jc;
struct {
struct panfrost_ptr desc;
struct pan_ptr desc;
uint32_t desc_stride;
uint32_t bo_count;
@ -49,11 +49,11 @@ struct panvk_batch {
struct {
struct pan_kmod_bo *src, *dst;
} blit;
struct panfrost_ptr tls;
struct pan_ptr tls;
struct {
struct pan_tiler_context ctx;
struct panfrost_ptr heap_desc;
struct panfrost_ptr ctx_descs;
struct pan_ptr heap_desc;
struct pan_ptr ctx_descs;
struct mali_tiler_heap_packed heap_templ;
struct mali_tiler_context_packed ctx_templ;
} tiler;

18
src/panfrost/vulkan/jm/panvk_vX_cmd_buffer.c
View file

@ -55,7 +55,7 @@ panvk_cmd_prepare_fragment_job(struct panvk_cmd_buffer *cmdbuf, uint64_t fbd)
{
const struct pan_fb_info *fbinfo = &cmdbuf->state.gfx.render.fb.info;
struct panvk_batch *batch = cmdbuf->cur_batch;
struct panfrost_ptr job_ptr = panvk_cmd_alloc_desc(cmdbuf, FRAGMENT_JOB);
struct pan_ptr job_ptr = panvk_cmd_alloc_desc(cmdbuf, FRAGMENT_JOB);
if (!job_ptr.gpu)
return VK_ERROR_OUT_OF_DEVICE_MEMORY;
@ -94,7 +94,7 @@ panvk_per_arch(cmd_close_batch)(struct panvk_cmd_buffer *cmdbuf)
/* Batch has no jobs but is needed for synchronization, let's add a
* NULL job so the SUBMIT ioctl doesn't choke on it.
*/
struct panfrost_ptr ptr = panvk_cmd_alloc_desc(cmdbuf, JOB_HEADER);
struct pan_ptr ptr = panvk_cmd_alloc_desc(cmdbuf, JOB_HEADER);
if (ptr.gpu) {
util_dynarray_append(&batch->jobs, void *, ptr.cpu);
@ -116,13 +116,13 @@ panvk_per_arch(cmd_close_batch)(struct panvk_cmd_buffer *cmdbuf)
if (batch->tlsinfo.tls.size) {
unsigned thread_tls_alloc =
panfrost_query_thread_tls_alloc(&phys_dev->kmod.props);
pan_query_thread_tls_alloc(&phys_dev->kmod.props);
unsigned core_id_range;
panfrost_query_core_count(&phys_dev->kmod.props, &core_id_range);
pan_query_core_count(&phys_dev->kmod.props, &core_id_range);
unsigned size = panfrost_get_total_stack_size(
batch->tlsinfo.tls.size, thread_tls_alloc, core_id_range);
unsigned size = pan_get_total_stack_size(batch->tlsinfo.tls.size,
thread_tls_alloc, core_id_range);
batch->tlsinfo.tls.ptr =
panvk_cmd_alloc_dev_mem(cmdbuf, tls, size, 4096).gpu;
}
@ -143,9 +143,9 @@ panvk_per_arch(cmd_close_batch)(struct panvk_cmd_buffer *cmdbuf)
* been calculated */
assert(fbinfo->nr_samples > 0 && fbinfo->tile_size > 0);
fbinfo->sample_positions = dev->sample_positions->addr.dev +
panfrost_sample_positions_offset(
pan_sample_pattern(fbinfo->nr_samples));
fbinfo->sample_positions =
dev->sample_positions->addr.dev +
pan_sample_positions_offset(pan_sample_pattern(fbinfo->nr_samples));
if (batch->vtc_jc.first_tiler) {
VkResult result = panvk_per_arch(cmd_fb_preload)(cmdbuf, fbinfo);

12
src/panfrost/vulkan/jm/panvk_vX_cmd_dispatch.c
View file

@ -48,7 +48,7 @@ panvk_per_arch(cmd_dispatch_prepare_tls)(struct panvk_cmd_buffer *cmdbuf,
if (batch->tlsinfo.wls.size) {
unsigned core_id_range;
panfrost_query_core_count(&phys_dev->kmod.props, &core_id_range);
pan_query_core_count(&phys_dev->kmod.props, &core_id_range);
batch->tlsinfo.wls.instances = pan_wls_instances(dim);
batch->wls_total_size = pan_wls_adjust_size(batch->tlsinfo.wls.size) *
batch->tlsinfo.wls.instances * core_id_range;
@ -88,8 +88,8 @@ panvk_per_arch(CmdDispatchBase)(VkCommandBuffer commandBuffer,
struct panvk_shader_desc_state *cs_desc_state =
&cmdbuf->state.compute.cs.desc;
uint64_t tsd = panvk_per_arch(cmd_dispatch_prepare_tls)(
cmdbuf, shader, &wg_count, false);
uint64_t tsd = panvk_per_arch(cmd_dispatch_prepare_tls)(cmdbuf, shader,
&wg_count, false);
result = panvk_per_arch(cmd_prepare_push_descs)(
cmdbuf, desc_state, shader->desc_info.used_set_mask);
@ -111,7 +111,7 @@ panvk_per_arch(CmdDispatchBase)(VkCommandBuffer commandBuffer,
if (result != VK_SUCCESS)
return;
struct panfrost_ptr copy_desc_job = {0};
struct pan_ptr copy_desc_job = {0};
if (compute_state_dirty(cmdbuf, CS) ||
compute_state_dirty(cmdbuf, DESC_STATE)) {
@ -128,13 +128,13 @@ panvk_per_arch(CmdDispatchBase)(VkCommandBuffer commandBuffer,
util_dynarray_append(&batch->jobs, void *, copy_desc_job.cpu);
}
struct panfrost_ptr job = panvk_cmd_alloc_desc(cmdbuf, COMPUTE_JOB);
struct pan_ptr job = panvk_cmd_alloc_desc(cmdbuf, COMPUTE_JOB);
if (!job.gpu)
return;
util_dynarray_append(&batch->jobs, void *, job.cpu);
panfrost_pack_work_groups_compute(
pan_pack_work_groups_compute(
pan_section_ptr(job.cpu, COMPUTE_JOB, INVOCATION), wg_count.x, wg_count.y,
wg_count.z, shader->cs.local_size.x, shader->cs.local_size.y,
shader->cs.local_size.z, false, false);

50
src/panfrost/vulkan/jm/panvk_vX_cmd_draw.c
View file

@ -63,14 +63,14 @@ struct panvk_draw_data {
const struct pan_tiler_context *tiler_ctx;
uint64_t viewport;
struct {
struct panfrost_ptr vertex_copy_desc;
struct panfrost_ptr frag_copy_desc;
struct pan_ptr vertex_copy_desc;
struct pan_ptr frag_copy_desc;
union {
struct {
struct panfrost_ptr vertex;
struct panfrost_ptr tiler;
struct pan_ptr vertex;
struct pan_ptr tiler;
};
struct panfrost_ptr idvs;
struct pan_ptr idvs;
};
} jobs;
};
@ -246,7 +246,7 @@ panvk_draw_prepare_fs_rsd(struct panvk_cmd_buffer *cmdbuf,
msaa = false;
}
struct panfrost_ptr ptr = panvk_cmd_alloc_desc_aggregate(
struct pan_ptr ptr = panvk_cmd_alloc_desc_aggregate(
cmdbuf, PAN_DESC(RENDERER_STATE), PAN_DESC_ARRAY(bd_count, BLEND));
if (!ptr.gpu)
return VK_ERROR_OUT_OF_DEVICE_MEMORY;
@ -404,19 +404,19 @@ panvk_varying_hw_format(gl_shader_stage stage, gl_varying_slot loc,
case VARYING_SLOT_PNTC:
case VARYING_SLOT_PSIZ:
#if PAN_ARCH <= 6
return (MALI_R16F << 12) | panfrost_get_default_swizzle(1);
return (MALI_R16F << 12) | pan_get_default_swizzle(1);
#else
return (MALI_R16F << 12) | MALI_RGB_COMPONENT_ORDER_R000;
#endif
case VARYING_SLOT_POS:
#if PAN_ARCH <= 6
return (MALI_SNAP_4 << 12) | panfrost_get_default_swizzle(4);
return (MALI_SNAP_4 << 12) | pan_get_default_swizzle(4);
#else
return (MALI_SNAP_4 << 12) | MALI_RGB_COMPONENT_ORDER_RGBA;
#endif
default:
if (pfmt != PIPE_FORMAT_NONE)
return GENX(panfrost_format_from_pipe_format)(pfmt)->hw;
return GENX(pan_format_from_pipe_format)(pfmt)->hw;
#if PAN_ARCH >= 7
return (MALI_CONSTANT << 12) | MALI_RGB_COMPONENT_ORDER_0000;
@ -432,7 +432,7 @@ panvk_draw_prepare_varyings(struct panvk_cmd_buffer *cmdbuf,
{
const struct panvk_shader *vs = cmdbuf->state.gfx.vs.shader;
const struct panvk_shader_link *link = &cmdbuf->state.gfx.link;
struct panfrost_ptr bufs = panvk_cmd_alloc_desc_array(
struct pan_ptr bufs = panvk_cmd_alloc_desc_array(
cmdbuf, PANVK_VARY_BUF_MAX + 1, ATTRIBUTE_BUFFER);
if (!bufs.gpu)
return VK_ERROR_OUT_OF_DEVICE_MEMORY;
@ -536,7 +536,7 @@ panvk_draw_emit_attrib_buf(const struct panvk_draw_data *draw,
} else {
unsigned divisor_r = 0, divisor_e = 0;
unsigned divisor_num =
panfrost_compute_magic_divisor(divisor, &divisor_r, &divisor_e);
pan_compute_magic_divisor(divisor, &divisor_r, &divisor_e);
pan_pack(desc, ATTRIBUTE_BUFFER, cfg) {
cfg.type = MALI_ATTRIBUTE_TYPE_1D_NPOT_DIVISOR;
cfg.stride = stride;
@ -578,7 +578,7 @@ panvk_draw_emit_attrib(const struct panvk_draw_data *draw,
if (per_instance)
cfg.offset += draw->info.instance.base * buf_info->stride;
cfg.format = GENX(panfrost_format_from_pipe_format)(f)->hw;
cfg.format = GENX(pan_format_from_pipe_format)(f)->hw;
}
}
@ -606,10 +606,10 @@ panvk_draw_prepare_vs_attribs(struct panvk_cmd_buffer *cmdbuf,
return VK_SUCCESS;
unsigned attrib_buf_count = (num_vbs + num_imgs) * 2;
struct panfrost_ptr bufs = panvk_cmd_alloc_desc_array(
struct pan_ptr bufs = panvk_cmd_alloc_desc_array(
cmdbuf, attrib_buf_count + 1, ATTRIBUTE_BUFFER);
struct mali_attribute_buffer_packed *attrib_buf_descs = bufs.cpu;
struct panfrost_ptr attribs =
struct pan_ptr attribs =
panvk_cmd_alloc_desc_array(cmdbuf, attrib_count, ATTRIBUTE);
struct mali_attribute_packed *attrib_descs = attribs.cpu;
@ -726,7 +726,7 @@ panvk_draw_prepare_viewport(struct panvk_cmd_buffer *cmdbuf,
dyn_gfx_state_dirty(cmdbuf, VP_SCISSORS) ||
dyn_gfx_state_dirty(cmdbuf, RS_DEPTH_CLIP_ENABLE) ||
dyn_gfx_state_dirty(cmdbuf, RS_DEPTH_CLAMP_ENABLE)) {
struct panfrost_ptr vp = panvk_cmd_alloc_desc(cmdbuf, VIEWPORT);
struct pan_ptr vp = panvk_cmd_alloc_desc(cmdbuf, VIEWPORT);
if (!vp.gpu)
return VK_ERROR_OUT_OF_DEVICE_MEMORY;
@ -769,7 +769,7 @@ panvk_draw_prepare_vertex_job(struct panvk_cmd_buffer *cmdbuf,
struct panvk_draw_data *draw)
{
struct panvk_batch *batch = cmdbuf->cur_batch;
struct panfrost_ptr ptr = panvk_cmd_alloc_desc(cmdbuf, COMPUTE_JOB);
struct pan_ptr ptr = panvk_cmd_alloc_desc(cmdbuf, COMPUTE_JOB);
if (!ptr.gpu)
return VK_ERROR_OUT_OF_DEVICE_MEMORY;
@ -971,7 +971,7 @@ panvk_draw_prepare_tiler_job(struct panvk_cmd_buffer *cmdbuf,
struct panvk_batch *batch = cmdbuf->cur_batch;
const struct panvk_shader *fs = cmdbuf->state.gfx.fs.shader;
struct panvk_shader_desc_state *fs_desc_state = &cmdbuf->state.gfx.fs.desc;
struct panfrost_ptr ptr;
struct pan_ptr ptr;
VkResult result = panvk_per_arch(meta_get_copy_desc_job)(
cmdbuf, fs, &cmdbuf->state.gfx.desc_state, fs_desc_state, 0, &ptr);
@ -1015,7 +1015,7 @@ panvk_draw_prepare_idvs_job(struct panvk_cmd_buffer *cmdbuf,
struct panvk_draw_data *draw)
{
struct panvk_batch *batch = cmdbuf->cur_batch;
struct panfrost_ptr ptr = panvk_cmd_alloc_desc(cmdbuf, INDEXED_VERTEX_JOB);
struct pan_ptr ptr = panvk_cmd_alloc_desc(cmdbuf, INDEXED_VERTEX_JOB);
if (!ptr.gpu)
return VK_ERROR_OUT_OF_DEVICE_MEMORY;
@ -1060,7 +1060,7 @@ panvk_draw_prepare_vs_copy_desc_job(struct panvk_cmd_buffer *cmdbuf,
const struct vk_vertex_input_state *vi =
cmdbuf->vk.dynamic_graphics_state.vi;
unsigned num_vbs = util_last_bit(vi->bindings_valid);
struct panfrost_ptr ptr;
struct pan_ptr ptr;
VkResult result = panvk_per_arch(meta_get_copy_desc_job)(
cmdbuf, vs, &cmdbuf->state.gfx.desc_state, vs_desc_state,
num_vbs * pan_size(ATTRIBUTE_BUFFER) * 2, &ptr);
@ -1081,7 +1081,7 @@ panvk_draw_prepare_fs_copy_desc_job(struct panvk_cmd_buffer *cmdbuf,
const struct panvk_shader *fs = cmdbuf->state.gfx.fs.shader;
struct panvk_shader_desc_state *fs_desc_state = &cmdbuf->state.gfx.fs.desc;
struct panvk_batch *batch = cmdbuf->cur_batch;
struct panfrost_ptr ptr;
struct pan_ptr ptr;
VkResult result = panvk_per_arch(meta_get_copy_desc_job)(
cmdbuf, fs, &cmdbuf->state.gfx.desc_state, fs_desc_state, 0, &ptr);
@ -1273,9 +1273,9 @@ panvk_cmd_draw(struct panvk_cmd_buffer *cmdbuf, struct panvk_draw_data *draw)
draw->tls = batch->tls.gpu;
draw->fb = batch->fb.desc.gpu;
panfrost_pack_work_groups_compute(&draw->invocation, 1, draw->vertex_range,
draw->info.instance.count, 1, 1, 1, true,
false);
pan_pack_work_groups_compute(&draw->invocation, 1, draw->vertex_range,
draw->info.instance.count, 1, 1, 1, true,
false);
result = panvk_draw_prepare_fs_rsd(cmdbuf, draw);
if (result != VK_SUCCESS)
@ -1386,7 +1386,7 @@ padded_vertex_count(struct panvk_cmd_buffer *cmdbuf, uint32_t vertex_count,
if (idvs)
vertex_count = ALIGN_POT(vertex_count, 4);
return panfrost_padded_vertex_count(vertex_count);
return pan_padded_vertex_count(vertex_count);
}
VKAPI_ATTR void VKAPI_CALL
@ -1441,7 +1441,7 @@ panvk_index_minmax_search(struct panvk_cmd_buffer *cmdbuf, uint32_t start,
*max = 0;
/* TODO: Use panfrost_minmax_cache */
/* TODO: Use pan_minmax_cache */
/* TODO: Read full cacheline of data to mitigate the uncached
* mapping slowness.
*/

6
src/panfrost/vulkan/jm/panvk_vX_cmd_precomp.c
View file

@ -30,7 +30,7 @@ panvk_per_arch(dispatch_precomp)(struct panvk_precomp_ctx *ctx,
assert(shader);
assert(batch && "Need current batch to be present!");
struct panfrost_ptr push_uniforms = panvk_cmd_alloc_dev_mem(
struct pan_ptr push_uniforms = panvk_cmd_alloc_dev_mem(
cmdbuf, desc, BIFROST_PRECOMPILED_KERNEL_SYSVALS_SIZE + data_size, 16);
assert(push_uniforms.gpu);
@ -44,10 +44,10 @@ panvk_per_arch(dispatch_precomp)(struct panvk_precomp_ctx *ctx,
bifrost_precompiled_kernel_prepare_push_uniforms(push_uniforms.cpu, data,
data_size, &sysvals);
struct panfrost_ptr job = panvk_cmd_alloc_desc(cmdbuf, COMPUTE_JOB);
struct pan_ptr job = panvk_cmd_alloc_desc(cmdbuf, COMPUTE_JOB);
assert(job.gpu);
panfrost_pack_work_groups_compute(
pan_pack_work_groups_compute(
pan_section_ptr(job.cpu, COMPUTE_JOB, INVOCATION), grid.count[0],
grid.count[1], grid.count[2], shader->cs.local_size.x,
shader->cs.local_size.y, shader->cs.local_size.z, false, false);

2
src/panfrost/vulkan/jm/panvk_vX_cmd_query.c
View file

@ -45,7 +45,7 @@ panvk_emit_write_job(struct panvk_cmd_buffer *cmd, struct panvk_batch *batch,
enum mali_write_value_type type, uint64_t addr,
uint64_t value)
{
struct panfrost_ptr job =
struct pan_ptr job =
pan_pool_alloc_desc(&cmd->desc_pool.base, WRITE_VALUE_JOB);
pan_section_pack(job.cpu, WRITE_VALUE_JOB, PAYLOAD, payload) {

6
src/panfrost/vulkan/panvk_cmd_alloc.h
View file

@ -10,15 +10,15 @@
#include "panvk_macros.h"
#include "panvk_mempool.h"
static inline struct panfrost_ptr
static inline struct pan_ptr
panvk_cmd_alloc_from_pool(struct panvk_cmd_buffer *cmdbuf,
struct panvk_pool *pool,
struct panvk_pool_alloc_info info)
{
if (!info.size)
return (struct panfrost_ptr){0};
return (struct pan_ptr){0};
struct panfrost_ptr ptr =
struct pan_ptr ptr =
pan_pool_alloc_aligned(&pool->base, info.size, info.alignment);
if (!ptr.gpu) {

6
src/panfrost/vulkan/panvk_cmd_draw.h
View file

@ -74,7 +74,7 @@ struct panvk_rendering_state {
} fb;
#if PAN_ARCH >= 10
struct panfrost_ptr fbds;
struct pan_ptr fbds;
uint64_t tiler;
/* When a secondary command buffer has to flush draws, it disturbs the
@ -215,8 +215,8 @@ panvk_select_tiler_hierarchy_mask(const struct panvk_physical_device *phys_dev,
const struct panvk_cmd_graphics_state *state,
unsigned bin_ptr_mem_budget)
{
struct panfrost_tiler_features tiler_features =
panfrost_query_tiler_features(&phys_dev->kmod.props);
struct pan_tiler_features tiler_features =
pan_query_tiler_features(&phys_dev->kmod.props);
uint32_t hierarchy_mask = GENX(pan_select_tiler_hierarchy_mask)(
state->render.fb.info.width, state->render.fb.info.height,

2
src/panfrost/vulkan/panvk_image.c
View file

@ -80,7 +80,7 @@ panvk_image_can_use_mod(struct panvk_image *image, uint64_t mod)
((image->vk.usage | image->vk.stencil_usage) &
VK_IMAGE_USAGE_STORAGE_BIT) ||
image->vk.samples > 1 ||
!panfrost_query_afbc(&phys_dev->kmod.props) ||
!pan_query_afbc(&phys_dev->kmod.props) ||
!pan_format_supports_afbc(arch, pfmt) ||
image->vk.tiling == VK_IMAGE_TILING_LINEAR ||
image->vk.image_type == VK_IMAGE_TYPE_1D ||

4
src/panfrost/vulkan/panvk_mempool.c
View file

@ -162,7 +162,7 @@ panvk_pool_alloc_mem(struct panvk_pool *pool, struct panvk_pool_alloc_info info)
return ret;
}
static struct panfrost_ptr
static struct pan_ptr
panvk_pool_alloc_aligned(struct panvk_pool *pool, size_t sz, unsigned alignment)
{
/* We just return the host/dev address, so callers can't
@ -175,7 +175,7 @@ panvk_pool_alloc_aligned(struct panvk_pool *pool, size_t sz, unsigned alignment)
};
struct panvk_priv_mem mem = panvk_pool_alloc_mem(pool, info);
return (struct panfrost_ptr){
return (struct pan_ptr){
.cpu = panvk_priv_mem_host_addr(mem),
.gpu = panvk_priv_mem_dev_addr(mem),
};

2
src/panfrost/vulkan/panvk_meta.h
View file

@ -155,7 +155,7 @@ VkResult panvk_per_arch(meta_get_copy_desc_job)(
struct panvk_cmd_buffer *cmdbuf, const struct panvk_shader *shader,
const struct panvk_descriptor_state *desc_state,
const struct panvk_shader_desc_state *shader_desc_state,
uint32_t attrib_buf_idx_offset, struct panfrost_ptr *job_desc);
uint32_t attrib_buf_idx_offset, struct pan_ptr *job_desc);
#endif
#endif

19
src/panfrost/vulkan/panvk_physical_device.c
View file

@ -333,7 +333,7 @@ has_compressed_formats(const struct panvk_physical_device *physical_device,
const uint32_t required_formats)
{
uint32_t supported_compr_fmts =
panfrost_query_compressed_formats(&physical_device->kmod.props);
pan_query_compressed_formats(&physical_device->kmod.props);
return (supported_compr_fmts & required_formats) == required_formats;
}
@ -1129,8 +1129,8 @@ panvk_physical_device_init(struct panvk_physical_device *device,
pan_kmod_dev_query_props(device->kmod.dev, &device->kmod.props);
device->model = panfrost_get_model(device->kmod.props.gpu_prod_id,
device->kmod.props.gpu_variant);
device->model = pan_get_model(device->kmod.props.gpu_prod_id,
device->kmod.props.gpu_variant);
unsigned arch = pan_arch(device->kmod.props.gpu_prod_id);
@ -1169,8 +1169,8 @@ panvk_physical_device_init(struct panvk_physical_device *device,
if (result != VK_SUCCESS)
goto fail;
device->formats.all = panfrost_format_table(arch);
device->formats.blendable = panfrost_blendable_format_table(arch);
device->formats.all = pan_format_table(arch);
device->formats.blendable = pan_blendable_format_table(arch);
memset(device->name, 0, sizeof(device->name));
sprintf(device->name, "%s", device->model->name);
@ -1386,8 +1386,7 @@ unsupported_yuv_format(enum pipe_format pfmt)
static bool
format_is_supported(struct panvk_physical_device *physical_device,
const struct panfrost_format fmt,
enum pipe_format pfmt)
const struct pan_format fmt, enum pipe_format pfmt)
{
if (pfmt == PIPE_FORMAT_NONE)
return false;
@ -1403,7 +1402,7 @@ format_is_supported(struct panvk_physical_device *physical_device,
* the supported formats reported by the GPU. */
if (util_format_is_compressed(pfmt)) {
uint32_t supported_compr_fmts =
panfrost_query_compressed_formats(&physical_device->kmod.props);
pan_query_compressed_formats(&physical_device->kmod.props);
if (!(BITFIELD_BIT(fmt.texfeat_bit) & supported_compr_fmts))
return false;
@ -1418,7 +1417,7 @@ get_image_plane_format_features(struct panvk_physical_device *physical_device,
{
VkFormatFeatureFlags2 features = 0;
enum pipe_format pfmt = vk_format_to_pipe_format(format);
const struct panfrost_format fmt = physical_device->formats.all[pfmt];
const struct pan_format fmt = physical_device->formats.all[pfmt];
unsigned arch = pan_arch(physical_device->kmod.props.gpu_prod_id);
if (!format_is_supported(physical_device, fmt, pfmt))
@ -1560,7 +1559,7 @@ get_buffer_format_features(struct panvk_physical_device *physical_device,
{
VkFormatFeatureFlags2 features = 0;
enum pipe_format pfmt = vk_format_to_pipe_format(format);
const struct panfrost_format fmt = physical_device->formats.all[pfmt];
const struct pan_format fmt = physical_device->formats.all[pfmt];
if (!format_is_supported(physical_device, fmt, pfmt))
return 0;

8
src/panfrost/vulkan/panvk_physical_device.h
View file

@ -19,9 +19,9 @@
#include "lib/kmod/pan_kmod.h"
struct panfrost_model;
struct pan_model;
struct pan_blendable_format;
struct panfrost_format;
struct pan_format;
struct panvk_instance;
struct panvk_physical_device {
@ -32,7 +32,7 @@ struct panvk_physical_device {
struct pan_kmod_dev_props props;
} kmod;
const struct panfrost_model *model;
const struct pan_model *model;
union {
struct {
@ -51,7 +51,7 @@ struct panvk_physical_device {
struct {
const struct pan_blendable_format *blendable;
const struct panfrost_format *all;
const struct pan_format *all;
} formats;
char name[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE];

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