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panfrost: split pseudo instructions from Bifrost and Valhall

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Make pseudo instructions for the IR separate from real Bifrost and
Valhall instructions, which are kept in their own ISA.xml files.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30179>
This commit is contained in:
Eric R. Smith 2024-07-04 21:50:33 +00:00 • committed by Marge Bot
parent 4cd09ce5e8
commit 1ae8ac35c0
10 changed files with 468 additions and 237 deletions
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195
src/panfrost/compiler/IR_pseudo.xml Normal file
View file

@ -0,0 +1,195 @@
<!--
Copyright (C) 2024 Collabora Ltd.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice (including the next
paragraph) shall be included in all copies or substantial portions of the
Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
-->
<bifrost>
<!-- Pseudo instruction representing dual texturing on Bifrost. Lowered to
TEXC after register allocation, when the second destination register can
be combined with the texture operation descriptor. -->
<ins name="TEXC_DUAL" staging="rw=sr_count" pseudo="true" message="tex" dests="2" unit="add">
<src start="0"/>
<src start="3"/>
<src start="6" mask="0xf7"/>
<mod name="skip" start="9" size="1" opt="skip"/>
<immediate name="sr_count" size="4" pseudo="true"/>
<immediate name="sr_count_2" size="4" pseudo="true"/>
<mod name="lod_mode" start="13" size="1" default="zero_lod" pseudo="true">
<opt>computed_lod</opt>
<opt>zero_lod</opt>
</mod>
</ins>
<!--- Lowered to *SEG_ADD/+SEG_ADD -->
<ins name="SEG_ADD.i64" pseudo="true" unit="add">
<src start="0"/>
<src start="3"/>
<mod name="seg" size="3">
<reserved/>
<reserved/>
<opt>wls</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
<mod name="preserve_null" size="1" opt="preserve_null"/>
</ins>
<!-- Scheduler lowered to *ATOM_C.i32/+ATOM_CX. Real Valhall instructions. -->
<ins name="ATOM_RETURN.i32" pseudo="true" staging="rw=sr_count" message="atomic" unit="add">
<src start="0"/>
<src start="3"/>
<mod name="atom_opc" start="9" size="5">
<reserved/>
<reserved/>
<opt>aadd</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>asmin</opt>
<opt>asmax</opt>
<opt>aumin</opt>
<opt>aumax</opt>
<opt>aand</opt>
<opt>aor</opt>
<opt>axor</opt>
<opt>axchg</opt> <!-- For Valhall -->
<opt>acmpxchg</opt> <!-- For Valhall -->
</mod>
<!-- not actually encoded, but used for IR -->
<immediate name="sr_count" size="4" pseudo="true"/>
</ins>
<ins name="ATOM1_RETURN.i32" pseudo="true" staging="w=sr_count" message="atomic" unit="add">
<src start="0"/>
<src start="3"/>
<mod name="atom_opc" start="6" size="3">
<opt>ainc</opt>
<opt>adec</opt>
<opt>aumax1</opt>
<opt>asmax1</opt>
<opt>aor1</opt>
</mod>
<!-- not actually encoded, but used for IR -->
<immediate name="sr_count" size="4" pseudo="true"/>
</ins>
<ins name="ATOM.i32" pseudo="true" staging="r=sr_count" message="atomic" unit="add">
<src start="0"/>
<src start="3"/>
<mod name="atom_opc" start="9" size="4">
<reserved/>
<reserved/>
<opt>aadd</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>asmin</opt>
<opt>asmax</opt>
<opt>aumin</opt>
<opt>aumax</opt>
<opt>aand</opt>
<opt>aor</opt>
<opt>axor</opt>
</mod>
<!-- not actually encoded, but used for IR -->
<immediate name="sr_count" size="4" pseudo="true"/>
</ins>
<!-- *CUBEFACE1/+CUBEFACE2 pair, two destinations, scheduler lowered -->
<ins name="CUBEFACE" pseudo="true" dests="2" unit="add">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<mod name="neg0" size="1" opt="neg"/>
<mod name="neg1" size="1" opt="neg"/>
<mod name="neg2" size="1" opt="neg"/>
</ins>
<ins name="FABSNEG.f32" pseudo="true" unit="fma">
<src start="0" mask="0xfb"/>
<mod name="neg0" start="7" size="1" opt="neg"/>
<mod name="abs0" start="12" size="1" opt="abs"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="FABSNEG.v2f16" pseudo="true" unit="fma">
<src start="0" mask="0xfb"/>
<mod name="abs0" size="1" opt="abs"/>
<mod name="neg0" start="7" size="1" opt="neg"/>
<mod name="swz0" start="9" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
</ins>
<ins name="FCLAMP.f32" pseudo="true" unit="fma">
<src start="0" mask="0xfb"/>
<mod name="clamp" start="15" size="2">
<opt>none</opt>
<opt>clamp_0_inf</opt>
<opt>clamp_m1_1</opt>
<opt>clamp_0_1</opt>
</mod>
</ins>
<ins name="FCLAMP.v2f16" pseudo="true" unit="fma">
<src start="0" mask="0xfb"/>
<mod name="clamp" start="15" size="2">
<opt>none</opt>
<opt>clamp_0_inf</opt>
<opt>clamp_m1_1</opt>
<opt>clamp_0_1</opt>
</mod>
</ins>
<ins name="DISCARD.b32" pseudo="true" dests="0" unit="add">
<src start="0"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="PHI" pseudo="true" variable_srcs="true" unit="add"/>
<ins name="COLLECT.i32" pseudo="true" variable_srcs="true" unit="add"/>
<ins name="SPLIT.i32" pseudo="true" variable_dests="true" unit="add">
<src start="0"/>
</ins>
</bifrost>

6
src/panfrost/compiler/bi_builder.h.py
View file

@ -187,7 +187,11 @@ import sys
from bifrost_isa import *
from mako.template import Template
instructions = parse_instructions(sys.argv[1], include_pseudo = True)
instructions = {}
for arg in sys.argv[1:]:
new_instructions = parse_instructions(arg, include_pseudo = True)
instructions.update(new_instructions)
ir_instructions = partition_mnemonics(instructions)
modifier_lists = order_modifiers(ir_instructions)

6
src/panfrost/compiler/bi_opcodes.c.py
View file

@ -59,7 +59,11 @@ import sys
from bifrost_isa import *
from mako.template import Template
instructions = parse_instructions(sys.argv[1], include_pseudo = True)
instructions = {}
for arg in sys.argv[1:]:
new_instructions = parse_instructions(arg, include_pseudo = True)
instructions.update(new_instructions)
ir_instructions = partition_mnemonics(instructions)
mnemonics = set(x[1:] for x in instructions.keys())

6
src/panfrost/compiler/bi_opcodes.h.py
View file

@ -108,7 +108,11 @@ import sys
from bifrost_isa import *
from mako.template import Template
instructions = parse_instructions(sys.argv[1], include_pseudo = True)
instructions = {}
for arg in sys.argv[1:]:
new_instructions = parse_instructions(arg, include_pseudo = True)
instructions.update(new_instructions)
ir_instructions = partition_mnemonics(instructions)
modifier_lists = order_modifiers(ir_instructions)

8
src/panfrost/compiler/bi_packer.c.py
View file

@ -25,12 +25,16 @@ from bifrost_isa import *
from mako.template import Template
# Consider pseudo instructions when getting the modifier list
instructions_with_pseudo = parse_instructions(sys.argv[1], include_pseudo = True)
instructions_with_pseudo = {}
for arg in sys.argv[1:]:
new_instructions = parse_instructions(arg, include_pseudo = True)
instructions_with_pseudo.update(new_instructions)
ir_instructions_with_pseudo = partition_mnemonics(instructions_with_pseudo)
modifier_lists = order_modifiers(ir_instructions_with_pseudo)
# ...but strip for packing
instructions = parse_instructions(sys.argv[1])
instructions = parse_instructions(sys.argv[2]) # skip the pseudo instructions in sys.argv[1]
ir_instructions = partition_mnemonics(instructions)
# Packs sources into an argument. Offset argument to work around a quirk of our

6
src/panfrost/compiler/bi_printer.c.py
View file

@ -224,7 +224,11 @@ import sys
from bifrost_isa import *
from mako.template import Template
instructions = parse_instructions(sys.argv[1], include_pseudo = True)
instructions = {}
for arg in sys.argv[1:]:
new_instructions = parse_instructions(arg, include_pseudo = True)
instructions.update(new_instructions)
ir_instructions = partition_mnemonics(instructions)
modifier_lists = order_modifiers(ir_instructions)

0
src/panfrost/compiler/ISA.xml → src/panfrost/compiler/bifrost/ISA.xml
View file

12
src/panfrost/compiler/meson.build
View file

@ -43,7 +43,7 @@ libpanfrost_bifrost_files = files(
bifrost_gen_disasm_c = custom_target(
'bifrost_gen_disasm.c',
input : ['gen_disasm.py', 'ISA.xml'],
input : ['gen_disasm.py', 'bifrost/ISA.xml'],
output : 'bifrost_gen_disasm.c',
command : [prog_python, '@INPUT@'],
capture : true,
@ -52,7 +52,7 @@ bifrost_gen_disasm_c = custom_target(
bi_opcodes_c = custom_target(
'bi_opcodes.c',
input : ['bi_opcodes.c.py', 'ISA.xml'],
input : ['bi_opcodes.c.py', 'IR_pseudo.xml', 'bifrost/ISA.xml', 'valhall/ISA.xml'],
output : 'bi_opcodes.c',
command : [prog_python, '@INPUT@'],
capture : true,
@ -61,7 +61,7 @@ bi_opcodes_c = custom_target(
bi_printer_c = custom_target(
'bi_printer.c',
input : ['bi_printer.c.py', 'ISA.xml'],
input : ['bi_printer.c.py', 'IR_pseudo.xml', 'bifrost/ISA.xml', 'valhall/ISA.xml'],
output : 'bi_printer.c',
command : [prog_python, '@INPUT@'],
capture : true,
@ -70,7 +70,7 @@ bi_printer_c = custom_target(
bi_packer_c = custom_target(
'bi_packer.c',
input : ['bi_packer.c.py', 'ISA.xml'],
input : ['bi_packer.c.py', 'IR_pseudo.xml', 'bifrost/ISA.xml', 'valhall/ISA.xml'],
output : 'bi_packer.c',
command : [prog_python, '@INPUT@'],
capture : true,
@ -79,7 +79,7 @@ bi_packer_c = custom_target(
bi_opcodes_h = custom_target(
'bi_opcodes.h',
input : ['bi_opcodes.h.py', 'ISA.xml'],
input : ['bi_opcodes.h.py', 'IR_pseudo.xml', 'bifrost/ISA.xml', 'valhall/ISA.xml'],
output : 'bi_opcodes.h',
command : [prog_python, '@INPUT@'],
capture : true,
@ -93,7 +93,7 @@ idep_bi_opcodes_h = declare_dependency(
bi_builder_h = custom_target(
'bi_builder.h',
input : ['bi_builder.h.py', 'ISA.xml'],
input : ['bi_builder.h.py', 'IR_pseudo.xml', 'bifrost/ISA.xml', 'valhall/ISA.xml'],
output : 'bi_builder.h',
command : [prog_python, '@INPUT@'],
capture : true,

460
src/panfrost/compiler/valhall/ISA.xml
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File diff suppressed because it is too large Load diff

6
src/panfrost/compiler/valhall/valhall.py
View file

@ -272,7 +272,7 @@ def build_instr(el, overrides = {}):
i = 0
for src in el.findall('src'):
if (src.attrib.get('ir_only', False)):
if (src.attrib.get('pseudo', False)):
continue
built = build_source(src, i, tsize)
sources += [built]
@ -298,9 +298,9 @@ def build_instr(el, overrides = {}):
modifiers = []
for mod in el:
if (mod.tag in MODIFIERS) and not (mod.attrib.get('ir_only', False)):
if (mod.tag in MODIFIERS) and not (mod.attrib.get('pseudo', False)):
modifiers.append(MODIFIERS[mod.tag])
elif mod.tag =='mod':
elif mod.tag =='va_mod':
modifiers.append(build_modifier(mod))
instr = Instruction(name, opcode, opcode2, srcs = sources, dests = dests, immediates = imms, modifiers = modifiers, staging = staging, unit = unit)