Rhys Perry 69bc4efa37 aco/sched_ilp: improve scheduling with VMEM/DS->VALU WaW ... This improves scheduling with one side of a divergent branch writing to a VGPR using VMEM/DS, and the other writing using VALU. At the merge block, it will properly consider that the VGPR was written by a VMEM/DS. fossil-db (navi31): Totals from 1224 (1.53% of 79825) affected shaders: Instrs: 5264815 -> 5267604 (+0.05%); split: -0.00%, +0.06% CodeSize: 27406404 -> 27422132 (+0.06%); split: -0.00%, +0.06% Latency: 48325204 -> 48293975 (-0.06%); split: -0.09%, +0.03% InvThroughput: 8923880 -> 8919191 (-0.05%); split: -0.07%, +0.02% fossil-db (navi21): Totals from 1267 (1.59% of 79825) affected shaders: Instrs: 4628583 -> 4629190 (+0.01%); split: -0.00%, +0.01% CodeSize: 24974672 -> 24977188 (+0.01%); split: -0.00%, +0.01% Latency: 45080476 -> 44998120 (-0.18%); split: -0.20%, +0.02% InvThroughput: 12288202 -> 12269634 (-0.15%); split: -0.16%, +0.01% Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38262>		2026-02-16 19:39:43 +00:00
..
addrlib	amd: rename most GFX115x definitions for released chips	2025-12-03 13:29:07 +00:00
ci	ci/radv: Enable WSI testing.	2026-02-13 23:57:14 +00:00
common	nir: allow get_ssbo_size to return a 64-bit result	2026-02-16 12:59:36 +00:00
compiler	aco/sched_ilp: improve scheduling with VMEM/DS->VALU WaW	2026-02-16 19:39:43 +00:00
drm-shim	amd/drm-shim: add vega20	2026-01-08 09:30:54 +00:00
gmlib	meson: Relax -Wmaybe-uninitialized errors	2025-09-16 06:16:20 +00:00
lanczoslib	meson: Relax -Wmaybe-uninitialized errors	2025-09-16 06:16:20 +00:00
llvm	ac/llvm: remove unused functions	2026-02-13 15:33:19 +00:00
registers	amd: Rename GFX1103_R1/R2 to PHOENIX/2	2024-11-20 02:14:40 +00:00
vpelib	amd/vpelib: Adding new wrapper for register profiling	2026-02-12 11:56:26 +00:00
vulkan	radv,aco/gfx11: preserve s2 when NGG_WAVE_ID_EN=1	2026-02-16 14:33:58 +00:00
meson.build	radv/tests: require drm-shim and use it instead of RADV_FORCE_FAMILY	2025-11-19 07:11:05 +00:00