Georg Lehmann 5ecc800edd aco/optimizer: add second copy prop for pseudo instructions ... Foz-DB Navi48: Totals from 28 (0.03% of 82405) affected shaders: Instrs: 144993 -> 144645 (-0.24%); split: -0.26%, +0.02% CodeSize: 784668 -> 783604 (-0.14%); split: -0.19%, +0.05% SpillVGPRs: 215 -> 209 (-2.79%) Latency: 2529900 -> 2526895 (-0.12%); split: -0.12%, +0.00% InvThroughput: 775379 -> 773859 (-0.20%); split: -0.20%, +0.00% VClause: 2815 -> 2803 (-0.43%) Copies: 23474 -> 23170 (-1.30%); split: -1.38%, +0.09% Branches: 4638 -> 4632 (-0.13%) VALU: 81924 -> 81620 (-0.37%); split: -0.40%, +0.03% SALU: 23986 -> 23995 (+0.04%); split: -0.03%, +0.07% VMEM: 3726 -> 3714 (-0.32%) Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39532>		2026-02-06 11:29:39 +00:00
..
addrlib	amd: rename most GFX115x definitions for released chips	2025-12-03 13:29:07 +00:00
ci	ci/deqp-runner: Enable a common single-threaded test list.	2026-02-03 17:34:09 +00:00
common	radv: track redundant PA_SC_VRS_OVERRIDE_CNTL register writes	2026-02-06 07:15:10 +00:00
compiler	aco/optimizer: add second copy prop for pseudo instructions	2026-02-06 11:29:39 +00:00
drm-shim	amd/drm-shim: add vega20	2026-01-08 09:30:54 +00:00
gmlib	meson: Relax -Wmaybe-uninitialized errors	2025-09-16 06:16:20 +00:00
lanczoslib	meson: Relax -Wmaybe-uninitialized errors	2025-09-16 06:16:20 +00:00
llvm	ac/llvm: remove unpack_half support	2026-02-06 06:12:36 +00:00
registers	amd: Rename GFX1103_R1/R2 to PHOENIX/2	2024-11-20 02:14:40 +00:00
vpelib	amd/vpelib: add FL capabilitie and lut container size	2025-09-22 10:37:22 +00:00
vulkan	radv: vectorize UBO, SSBO and shared across blocks	2026-02-06 10:16:50 +00:00
meson.build	radv/tests: require drm-shim and use it instead of RADV_FORCE_FAMILY	2025-11-19 07:11:05 +00:00