Samuel Pitoiset 4094706828 radv: invalidate compute/rt descriptors at dispatch time ... Invalidating descriptors at bind time is wrong in a scenario like trace rays -> dispatch -> trace rays because RT uses compute shaders and the user SGPRs need to be re-emitted. Noticed by Konstantin. Fixes: 40ceece75f ("radv: invalidate compute/rt descriptors at pipeline bind time") Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36605>		2025-08-07 06:26:43 +00:00
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addrlib	amd/addrlib: remove the DCC page fault workaround	2025-04-01 03:23:22 -04:00
ci	radv/ci: document recent flakes	2025-08-06 16:15:08 +00:00
common	ac/nir: Avoid 0/0 when computing texel buffer size on Polaris.	2025-08-06 10:37:50 +00:00
compiler	aco/ra: set late-kill for operands of temporary p_create_vector	2025-08-06 09:44:01 +00:00
drm-shim	amd: Add user queue HQD count to hw_ip info	2025-07-08 10:17:51 +00:00
gmlib	amd/gmlib: remove the executable bit	2025-06-12 07:44:27 +00:00
lanczoslib	radeonsi/vpe: enhance scaling quality	2025-06-12 07:44:26 +00:00
llvm	all: rename gl_shader_stage_is_compute to mesa_shader_stage_is_compute	2025-08-06 10:28:41 +08:00
registers	amd: Rename GFX1103_R1/R2 to PHOENIX/2	2024-11-20 02:14:40 +00:00
vpelib	amd/vpelib: Fix cost profiling support	2025-07-29 09:17:25 +00:00
vulkan	radv: invalidate compute/rt descriptors at dispatch time	2025-08-07 06:26:43 +00:00
meson.build	radeonsi/vpe: enhance scaling quality	2025-06-12 07:44:26 +00:00