Paulo Zanoni 3e5dfd668d anv: add an anv_pipe_bits bit to allow invalidating the TLB ... Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27928>		2024-03-11 19:17:20 +00:00
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blorp	anv/iris/blorp: use the right MOCS values for each engine	2024-03-06 20:33:12 +00:00
ci	ci/intel: split asus-cx9400-volteer into acer-cp514-2h-11{30,60}g7-volteer	2024-03-06 01:52:49 +00:00
common	intel/elk: Remove multi-polygon support	2024-03-07 15:53:19 +00:00
compiler	intel/brw: Use hstride instead of stride for accumulator	2024-03-09 18:26:24 +00:00
decoder	intel/decoder: Add ELK support	2024-02-24 00:24:31 +00:00
dev	intel: Drop pre-production steppings	2024-03-11 18:52:44 +00:00
ds	intel/ds: add pipe control reasons to perfetto flushes	2024-03-08 07:52:20 +00:00
genxml	intel/genxml: update PIPE_CONTROL so that we can decode it on the CCS	2024-03-06 14:37:11 +00:00
isl	anv/iris/blorp: use the right MOCS values for each engine	2024-03-06 20:33:12 +00:00
nullhw-layer	intel/nullhw: Fix 32bits compilation warnings	2024-02-28 23:37:43 +00:00
perf	intel: Remove unused ALIGN macro	2023-12-07 02:30:53 +00:00
shaders	intel-clc: Use correct set of nir_options when building for Gfx8	2024-02-24 00:24:32 +00:00
tools	intel/tools: avoid invalid time and file bits combination	2024-03-08 21:01:38 +00:00
vulkan	anv: add an anv_pipe_bits bit to allow invalidating the TLB	2024-03-11 19:17:20 +00:00
vulkan_hasvk	intel/ds: add pipe control reasons to perfetto flushes	2024-03-08 07:52:20 +00:00
meson.build	intel: Only build shaders with anv and iris	2024-02-21 20:53:36 +00:00