Commit graph

58693 commits

Author SHA1 Message Date
Eric Engestrom
fbd644c59d meson: replace vk_wsi_args with dependencies to let meson take care of transitivity
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19497>
2023-02-23 09:42:46 +00:00
Patrick Lerda
9b4eb73907 r600: fix shader blob memory leak
Fixes: 5b205ef413
   r600: Store nir shaders serialized to save memory

Direct leak of 4096 byte(s) in 1 object(s) allocated from:
    #0 0x7faf89c3bb48 in __interceptor_realloc (/usr/lib64/libasan.so.6+0xb1b48)
    #1 0x7faf7be5981d in grow_to_fit ../src/util/blob.c:67
    #2 0x7faf7be5a538 in grow_to_fit ../src/util/blob.c:49
    #3 0x7faf7be5a538 in blob_reserve_bytes ../src/util/blob.c:177
    #4 0x7faf7be5a538 in blob_reserve_uint32 ../src/util/blob.c:190
    #5 0x7faf7d248a8c in nir_serialize ../src/compiler/nir/nir_serialize.c:2109
    #6 0x7faf7df4fdbb in r600_pipe_shader_create ../src/gallium/drivers/r600/r600_shader.c:401

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21443>
2023-02-23 07:06:42 +00:00
Sajeesh Sidharthan
fa9a8c85e2 radeonsi/vcn: disable fence for JPEG decoding
5e1bd07a is causing JPEG decoding regression issue.
Therefore, disable fence for JPEG decoding until fence issue is fixed.

Signed-off-by: Sajeesh Sidharthan <sajeesh.sidharthan@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21442>
2023-02-23 01:08:09 +00:00
Sviatoslav Peleshko
4229d9324f iris: Avoid creating uncompressed view with unaligned tile offsets on BDW
Fixes: 60568d5d ("iris: Use isl_surf_get_uncompressed_surf")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7990
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21147>
2023-02-22 22:33:08 +00:00
Rob Clark
3c668513b9 freedreno/a6xx: Fix view_seqno in tex cache key
If the view's seqno increments, it needs to happen *before* the tex cache
key is constructed.  Normally this happens when the sampler views are
bound.  But if the texture backing a current sampler view is rebound we
need to handle this before the cache lookup.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>
2023-02-22 21:26:28 +00:00
Rob Clark
818b49932a freedreno/a6xx: Static-ify sampler_view_update()
It doesn't need to be visible elsewhere since commit a93d3f1498
("freedreno/a6xx: Move tex state building")

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>
2023-02-22 21:26:28 +00:00
Rob Clark
e9fa92d6fa freedreno/a6xx: Small cleanup
Move the rb allocation to the place where it is populated (ie. where we
know how large it must be).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>
2023-02-22 21:26:28 +00:00
Rob Clark
936f2ebb46 freedreno/a6xx: Remove needs_invalidate flag
Whether the rsc seqno has changed tells us whether we need to update.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>
2023-02-22 21:26:27 +00:00
Rob Clark
b6778995d7 freedreno/a6xx: Add a way to assert valid format
Layout transitions caused by access as a various format must happen at
state bind time, before batch_draw_tracking().  Add a helper to assert
this fact.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>
2023-02-22 21:26:27 +00:00
Rob Clark
ea9d1cfb20 freedreno/a6xx: Fix sampler view rsc_seqno for X32_S8X24
Elsewhere we are comparing it against the seqno for the "primary" z32
buffer, so be consistent.  Otherwise we'll think we need to re-validate
every time the sampler view is bound.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>
2023-02-22 21:26:27 +00:00
Rob Clark
b40e3c9e6c freedreno/a6xx: Drop unneed fd6_texture_state() arg
It is redundant with shader type (stage).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>
2023-02-22 21:26:27 +00:00
Rob Clark
29445505f6 freedreno/a6xx: Fix set_sampler_views(start != 0)
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>
2023-02-22 21:26:27 +00:00
Rob Clark
a3c73987ab freedreno/a6xx: Move rsc seqno out of tex cache key
Since we invalidate tex cache entries if an associated pipe_resource is
rebound, we don't rely on the rsc_seqno being part of the tex cache key.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>
2023-02-22 21:26:27 +00:00
Pierre-Eric Pelloux-Prayer
a502f4fc13 radeonsi/video: use specific PIPE_BIND_ value for video buffers
Since 13cb41f666 PIPE_BIND_SHARED was used to allocate driver internal
video buffers. These buffers are never shared, but the intent was to
get non-suballocated buffers and SHARED was used as an indirect flag.

This commit switches to PIPE_BIND_CUSTOM which isn't used anywhere else,
and is now translated as "no suballocation".

The main benefit here is that this allows these buffers to set
use_reusable_pool to true reducing the CPU overhead a lot.

For instance, running the following command on my system:

   ffmpeg -hwaccel vaapi -hwaccel_output_format vaapi \
       -i tears_of_steel_1080p.mov -an -c:v h264_vaapi output.mp4

takes 35 sec with this commit vs 45 sec without.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21416>
2023-02-22 18:30:28 +00:00
Karol Herbst
186a22712f rusticl: allocate printf buffer as staging
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20161>
2023-02-22 14:20:21 +00:00
Karol Herbst
3abbeed74f rusticl: no compute only
This might be a good optimization, but we should figure first what drivers
should be able to disable and what not first.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20161>
2023-02-22 14:20:21 +00:00
Karol Herbst
ced9d5d635 rusticl/device: limit CL_DEVICE_MAX_CONSTANT_ARGS
At the moment we implement constant memory as normal global memory, but
we still should limit to the actual constant buffer cap once we properly
use UBOs for that.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20161>
2023-02-22 14:20:21 +00:00
Karol Herbst
bbea8761c2 rusticl/device: fix some device limits
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20161>
2023-02-22 14:20:21 +00:00
Karol Herbst
188c0d7c8f llvmpipe/ci: increase deqp-runner timeout
Some of the OpenCL tests are flaky, because they just take that long.
Builtins can generated really complex code and if we are unlucky they can
timeout.

Proper support for functions would also solve the issue, probably, but for
now increase the deqp-runner timeout so it's less of an annoyence.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20161>
2023-02-22 14:20:21 +00:00
Erik Faye-Lund
176add76ad zink: get rid of needless dependency
We haven't needed this header since 7f56fd9655 ("zink: it's kopperin'
time"), so let's get rid of it and the dependency that comes with it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21441>
2023-02-22 12:23:39 +00:00
Erik Faye-Lund
e02cdb397e zink: prefer vulkan_core.h over vulkan.h
There's just two places where we need any of the WSI specific vulkan
includes, the rest of Zink should do just fine with vulkan_core.h. So
let's include the win32-specific header explicitly in those two places,
and reduce the need for WSI specifics inside zink itself. Kopper
handles the rest of the WSI integration.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21441>
2023-02-22 12:23:39 +00:00
Mike Blumenkrantz
e375fb0c5c zink: make ZINK_DESCRIPTOR_MODE=db the default
this has been getting beat up a lot lately by radv ci (and me),
so it should be ready to turn on by default for even more testing
in advance of the 23.1 release

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21398>
2023-02-22 02:58:19 +00:00
Mike Blumenkrantz
685bd95de9 zink: move db input attachment size check to screen init
it'd be weird to crash later on after allowing db mode to init

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21398>
2023-02-22 02:58:19 +00:00
Mike Blumenkrantz
b43d32b77d kopper: fix loop iterating for msaa texture creation
the pipe_resource template values need to always be initialized or
else texture creation fails and rendering is broken

fixes #8331

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21450>
2023-02-21 18:57:52 +00:00
Charmaine Lee
1b9b060f0e svga: use upload buffer if texture has pending changes
When establishing a texture transfer map, if there is any pending changes on the
texture, instead of trying direct map with DONTBLOCK first, just
use the upload buffer path.

Fixes piglit tests gen-teximages, arb_copy_images-formats

Cc: mesa-stable

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21393>
2023-02-21 09:48:23 -08:00
Charmaine Lee
3a359385cb svga: fix compatible formats for shareable surfaces
Add typeless format to the compatible format lists for shareable surfaces.

Fixes webgl benchmark crash in eglCreateImage running from firefox on Fedora 37.

Cc: mesa-stable

Reviewed-by: Martin Krastev <krastevm@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21393>
2023-02-21 09:48:23 -08:00
Charmaine Lee
75b7296fc3 svga: fix resource_get_handle from resource created without SHARED bind flag
When an EGLImage is created from a 2D texture and used for texture sharing,
the texture surface might not have been created with the SHARED bind flag.
To allow these surfaces for sharing, this patch sets the USAGE SHARED bit
for surfaces that can be potentially used for sharing even when the SHARED
bind flag is not originally set. Instead of unconditionally enabling the
SHARED bind flag for all surfaces and unnecessarily bypass the surface cache
optimization, this patch only enables the USAGE SHARED bit for surfaces
that also have the RENDER TARGET bind flag.
When the surface handle is inquired and if the surface is currently
marked as cachable, we will need to unset the cachable bit so
the surface handle will not be recycled again.

This patch fixes an assertion in svga_resource_get_handle() when the
EGL_MESA_image_dma_buf_export extension is used in webgl benchamrk running
from firefox in Fedora 37.

Cc: mesa-stable

Reviewed-by: Martin Krastev <krastevm@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21393>
2023-02-21 09:48:23 -08:00
Roland Scheidegger
427ac51c10 llvmpipe: only use accurate_a0 hack if there are no textures bound
This hack caused problems with some dx9 tests before (due to mipgen
test using nearest filter sampling with tex coords exactly between two
texels hence being extremely sensitive to arithmetic inaccuracies),
and we can no longer distinguish this by using pixel_offset to not get
it enabled. But to pass other tests we don't really need the hack when
there's texture sampling involved anyway.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21407>
2023-02-21 17:15:34 +00:00
Daniel Schürmann
2bb369dd8d nir: add assertions that loops don't have a Continue Construct
Hoping that I didn't miss any, this *should* add assertions
to all functions and passes which explicitly handle 'nir_loop'.

Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13962>
2023-02-21 10:41:11 +00:00
Gert Wollny
10f8240caf zink/kopper: Add extra swapchain images for Venus
Together with the previous patch that corrects the number of
swapchain images on Xwayland this gives Zink/Venus a spead
boost in a number of work loads and close the gap or even
surpass VirGL when the benchmark is not GPU bound.
Some numbers:

 zink (Virtio-GPU Venus (Host: RADV RENOIR)) / VirGL

 Benchmark                   VirGL    baseline  Zink/Venus +1
                                                and Xwayland +1
    ==================================================================
    OpenArena (FPS)            63.8     60.1     148.5
    Unigine Sancuary (FPS)    129.1    121.4     164.7
    Unigine Tropics (FPS)     107.2     85.7     114.3
    Unigine Heaven (FPS)       48.5     48.0      51.5
    Unigine Valley (FPS)       48.0     45.6      47.4
    Xonotic (FPS)              90.5     59.4      89.2
    GpuTest/Volcano (Points)   2960     2966      3013

  zink (Virtio-GPU Venus (Host: Intel Xe TGL GT2)) / VirGL

 Benchmark                   VirGL    baseline  Zink/Venus +1
                                                and Xwayland +1
    ===========================================================
    OpenArena (FPS)          95.1       59.8        78.9
    Unigine Sancuary (FPS)   85.5       76.6        81.8
    Unigine Tropics (FPS)    66.0       59.8        62.7
    Unigine Heaven (FPS)     28.8       28.7        28.0
    Unigine Valley (FPS)     29.0       28.0        27.0
    Xonotic (FPS)            64.2       49.4        51.1
    GpuTest/Volcano (Points) 2855       2718        2747

v2: Fix limiting minImageCount (Mike)

Signed-off-by: Gert Wollny <gert.wollny@collabora.co.uk>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21136>
2023-02-21 08:43:30 +00:00
Alyssa Rosenzweig
23ec0d6bb2 asahi: Make shader-db work again
We need a nontrivial blend state otherwise the whole frag shader is optimized
out.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21432>
2023-02-21 08:24:58 +00:00
Alyssa Rosenzweig
029c686c6d asahi: Implement color masks with masked stores
Blend states can require masking colour. Currently, this is handled by
nir_lower_blend, which lowers masks to a read-modify-write operation as required
on Mali hardware. However, our "tilebuffer store" instruction supports a write
mask, allowing us to write only a subset of channels to the tilebuffer. It's
more efficient to use that than to emit pointless tilebuffer loads.

Note that even without tilebuffer loads, non-opaque masks don't work with opaque
pass types.  Here, we handle this with a translucent pass type, which gets HSR
to do the right thing and is consistent with the pass type used previously.
However, it's a bit heavy handed -- Apple manages to use an opaque pass type
with masking but with some unknown HSR fields twiddled. IMO reverse-engineering
those details shouldn't block this because this gets us closer to optimal (just
not all the way there) and is strictly better than what we had before.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21431>
2023-02-21 08:10:15 +00:00
Pierre-Eric Pelloux-Prayer
923758a5c2 winsys/amdgpu: use amdgpu_device_get_fd
If radv is initialized before radeonsi, doing:

   aws->fd = fd;

is incorrect because the device was initialized using the fd
passed by radv.

libdrm has a helper to query the fd used to create the device,
so use it.

We also need to init the kms_handles table in this case
because we're going to share BOs between radeonsi's fd and
the device fd.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3424
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20983>
2023-02-20 20:38:17 +00:00
Amber
919c5568bf freedreno: check for conditional rendering in launch_grid
fixes: KHR-GL45.compute_shader.conditional-dispatching

Signed-off-by: Amber Amber <amber@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21428>
2023-02-20 19:03:25 +00:00
José Roberto de Souza
ec7584130f iris: Export num_fences()
This function will be needed by i915 and Xe backends.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21389>
2023-02-20 18:29:47 +00:00
José Roberto de Souza
780dd291c5 iris: Export update_batch_syncobjs()
This function will be needed by i915 and Xe backends.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21389>
2023-02-20 18:29:47 +00:00
José Roberto de Souza
102e180d0f iris: Export batch debug functions
Those function will be called by different backends, so exporting it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21389>
2023-02-20 18:29:47 +00:00
Alyssa Rosenzweig
9e67d3f237 asahi: Advertise ARB_texture_barrier
We already implement it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21264>
2023-02-20 17:27:21 +00:00
Alyssa Rosenzweig
5f8a59ac89 asahi: Advertise ARB_derivative_control
Our native fddx instruction is already fine, so it's fine to use it for both
fddx_coarse and fddx_fine. We handle both of those cases already so the
extension is trivial.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21264>
2023-02-20 17:27:21 +00:00
Alyssa Rosenzweig
cf96edff1c agx: Implement gathers (nir_texop_tg4)
Passes dEQP-GLES31.functional.texture.gather.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21264>
2023-02-20 17:27:21 +00:00
Alyssa Rosenzweig
dee4784e53 asahi: Fix rendering into mipmapped framebuffers
batch->key.width will be minified, but then the PBE::level field will
incorrectly minify again.

Fixes dEQP-GLES31.functional.shaders.framebuffer_fetch.basic.framebuffer_texture_level

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21400>
2023-02-20 11:47:56 +00:00
Asahi Lina
99a6afd1a6 asahi: Only apply FS lowerings to fragment shaders
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21104>
2023-02-20 11:34:58 +00:00
Alyssa Rosenzweig
2adea481f1 asahi: Move agx_preprocess_nir to CSO create
Now we preprocess shaders once at link time, rather than every time we spawn a
variant. This should reduce variant pain.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21104>
2023-02-20 11:34:58 +00:00
Alyssa Rosenzweig
4495f85b08 asahi: Lower clip distances late
This pass works either early or late, so run it late. It creates some
nir_variables as a side effect, which is weird, but it doesn't matter because
the AGX backend doesn't look at variables and the metadata and lowered I/O
intrinsics are all correct.

This is the last step to moving I/O lowering (and hence shader preprocessing) to
CSO create time.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21104>
2023-02-20 11:34:58 +00:00
Samuel Pitoiset
04c45b91a4 zink/ci: set RADV_PERFTEST=gpl for RADV jobs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21329>
2023-02-20 11:05:26 +00:00
Samuel Pitoiset
6ec392ab4f zink/ci: skip KHR-GL46.texture_swizzle.functional with RADV
They usually timeout.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21329>
2023-02-20 11:05:26 +00:00
Iago Toral Quiroga
1c028a4d5b v3d: support r{g,gba}16f formats for vertex buffers
These are supported, and in fact we are exposing them through
Vulkan. Makes SuperTuxKart significantly faster in GL, I've
observed an FPS increase from ~100% to ~500% depending on the
track.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21361>
2023-02-20 07:45:58 +00:00
Yusuf Khan
689a0c4d4e gallium: create query_memory_info implementation for sw drivers
For ATI_meminfo or NVX_gpu_memory_info on llvmpipe and softpipe.

Signed-off-by: Yusuf Khan <yusisamerican@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21373>
2023-02-20 04:26:28 +00:00
Kenneth Graunke
96ba0344db intel: Use common helpers for TCS passthrough shaders
Rob added these new helpers a while back, which freedreno and radeonsi
both share.  We should use them too.  The new helpers use variables and
system value intrinsics, so we can drop the explicit binding table
creation and just use the normal paths.

Because we have to rewrite the system value uploading anyway, we drop
the scrambling of the default tessellation levels on upload, and instead
let the compiler go ahead and remap components like any normal shader.
In theory, this results in more shuffling in the shader.  In practice,
we already do MOVs for message setup.  In the passthrough shaders I
looked at, this resulted in no extra instructions on Icelake (SIMD8
SINGLE_PATCH) and Tigerlake (8_PATCH).  On Haswell, one shader grew by
a single instruction for a pittance of cycles in a stage that isn't a
performance bottleneck anyway.  Avoiding remapping wasn't so much of an
optimization as just the way that I originally wrote it.  Not worth it.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20809>
2023-02-20 03:54:24 +00:00
Marek Olšák
e6231a1320 Revert "ci/zink: Disable Amnesia trace until the linked issue gets fixed."
This reverts commit 2e807a028a.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21039>
2023-02-18 13:40:56 +00:00