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freedreno/a6xx: Fix sampler view rsc_seqno for X32_S8X24
Elsewhere we are comparing it against the seqno for the "primary" z32 buffer, so be consistent. Otherwise we'll think we need to re-validate every time the sampler view is bound. Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>
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1 changed files with 3 additions and 2 deletions
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@ -390,14 +390,15 @@ fd6_sampler_view_update(struct fd_context *ctx,
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fd6_validate_format(ctx, rsc, cso->format);
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so->seqno = seqno_next_u16(&fd6_context(ctx)->tex_seqno);
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so->rsc_seqno = rsc->seqno;
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if (format == PIPE_FORMAT_X32_S8X24_UINT) {
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rsc = rsc->stencil;
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format = rsc->b.b.format;
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}
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so->seqno = seqno_next_u16(&fd6_context(ctx)->tex_seqno);
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so->ptr1 = rsc;
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so->rsc_seqno = rsc->seqno;
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if (cso->target == PIPE_BUFFER) {
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uint8_t swiz[4] = {cso->swizzle_r, cso->swizzle_g, cso->swizzle_b,
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