freedreno/a6xx: Fix sampler view rsc_seqno for X32_S8X24

Elsewhere we are comparing it against the seqno for the "primary" z32
buffer, so be consistent.  Otherwise we'll think we need to re-validate
every time the sampler view is bound.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21408>
This commit is contained in:
Rob Clark 2023-02-12 09:57:50 -08:00 committed by Marge Bot
parent b40e3c9e6c
commit ea9d1cfb20

View file

@ -390,14 +390,15 @@ fd6_sampler_view_update(struct fd_context *ctx,
fd6_validate_format(ctx, rsc, cso->format);
so->seqno = seqno_next_u16(&fd6_context(ctx)->tex_seqno);
so->rsc_seqno = rsc->seqno;
if (format == PIPE_FORMAT_X32_S8X24_UINT) {
rsc = rsc->stencil;
format = rsc->b.b.format;
}
so->seqno = seqno_next_u16(&fd6_context(ctx)->tex_seqno);
so->ptr1 = rsc;
so->rsc_seqno = rsc->seqno;
if (cso->target == PIPE_BUFFER) {
uint8_t swiz[4] = {cso->swizzle_r, cso->swizzle_g, cso->swizzle_b,