Commit graph

2289 commits

Author SHA1 Message Date
Marek Olšák
fb994f44d9 util: make BITSET_TEST_RANGE_INSIDE_WORD take a value to compare with
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26307>
2023-12-09 00:05:27 +00:00
Yonggang Luo
e7c614bd20 util,vulkan,mesa,compiler: Generate source files with utf8 encoding from mako template
This is for fixes the following error:
FAILED: src/vulkan/runtime/vk_synchronization_helpers.c src/vulkan/runtime/vk_synchronization_helpers.h
"C:\CI-Tools\msys64\mingw64\bin/python3.EXE" "../../src/vulkan/util/vk_synchronization_helpers_gen.py" "--xml" "../../src/vulkan/registry/vk.xml" "--out-c" "src/vulkan/runtime/vk_synchronization_helpers.c" "--beta" "false"

Traceback (most recent call last):
  File "C:/work/xemu/mesa/src/vulkan/util/vk_synchronization_helpers_gen.py", line 213, in main
    f.write(TEMPLATE_C.render(**environment))
UnicodeEncodeError: 'gbk' codec can't encode character '\xa9' in position 15: illegal multibyte sequence

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26515>
2023-12-07 12:41:07 +00:00
Tatsuyuki Ishi
9b2b790ea3 radv: Enable radv_legacy_sparse_binding for DOOM Eternal.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10234
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26464>
2023-12-07 11:40:38 +00:00
Tatsuyuki Ishi
b2e8095d6d radv: Add workaround to allow sparse binding on gfx queues.
For working around improper usage of sparse in DOOM Eternal.

When fully explicit sync sparse binding is implemented, this path will
remain implicit sync to also deal with the improper semaphore usage.
radv_queue_submit_bind_sparse_memory will likely get a bool parameter to
control explicit / implicit sync in that case.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26464>
2023-12-07 11:40:38 +00:00
Eric Engestrom
267f86a8a3 util/blob: fix trivial typo
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26499>
2023-12-06 07:22:02 +00:00
Ryan Neph
a495d437b7 venus: add dri option to enable multi-plane wsi modifiers
Adds a venus dri option to advertise support for multi-plane format
modifiers to Vulkan's common WSI. Otherwise, Venus will only support
modifiers with planeCount == 1 to ensure compatibility with Xwayland's
virgl-backed Glamor backend.

Signed-off-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26240>
2023-12-05 23:55:05 +00:00
Yonggang Luo
83a5fb9faf util: Fixes note: the alignment of ‘_Atomic long long int’ fields changed in GCC 11.
This is a improve of https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22121

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23961>
2023-12-05 09:26:08 +00:00
Erik Faye-Lund
1fbec9f532 util/format: document NONE swizzle
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26192>
2023-12-01 07:53:58 +00:00
ratatouillegamer
5f7aa0e012 hasvk: Enable hasvk override Vulkan API Version for Brawlhalla
Brawlhalla runs good with DXVK 2.0+, it can be enable as default
avoiding to use OpenGL Brawlhalla renderer.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26433>
2023-12-01 07:18:10 +00:00
ratatouillegamer
9de6928746 hasvk: Add Vulkan API version override
This allows to use a driconf to override the API version and expose Vulkan 1.3.
That can be used in conjunction with certain games like for example Brawlhalla
which benefits from some DXVK +2.0 features.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26433>
2023-12-01 07:18:10 +00:00
Jesse Natalie
698344b93c d3d12/driconf: Force on ARB_texture_view for Blender
Reviewed-by: Anthony Roberts <anthony.roberts@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26326>
2023-11-24 20:03:22 +00:00
Samuel Pitoiset
d9f312b86a radv: set radv_invariant_geom=true for War Thunder
War Thunder has native Vulkan support.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10186
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26334>
2023-11-23 16:50:39 +00:00
David Rosca
73d69ef1e6 util/rbsp: Fill bits twice if reading more than 16 bits
vl_rbsp_fillbits may fill less than 32 bits if it removes emulation
prevention bytes, but will fill at least 16 bits. We need to call it
twice when reading more than 16 bits.

This fixes parsing H264 SPS packed header in va frontend when emulation
prevention bytes are at position where 32 bit values are read.

Cc: mesa-stable

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26276>
2023-11-22 13:04:06 +00:00
Tapani Pälli
aba00ff391 drirc: Set limit_trig_input_range option for Valheim
Fixes ocean rendering in Valheim.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10174
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26295>
2023-11-21 09:08:26 +00:00
Dennis Bonke
653405ee08 mesa: add managarm support
Co-authored-by: Alexander Richards <electrodeyt@gmail.com>
Signed-off-by: Alexander Richards <electrodeyt@gmail.com>
Signed-off-by: Dennis Bonke <dennis@managarm.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25818>
2023-11-20 13:35:19 +00:00
Tapani Pälli
0e68dd1a52 drirc: use fake_sparse for Armored Core 6
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9808
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25217>
2023-11-20 13:06:24 +00:00
Matt Turner
f05688aa32 util: Provide DRM_DEVICE_GET_PCI_REVISION definition
This allows src/intel/dev/intel_device_info.c to build with libdrm
stubbed out.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26265>
2023-11-18 17:01:24 +00:00
Matt Turner
5022a26b50 util: Include stdint.h in libdrm.h
drmGetDevices2()'s first parameter is a uint32_t.

Fixes: e05abb1345 ("util: Add a simple no-op libdrm shim")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26265>
2023-11-18 17:01:24 +00:00
Rhys Perry
9e9eb87dd3 radv: enable radv_disable_trunc_coord for vkd3d-proton/DXVK
This fixes diagonal SSAO artifacts in some games.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9253
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6395
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25911>
2023-11-17 15:15:28 +00:00
Rhys Perry
4d2a3b9573 radv: add radv_disable_trunc_coord option
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25911>
2023-11-17 15:15:27 +00:00
Eric Engestrom
9c62aee027 util/xmlconfig: drop default SYSCONFDIR & DATADIR values
The only build system left is meson, which always defines these.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26228>
2023-11-16 15:55:02 +00:00
Lionel Landwerlin
8b36d230bb anv: workaround XeSS for Satisfactory
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10152
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26217>
2023-11-16 13:08:01 +00:00
Tapani Pälli
01046cd6ad anv/drirc: add option to disable FCV optimization
There are rendering issues with FCV on DG2 and Unreal engine 5.1,
patch adds option to disable fcv in drirc.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26169>
2023-11-15 18:16:56 +00:00
Samuel Pitoiset
bb92c34c28 radv: set radv_zero_vram=true for Unreal Engine 4/5
Unreal Engine seems to rely on uninitialized memory and
RADV_DEBUG=zerovram fixes a bunch of issues.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9025
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9380
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9026
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26188>
2023-11-15 11:24:31 +00:00
Samuel Pitoiset
9b840df9f6 radv: add drirc options to force re-compilation of shaders when needed
On Steam Deck, shaders are pre-compiled for better performance (less
stuttering, less CPU usage, etc). But when a compiler fix needs to be
backported, there is currently no way to handle this properly.

This introduces 3 drirc options
radv_override_{graphics,compute,ray_tracing}_shader_version in order to
force the driver to re-compile pipelines when needed. By default, the
shader version is 0 for all pipelines.

When one drirc is set for a specific game, RADV will re-compile all
pipelines only once with the compiler fix included (because the
pipeline key would be different).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26094>
2023-11-13 10:47:26 +00:00
Tele42
631dc5b5e6 drirc: enable vk_wsi_force_swapchain_to_current_extent for "The Talos Principle VR"
The Talos Principle VR shares the same engine quirk as its non-VR counterpart.

Backport-to: 23.2
Backport-to: 23.3

Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26047>
2023-11-09 19:42:07 +00:00
Tatsuyuki Ishi
9f7e57ce98 fast_urem_by_const: #ifdef DEBUG an assertion.
util_fast_urem32 is used in the hot path of hashmap lookups and this
asserts causes noticeable overhead. The correctness of this code should
be well exercised both from testing and mathematical proofs, so gate
this assertion behind #ifdef DEBUG.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14168>
2023-11-08 07:41:00 +00:00
Dave Airlie
1782ab4d8b util: add a bitstream encoder for video stream headers.
This is based on the d3d12 code, and is mostly a rewrite in C,
these are just some helpers to use for writing h264 and h265
headers for vulkan encode.

Acked-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25874>
2023-11-03 22:59:36 +00:00
Connor Abbott
e8b3006bfd util/rb_tree: Add augmented trees and interval trees
An "augmented tree" is a tree with extra data attached which flows from
the leaves to the root. An "interval tree" is a datastructure of
(potentially-overlapping) intervals where, in addition to inserting and
removing intervals, we can quickly lookup all the intervals which
overlap a given interval.

After describing red-black trees, CLRS explains how it's possible to
implement an interval tree using an augmented red-black tree where the
nodes are ordered by interval start and each node also stores the
maximum interval end for its entire subtree.

Implement the interval tree extension described by CLRS. Iterating over
all overlapping intervals is actually an exercise, so we have to solve
the exercise. The recursive solution has been re-written to use the
parent pointers to avoid needing a stack, similarly to rb_tree_first()
and rb_node_next().

For now, we only implement unsigned intervals, but the core algorithms
are all abstracted to allow other types. There's still some boilerplate,
but it's the best that can be done in C.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22071>
2023-11-02 21:03:46 +00:00
Connor Abbott
767e68972e util/rb_tree: Fix editorconfig
rb_tree has 4 space tabs, unlike everything else in util. We should
probably retab it, but for now add an editorconfig so that at least
people's editors aren't messed up.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22071>
2023-11-02 21:03:46 +00:00
duncan.hopkins
96d55d784c util: Update util/libdrm.h stubs to allow loader.c to compile on MacOS.
MacOS does not have the libdrm libraries so is missing xf86drm.h.
util/libdrm.h already has a collection of stubs for systems that do not support the libraries.

A compile on MacOS will fail with the source that uses newer drm functions and structures.
Update adds in missing items that MacOS code needs to compile and run.
New code is copied from the public repository: https://gitlab.freedesktop.org/mesa/drm/-/blob/main/xf86drm.h

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25992>
2023-11-02 15:08:17 +00:00
Casey Bowman
71064879d1 anv: Override vendorID for Diablo IV
Another case of a game assuming XeSS is available since an
Intel ARC GPU is discovered by the game's executable binary.

With this, a warning will appear that GPU is unstable/not supported,
but a warning is preferable over the game crashing.

No other issues observed upon starting & playing the game.

Signed-off-by: Casey Bowman <casey.g.bowman@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25965>
2023-10-31 21:32:48 +00:00
Erik Faye-Lund
e350193eb5 util: remove unused lut
This was added in 153c714f2a ("util: add softfloat functions to
operate with doubles and floats"), but never used. Let's just drop it.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25746>
2023-10-30 12:35:07 +00:00
Etaash Mathamsetty
830018abfa driconf: add a workaround for Rainbow Six Siege
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25734>
2023-10-30 06:05:17 +00:00
Rhys Perry
477b310dfd util: skip zero-sized SHA1Update
Fixes UBSan error:
src/util/sha1/sha1.c:140:8: runtime error: null pointer passed as argument 2, which is declared to never be null

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25853>
2023-10-25 17:27:47 +00:00
David Rosca
081f972eba util/vl: Fix vl_rbsp parser with bitstreams without emulation bytes
This is used for parsing VA packed headers and those can be without
emulation prevention bytes.
Add emulation_bytes argument to vl_rbsp_init and skip all emulation
bytes handling when set.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25565>
2023-10-25 01:03:58 +00:00
Corentin Noël
2ef0e6be17 util: Remove MESA_TRACE_BEGIN/END
There are no user of these macros anymore, simplify the cpu_trace header.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25308>
2023-10-23 17:20:03 +00:00
Corentin Noël
d64765c200 util/perf: Remove the tracing categories
The slow category remains unused in Mesa currently, readd it once we have
a use for it.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25308>
2023-10-23 17:20:03 +00:00
Corentin Noël
b7a4e78071 util: Avoid the use of MESA_TRACE_BEGIN/END
Switch the last occurrences of it to the MESA_TRACE_SCOPE macro which is
easier to use.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25308>
2023-10-23 17:20:03 +00:00
Lionel Landwerlin
11b4c23d19 anv: add ring buffer mode to generated draw optimization
When the number of draw calls is very large, instead of allocating
large amounts of batch buffer space for the draws, use a ring buffer
and process the draw calls by batches.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8645
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361>
2023-10-20 13:07:53 +00:00
Lionel Landwerlin
da1e39faa4 util/glsl2spirv: add ability to pass defines
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361>
2023-10-20 13:07:53 +00:00
Chia-I Wu
6e2bb716b0 util: improve BITFIELD_MASK and BITFIELD64_MASK on clang
gcc is able to optimize away either the modulo or the logical and.  This
makes no difference to gcc.

clang is only able to optimize away the logical and.  This allows clang
to generate faster code for BITFIELD_MASK.

As for BITFIELD64_MASK, this also makes no difference to clang except it
fixes a compile error for BITFIELD64_MASK(64):

  error: shift count >= width of type [-Werror,-Wshift-count-overflow]

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9989
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25757>
2023-10-18 03:20:24 +00:00
Lionel Landwerlin
6499c43cc7 u_trace: generate tracepoint name array in perfetto header
The driver glue doesn't have access to that information in a
centralized place. If you want to generate perfetto iid, you need
access to all names.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25730>
2023-10-17 11:19:13 +00:00
Lionel Landwerlin
1afc876afd u_trace: generate tracepoint index parameter in perfetto callbacks
Useful to figure out what's the tracepoint name you're implementing.
We'll use this in the intel perfetto integration glue to index into an
array of perfetto iid.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25730>
2023-10-17 11:19:13 +00:00
Eric Engestrom
042d256c1e util/xmlconfig: inline datadir
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21808>
2023-10-16 07:59:38 +00:00
Eric Engestrom
44b0764930 util/xmlconfig: drop driInjectDataDir() now that DRIRC_CONFIGDIR is always supported
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21808>
2023-10-16 07:59:38 +00:00
Erik Faye-Lund
128c2bdf73 meson: add src/util to the drirc search path
With this, we pick up new in-tree defaults for driconfig variables
when using meson devenv. This is useful for testing new config
variables.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21808>
2023-10-16 07:59:38 +00:00
Erik Faye-Lund
6c5a9ede64 util/xmlconfig: add an env-var for overriding drirc search dir
This adds an environment variable that can be used to override the
global drirc serach directory. This can be useful for debugging, and
meson devenv, as used in the following commit.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21808>
2023-10-16 07:59:38 +00:00
Chia-I Wu
567c32b55c radv, drirc: rename radv_require_{etc2,astc}
Rename them to vk_require_{etc2,astc}.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
2023-10-14 02:36:39 +00:00
Karol Herbst
e36c49b69a zink: fix RA textures
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
2023-10-14 01:01:16 +00:00