Commit graph

167836 commits

Author SHA1 Message Date
Marek Olšák
f7076d129d amd: add nir_intrinsic_xfb_counter_sub_amd and fix overflowed streamout offsets
Fixes: 5ec79f9899 - ac/nir/ngg: nogs support streamout

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21584>
2023-03-07 22:08:47 +00:00
Mark Janes
08649e3673 intel/fs: use generated workaround helpers for Wa_14017989577
Wa_14017989577 is a clone of Wa_14015360517, which applies to several
platforms beyond INTEL_PLATFORM_DG2_G10.

Update references to Wa_14017989577, and use the generated workaround
helper to ensure application to the proper platforms.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21744>
2023-03-07 21:43:11 +00:00
Emma Anholt
5fd9abae90 ci/etnaviv: Drop the dEQP-GLES2.functional.uniform_api.random.94 xfail.
This has been consistently passing.  I think I just missed it in my
previous update.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21769>
2023-03-07 21:03:33 +00:00
Emma Anholt
d52cf80bcb ci: Add some xfail updates from VKCTS 1.3.5.0 for the manual jobs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21769>
2023-03-07 21:03:33 +00:00
Mike Blumenkrantz
53da1534b5 llvmpipe: fix LP_PERF=no_depth to ignore depth format
cc: mesa-stable

Reviewed-by: Brian Paul brianp@vmware.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21582>
2023-03-07 20:42:43 +00:00
Juan A. Suarez Romero
baff509924 v3d/v3dv: define performance counters in common
Both OpenGL and Vulkan drivers share the same performance counters.

Let's move them to a common place instead of duplicating.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21420>
2023-03-07 18:57:41 +00:00
Antonio Gomes
161e3f29f4 iris: Add support for 2d images created from buffers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
2023-03-07 18:24:56 +00:00
Antonio Gomes
4f096d0d88 llvmpipe: Add new caps PIPE_CAP_LINEAR_IMAGE_(PITCH_ALIGNMENT|BASE_ADDRESS_ALIGNMENT)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
2023-03-07 18:24:56 +00:00
Antonio Gomes
06daa03c5c rusticl: Implement spec for cl_khr_image2d_from_buffer
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
2023-03-07 18:24:56 +00:00
Antonio Gomes
010c18c443 gallium: Add new caps PIPE_CAP_LINEAR_IMAGE_(PITCH_ALIGNMENT|BASE_ADDRESS_ALIGNMENT)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
2023-03-07 18:24:56 +00:00
Antonio Gomes
7839341d8f lvmpipe/cs: Add support for 2d images created from buffers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
2023-03-07 18:24:56 +00:00
Antonio Gomes
9cbdf3673b mesa/st, nine, nouveau: Fix uninitialized pipe_sampler_view structs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
2023-03-07 18:24:56 +00:00
Antonio Gomes
cc36fd0f61 gallium, rusticl: Add tex2d_from_buf in image_view and sampler_view
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
2023-03-07 18:24:56 +00:00
Antonio Gomes
07270ece45 rusticl: Enable mapImage for images created from buffers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
2023-03-07 18:24:56 +00:00
Antonio Gomes
9dda1e4872 rusticl: Enable copy for images created from buffers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
2023-03-07 18:24:56 +00:00
Antonio Gomes
3c51db3f21 rusticl: Enabling image fill for images created from buffers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
2023-03-07 18:24:56 +00:00
Antonio Gomes
e40fd3bd60 rusticl: Enabling reading/writing for images created from buffers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>
2023-03-07 18:24:56 +00:00
Daniel Schürmann
26f430d6ce radv/rt: move radv_pipeline_key from rt_variables to traversal_data
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>
2023-03-07 17:00:50 +00:00
Daniel Schürmann
d87bbee0be radv: remove unused parameters from radv_compute_pipeline_compile()
Also make this function static.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>
2023-03-07 17:00:50 +00:00
Daniel Schürmann
d06aa7b71d radv/rt: introduce and use radv_rt_pipeline_compile()
This is essentially a code-duplication of radv_compute_pipeline_compile()
but will later be more specialized for the needs of RT pipelines.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>
2023-03-07 17:00:50 +00:00
Daniel Schürmann
f1565de4cc radv: expose radv_pipeline_capture_shaders()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>
2023-03-07 17:00:50 +00:00
Daniel Schürmann
2fbd495ce7 radv: expose radv_postprocess_nir()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>
2023-03-07 17:00:50 +00:00
Samuel Pitoiset
c87c34bbba radv: fix defining RADV_USE_WSI_PLATFORM
RADV_USE_WSI_PLATFORM was unused in radv_CreateImage().

Fixes: 2a5d7f4926 ("radv: fix missing implementation of creating images from swapchains")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21763>
2023-03-07 16:37:17 +00:00
José Roberto de Souza
a6dcd62f44 iris: Move iris_bo_wait_gem() to i915/iris_bufmgr.c
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21494>
2023-03-07 16:16:10 +00:00
José Roberto de Souza
97becc1b6f iris: Move iris_bo_busy_gem() to i915/iris_bufmgr.c
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21494>
2023-03-07 16:16:10 +00:00
José Roberto de Souza
7553d921f6 iris: Move bo_set_caching to kmd backend
For the platforms that call it, it a function in the hot path so
moving it to kmd backend.

After this patch i915/iris_bufmgr.c is empty but not removing it
as next patch will add functions to it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21494>
2023-03-07 16:16:10 +00:00
José Roberto de Souza
bdfcc98001 iris: Move bo_madvise to kmd backend
bo_madvise() is on hot path, so moving it to kmd backend.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21494>
2023-03-07 16:16:10 +00:00
José Roberto de Souza
d636e772c0 intel/common: Implement the Xe functions for intel_gem
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21699>
2023-03-07 15:41:36 +00:00
José Roberto de Souza
19aa1fb851 intel/common: Implement the Xe functions for intel_engine
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21699>
2023-03-07 15:41:36 +00:00
Samuel Pitoiset
7b2086d741 radv: fix border color swizzle for stencil-only format on GFX9+
Swizzle of 8-bit stencil format is defined as _x__ but the hw expects
BC_SWIZZLE_XYZW.

Fixes dEQP-VK.pipeline.monolithic.sampler.border_swizzle.*s8_uint*.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21482>
2023-03-07 15:10:33 +00:00
Tapani Pälli
889c3ee6b8 anv: fix sends_count_expectation assert on simd32
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21758>
2023-03-07 14:37:31 +00:00
Yogesh Mohan Marimuthu
347a5b79f9 ac/surface: only adjust pitch if surf_pitch was modified
Modifying pitch for all LINEAR surface isn't correct;
the original change that modified surf_pitch was only
intended for YUV textures.

This fixes vkGetImageSubresourceLayout rowPitch return value
for VK_FORMAT_BC3_UNORM_BLOCK + VK_IMAGE_TILING_LINEAR.

Fixes: fcc499d5 (ac/surface: adjust gfx9.pitch[*] based on surf->blk_w)

v2: add check for UYVY format (Pierre-Eric)
v3: move blk_w division to above if check (Pierre-Eric)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21595>
2023-03-07 13:50:31 +00:00
David Heidelberg
f72774f13f ci/lavapipe: fixes typo
Fixes: 5ee724e180 ("ci/lavapipe: add recent occasional flake")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21759>
2023-03-07 13:26:52 +00:00
Georg Lehmann
de4805f25f aco: use bitfield array helpers for valu modifiers
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
2023-03-07 11:53:23 +00:00
Georg Lehmann
e7559da757 aco: add bitfield array helper classes
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
2023-03-07 11:53:23 +00:00
Georg Lehmann
097a97cc42 aco: remove VOP[123C]P? structs
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
2023-03-07 11:53:23 +00:00
Georg Lehmann
08542318e7 aco/optimizer: simplify using VALU instruction
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
2023-03-07 11:53:23 +00:00
Georg Lehmann
4591703e79 aco/print_ir: simplify using VALU instruction
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
2023-03-07 11:53:23 +00:00
Georg Lehmann
17ff2e8c52 aco: validate VALU modifiers
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
2023-03-07 11:53:23 +00:00
Georg Lehmann
fc193ab4db aco/ra: set opsel_hi to zero when converting to VOP2
Otherwise the new modifier validation will fail.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
2023-03-07 11:53:23 +00:00
Georg Lehmann
366cf4efaa aco/ir: rework IR to have one common valu instruction struct
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
2023-03-07 11:53:23 +00:00
Georg Lehmann
77afe7d960 aco: treat VINTERP_INREG as VALU
It's just v_fma with fixed DPP8 and builtin s_waitcnt_expcnt, so it can mostly
be handled as a pure VALU instruction.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>
2023-03-07 11:53:23 +00:00
Samuel Pitoiset
c119b19f98 radv: fix incorrect stride for primitives generated query with GDS
When the query pool uses GDS (for NGG), the stride is 40.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8412
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21650>
2023-03-07 10:15:35 +01:00
Lionel Landwerlin
a278eeb719 nir: fix nir_ishl_imm
Both GLSL & SPIRV have undefined values for shift > bitsize. But SM5
says :

   "This instruction performs a component-wise shift of each 32-bit
    value in src0 left by an unsigned integer bit count provided by
    the LSB 5 bits (0-31 range) in src1, inserting 0."

Better to not hard code the wrong behavior in NIR.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e227bb9fd5 ("nir/builder: add ishl_imm helper")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@colllabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21720>
2023-03-07 08:14:34 +00:00
Samuel Pitoiset
5ec80ab37c radv: do not add descriptor BOs on update when the global BO list is used
It's unnecessary and already checked elsewhere like in
vkCmdBindDescriptorSets(). This improves performance of vkoverhead
test #76 (descriptor_1image) by +18%. It's the same performance as
PRO on my Threadripper 1950X now. This should also slightly improve
texel and buffer descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20699>
2023-03-07 07:30:29 +00:00
Karol Herbst
1aca36815e gallivm: fix lp_vec_add_offset_ptr for 32 bit builds
The function assumed ptrs are always 64 bit sized.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8267
Fixes: 442d1fe5ad ("gallivm: use masked intrinsics for global and scratch access.")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21604>
2023-03-07 04:17:15 +00:00
Karol Herbst
4c24ff0a34 rusticl/kernel: Images arg sizes also have to match the host pointer size
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8267
Fixes: b0d698c532 ("rusticl: correctly check global argument size")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21604>
2023-03-07 04:17:15 +00:00
Alyssa Rosenzweig
66f806d01d agx: Assert that memory index is 32-bit reg
Semantics will be wrong otherwise (reading garbage).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>
2023-03-07 02:58:35 +00:00
Alyssa Rosenzweig
2a174f0019 agx/lower_address: Handle 16-bit offsets
These need to be upconverted for correctness.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>
2023-03-07 02:58:35 +00:00
Alyssa Rosenzweig
9f5a4a9604 agx/lower_address: Fix handling of 64-bit immediates
We can't add a 64-bit immediate with the hardware iadd, that won't work. What we
can do is add a 32-bit immediate, derived as the low 32-bits of a 64-bit
nir_ssa_def.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>
2023-03-07 02:58:35 +00:00