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agx/lower_address: Fix handling of 64-bit immediates

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We can't add a 64-bit immediate with the hardware iadd, that won't work. What we
can do is add a 32-bit immediate, derived as the low 32-bits of a 64-bit
nir_ssa_def.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>
This commit is contained in:
Alyssa Rosenzweig 2023-03-03 16:27:26 -05:00 • committed by Marge Bot
parent 4bd0e1d097
commit 9f5a4a9604
1 changed files with 7 additions and 3 deletions
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10
src/asahi/compiler/agx_nir_lower_address.c
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@ -97,12 +97,16 @@ match_address(nir_builder *b, nir_ssa_scalar base, int8_t format_shift)
for (unsigned i = 0; i < ARRAY_SIZE(summands); ++i) {
/* We can add a small constant to the 64-bit base for free */
if (nir_ssa_scalar_is_const(summands[i])) {
if (nir_ssa_scalar_is_const(summands[i]) &&
nir_ssa_scalar_as_uint(summands[i]) < (1ull << 32)) {
uint32_t value = nir_ssa_scalar_as_uint(summands[i]);
return (struct match){
.base = summands[1 - i],
.offset = summands[i],
.offset = nir_get_ssa_scalar(nir_imm_int(b, value), 0),
.shift = -format_shift,
.sign_extend = true,
.sign_extend = false,
};
}