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Author SHA1 Message Date
Samuel Pitoiset
effa563bb0 radv: adjust computing the PC from the trap handler on GFX12 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34840>
 2025-05-09 09:04:57 +00:00
Valentine Burley
34012d5af3 ci: Remove EXTERNAL_KERNEL_TAG variable 
The EXTERNAL_KERNEL_TAG variable is no longer needed.
For LAVA and bare-metal, we can override the KERNEL_TAG variable to fetch
both the kernel image and modules from a different tag than the default
mainline gfx-ci/linux kernel.

For LAVA, this also avoids the issue where jobs using EXTERNAL_KERNEL_TAG
would still have mainline kernel modules downloaded by the LAVA overlay.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34873>
 2025-05-09 07:18:53 +00:00
Samuel Pitoiset
4b76d04f7f radv: ignore conditional rendering with vkCmdTraceRays* 
CmdTraceRays is neither a dispatch or a draw command which means it
shouldn't be affected by conditional rendering.

Fixes recent VKCTS coverage.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34868>
 2025-05-08 19:08:10 +00:00
Samuel Pitoiset
b7d2cdd2b4 radv: ignore radv_disable_dcc_stores on GFX12
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It's not necessary because DCC is completely transparent to the
userspace driver. Also it's causing issues with scanout.

This fixes rendering issues with scanout in Indiana Jones.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12924
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34859>
 2025-05-08 17:17:28 +02:00
Rhys Perry
2704a30df0 radv: perform nir_opt_access before the first radv_optimize_nir
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Two lowered loads might not be CSE'd after nir_lower_explicit_io if one of
them is shrinked. This doesn't happen for deref loads, but it needs the
CAN_REORDER flag first.

fossil-db (gfx1201):
Totals from 556 (0.70% of 79377) affected shaders:
MaxWaves: 14936 -> 14940 (+0.03%); split: +0.05%, -0.03%
Instrs: 2140334 -> 2140942 (+0.03%); split: -0.07%, +0.10%
CodeSize: 11137948 -> 11145416 (+0.07%); split: -0.07%, +0.13%
SpillSGPRs: 2385 -> 2527 (+5.95%); split: -0.34%, +6.29%
Latency: 12310570 -> 12305011 (-0.05%); split: -0.08%, +0.04%
InvThroughput: 2136142 -> 2135516 (-0.03%); split: -0.06%, +0.03%
VClause: 47419 -> 47420 (+0.00%); split: -0.01%, +0.01%
SClause: 58423 -> 58290 (-0.23%); split: -0.36%, +0.14%
Copies: 160626 -> 161321 (+0.43%); split: -0.25%, +0.68%
Branches: 69693 -> 69710 (+0.02%); split: -0.04%, +0.06%
PreSGPRs: 34824 -> 34945 (+0.35%); split: -0.24%, +0.58%
PreVGPRs: 28682 -> 28649 (-0.12%); split: -0.36%, +0.24%
VALU: 1080800 -> 1081171 (+0.03%); split: -0.04%, +0.08%
SALU: 353112 -> 353770 (+0.19%); split: -0.15%, +0.34%
SMEM: 81587 -> 81364 (-0.27%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
18a53230eb aco: don't check dst_bitsize in apply_load_extract 
I don't think this is necessary.

fossil-db (gfx1201):
Totals from 12 (0.02% of 79377) affected shaders:
Instrs: 73041 -> 72669 (-0.51%); split: -0.51%, +0.00%
CodeSize: 417376 -> 413852 (-0.84%); split: -0.85%, +0.00%
Latency: 1301862 -> 1301533 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 599874 -> 599723 (-0.03%)
VClause: 1344 -> 1346 (+0.15%)
Copies: 15855 -> 15832 (-0.15%); split: -0.37%, +0.23%
VALU: 42138 -> 41883 (-0.61%); split: -0.61%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
eb95f7cc0e aco: support sign extension in apply_load_extract 
fossil-db (gfx1201):
Totals from 10 (0.01% of 79377) affected shaders:
Instrs: 28954 -> 28938 (-0.06%)
CodeSize: 164552 -> 164472 (-0.05%)
Latency: 1249341 -> 1247037 (-0.18%)
InvThroughput: 297077 -> 296618 (-0.15%)
VALU: 15951 -> 15941 (-0.06%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
0de0fd38b4 aco: support more opcodes in apply_ds_extract 
fossil-db (gfx1201):
Totals from 320 (0.40% of 79377) affected shaders:
Instrs: 3439754 -> 3432384 (-0.21%)
CodeSize: 18008696 -> 17973180 (-0.20%); split: -0.20%, +0.00%
VGPRs: 16016 -> 15404 (-3.82%)
Latency: 20246168 -> 20295740 (+0.24%); split: -0.08%, +0.33%
InvThroughput: 4462916 -> 4478546 (+0.35%); split: -0.08%, +0.43%
VClause: 87123 -> 87099 (-0.03%)
Copies: 261779 -> 261948 (+0.06%); split: -0.05%, +0.12%
Branches: 94611 -> 94601 (-0.01%); split: -0.01%, +0.00%
VALU: 1870695 -> 1865738 (-0.26%)
SALU: 488351 -> 487557 (-0.16%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
3b42626973 ac/nir: allow 8/16-bit smem loads 
fossil-db (gfx1201):
Totals from 295 (0.37% of 79377) affected shaders:
Instrs: 314018 -> 313355 (-0.21%); split: -0.22%, +0.00%
CodeSize: 1697996 -> 1696528 (-0.09%); split: -0.11%, +0.02%
Latency: 4197719 -> 4197106 (-0.01%)
InvThroughput: 1258891 -> 1258744 (-0.01%)
PreSGPRs: 12232 -> 12230 (-0.02%)
SALU: 66762 -> 66269 (-0.74%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
5b116c4de9 ac/nir: allow vectorization of unsupported 8/16-bit loads 
These can later be lowered to a vectorized 32-bit load.

fossil-db (gfx1201):
Totals from 1259 (1.59% of 79377) affected shaders:
MaxWaves: 36821 -> 36817 (-0.01%)
Instrs: 4363702 -> 4355749 (-0.18%); split: -0.23%, +0.05%
CodeSize: 22779980 -> 22706504 (-0.32%); split: -0.37%, +0.05%
VGPRs: 69672 -> 69792 (+0.17%); split: -0.02%, +0.19%
SpillSGPRs: 675 -> 673 (-0.30%)
Latency: 26684053 -> 26663819 (-0.08%); split: -0.11%, +0.03%
InvThroughput: 5617687 -> 5614798 (-0.05%); split: -0.10%, +0.04%
VClause: 106830 -> 106654 (-0.16%); split: -0.17%, +0.00%
SClause: 75523 -> 75495 (-0.04%); split: -0.04%, +0.01%
Copies: 323199 -> 323525 (+0.10%); split: -0.10%, +0.20%
Branches: 109475 -> 109480 (+0.00%); split: -0.00%, +0.01%
PreSGPRs: 55036 -> 55040 (+0.01%)
PreVGPRs: 47538 -> 47582 (+0.09%); split: -0.12%, +0.21%
VALU: 2377777 -> 2389977 (+0.51%); split: -0.02%, +0.53%
SALU: 578272 -> 578385 (+0.02%); split: -0.02%, +0.04%
VMEM: 190065 -> 181204 (-4.66%)
SMEM: 99709 -> 99565 (-0.14%)
VOPD: 244 -> 243 (-0.41%); split: +0.41%, -0.82%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
6dbf44ad9c ac/nir: allow less than one register of overfetch 
This is to allow vectorization of 8/16-bit loads, which can later be
cheaply lowered to a 32-bit load.

fossil-db (gfx1201):
Totals from 178 (0.22% of 79377) affected shaders:
MaxWaves: 4138 -> 4102 (-0.87%)
Instrs: 619714 -> 617917 (-0.29%); split: -0.32%, +0.03%
CodeSize: 3364396 -> 3352724 (-0.35%); split: -0.38%, +0.03%
VGPRs: 12896 -> 12980 (+0.65%); split: -0.19%, +0.84%
SpillSGPRs: 546 -> 545 (-0.18%)
Latency: 7589585 -> 7406076 (-2.42%); split: -2.45%, +0.04%
InvThroughput: 1926356 -> 1879866 (-2.41%); split: -2.42%, +0.00%
VClause: 12301 -> 11750 (-4.48%)
SClause: 13614 -> 13583 (-0.23%); split: -0.45%, +0.22%
Copies: 82207 -> 82265 (+0.07%); split: -0.10%, +0.17%
Branches: 19284 -> 19266 (-0.09%)
PreSGPRs: 9525 -> 9457 (-0.71%)
PreVGPRs: 12366 -> 12421 (+0.44%)
VALU: 347928 -> 348020 (+0.03%); split: -0.01%, +0.04%
SALU: 82620 -> 82519 (-0.12%); split: -0.19%, +0.07%
VMEM: 22248 -> 21430 (-3.68%)
SMEM: 17951 -> 17843 (-0.60%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
ddef4bddf8 ac/nir: round components when lowering 8/16-bit loads to 32-bit 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
4fa1c92862 aco/gfx12: allow 8/16-bit smem loads 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
75efc218f5 aco: support 8/16-bit loads in smem_combine() 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
8abb787c6b radv/gfx12: use dword3 smem loads for push constants 
fossil-db (gfx1201):
Totals from 5 (0.01% of 79377) affected shaders:
(no affected stats)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
13b0131edc aco/gfx12: select dwordx3 smem loads 
fossil-db (gfx1201):
Totals from 47814 (60.24% of 79377) affected shaders:
MaxWaves: 1436871 -> 1436855 (-0.00%); split: +0.00%, -0.00%
Instrs: 36653621 -> 36649461 (-0.01%); split: -0.07%, +0.06%
CodeSize: 194102884 -> 194076060 (-0.01%); split: -0.06%, +0.04%
VGPRs: 2267944 -> 2269648 (+0.08%); split: -0.01%, +0.08%
SpillSGPRs: 8301 -> 8295 (-0.07%); split: -0.08%, +0.01%
Latency: 249627561 -> 249631829 (+0.00%); split: -0.04%, +0.04%
InvThroughput: 40004042 -> 40003575 (-0.00%); split: -0.02%, +0.02%
VClause: 680488 -> 680429 (-0.01%); split: -0.08%, +0.07%
SClause: 1062835 -> 1066206 (+0.32%); split: -0.20%, +0.52%
Copies: 2393981 -> 2393607 (-0.02%); split: -0.23%, +0.22%
Branches: 728117 -> 728113 (-0.00%); split: -0.00%, +0.00%
VALU: 20358269 -> 20358585 (+0.00%); split: -0.01%, +0.01%
SALU: 4737317 -> 4736411 (-0.02%); split: -0.07%, +0.06%
SMEM: 1712349 -> 1710075 (-0.13%); split: -0.13%, +0.00%
VOPD: 5808 -> 5813 (+0.09%); split: +0.12%, -0.03%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
90a5c93ea5 aco: prepare for dwordx3 smem loads 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:50 +00:00
Rhys Perry
208d62430f aco/gfx12: use s_load_dwordx3 to load ray launch sizes 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:49 +00:00
Rhys Perry
cbd718506b aco: add smem opcode helper 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
 2025-05-08 13:30:49 +00:00
Jesse.Zhang
d8624e6a79 winsys/amdgpu: Add support for queue priority in Mesa
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This patch adds support for queue priority levels in Mesa's AMDGPU winsys layer.
The changes include:

1. Updated ac_drm_create_userqueue() to accept and pass through flags parameter
2. Modified amdgpu_userq_init() to use the flags when creating queues
3. Added flags field to amdgpu_userq struct to store priority settings
4. Updated header definitions to match kernel UAPI changes

This aligns with the kernel changes provided by Alex:
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122782.html
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122780.html
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122786.html

v2: We only need 1 normal priority queue and 1 TMZ normal priority queue.(Marek Olšák)
v3: Simplified to only support normal priority queues
v4: use a local variable instead of being in struct amdgpu_userq.(Marek Olšák)
v5: rebase the latest main branch.

Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34568>
 2025-05-08 04:29:29 +00:00
Marek Olšák
870d17012a ac: adjust maximum HS workgroup size
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This has no effect on triangles because max 64 patches implied max 192
threads, but it improves performance for cases when the number of threads
per patch is > 3.

This improves the score for gfxbench5 "gl_tess_off" (offscreen) by 11%
on Navi48.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
 2025-05-08 02:54:13 +00:00
Marek Olšák
b960137ebf aco: remove unused aco_shader_info::tcs_offchip_layout 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
 2025-05-08 02:54:13 +00:00
Marek Olšák
dfc3c1135c ac/nir/tess: don't pass nir_intrinsic_instr to hs_output_lds_offset 
It will be used without intrinsics.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
 2025-05-08 02:54:13 +00:00
Marek Olšák
4bbe497d9b ac/nir/tess: don't pass nir_intrinsic_instr to VMEM IO calc helpers 
These will be used without intrinsics.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
 2025-05-08 02:54:13 +00:00
Marek Olšák
360494f50d ac/nir/tess: remove unused variables 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
 2025-05-08 02:54:12 +00:00
Marek Olšák
f58c0cbb6a nir: split *_accessed_indirectly* bitmasks into *_read/written_indirectly* 
for AMD

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
 2025-05-08 02:54:12 +00:00
Eric Engestrom
2db1f908f9 radv/ci: rename .test-radv to .ci-tron-test-radv 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34795>
 2025-05-07 21:02:16 +00:00
Martin Roukala (né Peres)
26e35d538a ci: rename all the .b2c- jobs into .ci-tron- 
We named these jobs like this despite b2c being an implementation
detail because we did not have a name for this bare-metal infra.

Now that we do (CI-Tron), let's rename the jobs to remove the
confusion.

Co-authored-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34795>
 2025-05-07 21:02:16 +00:00
Eric Engestrom
240ac9f2b9 radv/ci: set swap size for all amd jobs to 16g 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34795>
 2025-05-07 21:02:16 +00:00
Eric Engestrom
7e32fdceba radv/ci: increase swap size on kabini to 16g 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34795>
 2025-05-07 21:02:16 +00:00
Martin Roukala (né Peres)
37ace710fa ci/ci-tron: switch to the upstream ci-tron template 
Up until now, every project using CI-Tron had to write their own job
submission flow because CI-Tron itself was not providing any official
way of interacting with it via GitLab.

This however changed, and the solution is vastly superior to what we
have been using in Mesa:

 * Ability to pass all the environment variables of the job to the DUT,
   so no need to remember to add variables in
   `export-gitlab-job-env-for-dut.sh` anymore

 * No dependency on Mesa code, which means no need to wait on
   python-artifacts and the ability to replicate a run by just copying
   the job description outputted by the job \o/

 * Ability to have as many initrd, HTTP, and TFTP artifacts as wanted

 * Ability to expose a variable through a TFTP/HTTP endpoint or as an
   initrd

 * Ability to overwrite the platform environment (machine-specific FW)

 * Ability to have as many kernel cmdline variables, all merged when
   generating the final cmdline. This makes it easy to share some
   snippets of cmdline between jobs

Transitioning from the custom to the generic template is however pretty
involved. This commit does the minimum changes needed to switch to the
new model, often simply replacing the B2C_ prefix with CI_TRON_.

Further renaming of "b2c" prefixes into "ci-tron" is left for future
commits.

Co-authored-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34795>
 2025-05-07 21:02:15 +00:00
Eric Engestrom
432b7d3276 radv/ci: fix inheritance/override order 
Fixes a bug that becomes visible in an upcoming commit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34795>
 2025-05-07 21:02:15 +00:00
Martin Roukala (né Peres)
62291b6e14 radv/ci: drop redundant renoir timeouts 
No idea why we ended up having timeouts set in gitlab-ci-inc.yml, but
this isn't right as they are only applicable to jobs.

The actual `radv-renoir-vkcts` job already overrides these, so it's just
dead code; let's reap it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34795>
 2025-05-07 21:02:15 +00:00
Martin Roukala (né Peres)
a27f739de3 radv/ci: move the vangogh timeouts to the jobs 
No idea why we ended up having timeouts set in gitlab-ci-inc.yml, but
this isn't right as they are only applicable to jobs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34795>
 2025-05-07 21:02:15 +00:00
Eric Engestrom
91881ba390 radv/ci: inline .vkcts-test-valve 
It was badly named, is not very useful, and the comment above was not
really correct and not useful here.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34795>
 2025-05-07 21:02:15 +00:00
Eric Engestrom
151062a169 amd/ci: simplify radeonsi-vangogh-glcts jobs definition 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34795>
 2025-05-07 21:02:15 +00:00
Eric Engestrom
c78a7d464b ci/ci-tron: deduplicate setting the runner tags for most jobs 
etnaviv is the important exception, as it needs to set two fields for
the setup tags, which need to be handled individually as runner tags.

The other exception is the nightly vangogh job that has a custom tag
added, which I'll hopefully get rid of Soon™.

One farm's jobs were also missing farm:$RUNNER_FARM_LOCATION; this
change ensures that it's always set, avoiding the risk of accidentally
picking an equivalent device in another farm.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34795>
 2025-05-07 21:02:15 +00:00
Eric Engestrom
4fb425c197 radv/ci: add recent flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34857>
 2025-05-07 10:20:20 +00:00
Konstantin Seurer
84b9c281fe radv: Return VK_ERROR_INCOMPATIBLE_DRIVER for unsupported devices
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VK_ERROR_INITIALIZATION_FAILED will fail physical device enumeration.
Returning VK_ERROR_INCOMPATIBLE_DRIVER means that the driver can still
be used on supported GPUs when multiple GPUs are installed.

cc: mesa-stable

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34783>
 2025-05-07 08:26:33 +02:00
Rhys Perry
9ca71b52aa aco: swap the correct v_mov_b32 if there are two of them 
Previously, this function tried to swap the instruction which is not
v_mov_b32, so that it doesn't introduce any new OPY-only instructions. If
both were v_mov_b32, it swapped Y. Since this makes Y opy-only, this can't
be done if X is also opy-only.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 408fa33c09 ("aco/gfx12: don't use second VALU for VOPD's OPX if there is a WaR")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13101
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34841>
 2025-05-06 21:04:28 +00:00
Samuel Pitoiset
1aa5fd5da2 radv: promote VK_EXT_robustness2 to VK_KHR_robustness2 
This is a 1:1 promotion.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34810>
 2025-05-05 15:02:19 +00:00
Samuel Pitoiset
0684dc5fa8 radv: fix GPU hangs with image copies for ASTC/ETC2 formats on transfer queue
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Emitting compute dispatches on SDMA just hangs. It might be needed
to switch to gang submit for these to work but fixing the GPU hang is
more important for now.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34805>
 2025-05-05 13:50:25 +00:00
Eric Engestrom
c145f7f2dc radeonsi/ci: document flakes seen recently 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34811>
 2025-05-05 12:23:02 +00:00
Eric Engestrom
a601d68898 radv/ci: document flakes seen recently 
The dEQP-VK.ray_tracing_pipeline.* ones might need a bigger net to catch
them all, but I didn't want to prematurely ignore too many tests, so for
now I'm just dumping a big list.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34811>
 2025-05-05 12:23:02 +00:00
Samuel Pitoiset
1356d20042 radv: disable SINGLE clear codes to workaround a hw bug with DCC on GFX11
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This fixes a very weird cache-related corruption with DCC on GFX11 due
to a hw bug according to PAL.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12932
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34790>
 2025-05-05 07:07:58 +00:00
Samuel Pitoiset
55ad0fd35c radv: do not clear unwritten color attachments with dual-source blending 
This is incorrect because the color format at slot 0 needs to be
replicated to the slot 1. But with dual-source blending the colors
written mask is only 0xf and this was clearing the color format at
slot 1.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13082
Fixes: e1483d022b ("radv: clear unwritten color attachments for monolithic PS earlier")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34773>
 2025-05-05 06:46:32 +00:00
Valentine Burley
4a614cfbfb amd/ci: Remove increased timeout for radeonsi-raven-vaapi-fluster job 
This is no longer necessary now that we are no longer downloading the
Fluster vectors at runtime.
This should have been removed in 9870512787 ("ci/lava: Use the new test-video-based rootfs for VA-API jobs").

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34787>
 2025-05-03 15:39:51 +02:00
Valentine Burley
46abb7bd2e ci/fluster: Move the fluster-runner.sh script 
The fluster-runner.sh was only runner srcipt in a folder, move it out of
the fluster folder.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34787>
 2025-05-03 15:38:32 +02:00
Valentine Burley
9cf5c01d0c amd/ci: Rename .radeonsi-raven-vaapi-fluster to .radeonsi-vaapi-fluster-rules 
It has nothing to do with Raven, it just happens that the first fluster
job was running on Raven.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34787>
 2025-05-03 15:38:32 +02:00
Valentine Burley
c90e1ba5cc ci/test: Move and rename .lava-fluster to .test-fluster 
It has nothing to do with LAVA, it just happens that the first fluster
job was running on LAVA.

Also drop the redundant :x86_64 definition.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34787>
 2025-05-03 15:38:32 +02:00