mesa/src/amd
Rhys Perry ddef4bddf8 ac/nir: round components when lowering 8/16-bit loads to 32-bit
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34162>
2025-05-08 13:30:50 +00:00
..
addrlib amd/addrlib: remove the DCC page fault workaround 2025-04-01 03:23:22 -04:00
ci radv/ci: rename .test-radv to .ci-tron-test-radv 2025-05-07 21:02:16 +00:00
common ac/nir: round components when lowering 8/16-bit loads to 32-bit 2025-05-08 13:30:50 +00:00
compiler aco/gfx12: allow 8/16-bit smem loads 2025-05-08 13:30:50 +00:00
drm-shim amd/drm-shim: add gfx1201 2025-03-10 11:21:36 +00:00
gmlib amd/gmlib: add gmlib for radeonsi 2025-02-27 03:15:16 +00:00
llvm ac/llvm: use mul24 intrinsics 2025-04-23 01:11:48 +00:00
registers amd: Rename GFX1103_R1/R2 to PHOENIX/2 2024-11-20 02:14:40 +00:00
vpelib amd/vpelib: More parameters to the segmentation process and introduce validation hook 2025-03-06 02:11:53 +00:00
vulkan radv/gfx12: use dword3 smem loads for push constants 2025-05-08 13:30:50 +00:00
meson.build amd/gmlib: add gmlib for radeonsi 2025-02-27 03:15:16 +00:00