fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-01-06 11:00:11 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1
181048 commits 64 branches 915 tags 1,005 MiB
Commit graph

181048 commits

This branch
This branch
All branches
Author SHA1 Message Date
Danylo Piliaiev
eb75be66e9 freedreno,tu: Add env vars to modify fd_dev_info 
We now have a lot of feature toggles in fd_dev_info. Generate
env var options for all of them to quickly test whether feature
misbehaves or test its impact on the performance.

FD_DEV_FEATURES=%feature_name%=%value%:%feature_name%=%value%:...
e.g.
FD_DEV_FEATURES=has_fs_tex_prefetch=0:max_sets=4

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25939>
 2023-11-21 01:33:01 +00:00
Danylo Piliaiev
17827ef24c freedreno,tu,ir3: Pass fd_dev_info into ir3_compiler_create 
We want to modify fd_dev_info with debug options, so we must
have a single source of fd_dev_info.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25939>
 2023-11-21 01:33:01 +00:00
Danylo Piliaiev
e6bfe42b6e freedreno/devices: Separate device definition into base + gen features 
After introduction of A7XX it doesn't make sense to define base GPU
properties in A6xxGPUInfo. Now we move to a more clean definition:
- a6xx_base + a6xx_genX - for A6XX
- a7xx_base + a7xx_xxx - for A7XX, there is no sub-gens clearly
                         identifiable at the moment.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25939>
 2023-11-21 01:33:01 +00:00
Timothy Arceri
4382bd8a34 nir: simplify nir_build_write_masked_store() 
Suggested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25860>
 2023-11-21 00:45:21 +00:00
Timothy Arceri
0470f8f737 glsl: remove now unused lower distance pass 
This has been replaced with a NIR based pass.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25860>
 2023-11-21 00:45:21 +00:00
Timothy Arceri
33c2b64aa3 glsl: switch to NIR distance lowering pass 
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25860>
 2023-11-21 00:45:21 +00:00
Timothy Arceri
110887de2b glsl/nir: implement a nir based lower distance pass 
This is based off the original GLSL IR pass but it is much much
simpler as it doesn't need to do all of the hackery required in
GLSL IR to achieve the lowering.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25860>
 2023-11-21 00:45:21 +00:00
Timothy Arceri
95da0a9c96 nir: move build_write_masked_stores() to nir builder 
We will reused this in the following patch.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25860>
 2023-11-21 00:45:21 +00:00
Francisco Jerez
6a810b0ba8 intel: Improve N-way pixel hashing computation to handle pixel pipes with asymmetric processing power. 
This reworks the intel_compute_pixel_hash_table_nway() pixel pipe
hashing table computation helper to handle cases where some pixel
pipes have processing power different from the others, this is helpful
for Gfx12.7+ platforms where there are pixel pipes with 1 DSS as well
as pixel pipes with 2 DSSes, which currently can lead to a serious
performance bottleneck in the pixel pipes with lower processing power.

In order to avoid such a load imbalance the
intel_compute_pixel_hash_table_nway() function will now take two pixel
pipe bitsets instead of one: Pixel pipes enabled on both bitsets will
appear with twice the frequency on the table as pixel pipes which only
appear on one bitset.  See the comments below for more details on the
algorithm used to construct a pixel hashing table with the desired
properties.

With this change rendering performance improves by about 25% on a
fused MTL platform -- The list of specific configs this is expected to
show an improvement on is not included here since the list is rather
long and some of the configs may still be embargoed or may never be
productized, but in order to find out whether your Gfx12.7+ device
could be affected by this you can check the output of the
intel_dev_info tool from the Mesa tree and see if there are multiple
"pixel pipe" entries with different DSS count.  That isn't expected to
occur on any DG2 configuration, only on MTL+ platforms, so this change
should have no effect at all on DG2 (it's easy to convince oneself
that it won't since for DG2 mask1 should equal mask2 so mask2 will be
set to zero at the beginning of intel_compute_pixel_hash_table_nway()
and the new swzx[] permutation will be set to the identity).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26266>
 2023-11-20 23:48:34 +00:00
Faith Ekstrand
9033df070e nak: Rework printing of texture and image dims 
They're now printed as part of the op for textures and we've changed the
names to follow the PTX convention.  For buffers and cube maps, I had to
come up with my own thing but I think the result is okay.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26291>
 2023-11-20 21:36:04 +00:00
Faith Ekstrand
3a20beab03 nak: Display memory type at the end for load/store ops 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26291>
 2023-11-20 21:36:04 +00:00
Faith Ekstrand
6f76f4db9f nak: Make MemAddrType a part of MemSpace 
This is similar to what we did with scopes and ordering.  Shared and
local memory can only have an A32 address type.  The only times we can
get A64 is for global or generic.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26291>
 2023-11-20 21:36:04 +00:00
Faith Ekstrand
6c861c3cc2 nak: Display memory access bits with the "." prefix 
This just moves the "." from the caller to the Display implementation on
the actual enum type.  This makes it easier to properly handle defaults.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26291>
 2023-11-20 21:36:03 +00:00
Faith Ekstrand
3d2104dd5d nak: Align instructions when printing 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26291>
 2023-11-20 21:36:03 +00:00
Faith Ekstrand
32d6720bb0 nak: Only write deps.delay when set 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26291>
 2023-11-20 21:36:03 +00:00
Faith Ekstrand
3f027f7dcc nak: Default InstrDeps::delay to 0 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26291>
 2023-11-20 21:36:03 +00:00
Faith Ekstrand
58c8391f97 nak: Implement DisplayOp on Op instead of Display 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26291>
 2023-11-20 21:36:03 +00:00
Faith Ekstrand
9d1afb7533 nak: Rework opcode printing to use a new trait 
The new trait has separate fmt functions for dsts and the rest of the
op.  There's a generic implementation of Display built on top of it
which just prints `{dsts} = {op}`.  The new trait also has a default
implementation of fmt_dsts() which just walks the dsts using
dsts_as_slice() and auto-formats them all.  This should be what we want
for 95% of cases and we can hand-implement the rest.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26291>
 2023-11-20 21:36:03 +00:00
Faith Ekstrand
503c4b1d5d nak: Make most Display stuff lower-case 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26291>
 2023-11-20 21:36:03 +00:00
Faith Ekstrand
2897b9dcee nak: Rework reg and SSA value printing 
This makes everything lower-case, unifies on better prefixes, and makes
us take less whitespace for SSA vectors.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26291>
 2023-11-20 21:36:03 +00:00
llyyr
2e3027e7d1 docs: document AMD_DEBUG=noefc and useaco 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25930>
 2023-11-20 20:43:33 +00:00
Chia-I Wu
16a270f646 radv: disable TC-compat htile on GFX9 in some cases 
Similar to commit a38de4c011 ("radv: disable tc_compatible_cmask on
GFX9 in some cases"), GFX9 seems to have issues with TC-compat htile as
well.

I've only seen this with D16 and sample count 4.  But I am not sure
about the exact condition.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10161
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26263>
 2023-11-20 20:09:44 +00:00
Eric Engestrom
d173584b6e ci/deqp-runner: turn paths in errors into links 
Suggested-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26177>
 2023-11-20 19:26:53 +00:00
Eric Engestrom
1ff4687e86 ci: uprev deqp-runner from 0.16.1 to 0.18.0 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26270>
 2023-11-20 18:37:18 +00:00
Eric Engestrom
5efa4d56e2 ci: fix kdl commit fetch 
Doing a `clone --depth 1` of the default branch then checking out
a commit that might not be the latest of that branch cannot work.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26270>
 2023-11-20 18:37:18 +00:00
José Roberto de Souza
205c5874d4 intel: Sync xe_drm.h 
Sync xe_drm.h with commit 3b8183b7efad ("drm/xe/uapi: Be more specific
about the vm_bind prefetch region").

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26238>
 2023-11-20 17:57:34 +00:00
Sil Vilerino
e4ffb2473b d3d12: Implement get_feedback with additional metadata 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:19:00 +00:00
Sil Vilerino
8c1ba75f68 d3d12: Support PIPE_VIDEO_CAP_ENC_H264_DISABLE_DBK_FILTER_MODES_SUPPORTED 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:19:00 +00:00
Sil Vilerino
c81967fa89 d3d12: Implement Intra Refresh for H264, HEVC, AV1 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:19:00 +00:00
Sil Vilerino
a560706648 d3d12: Implement HEVC VUI Writer 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:19:00 +00:00
Sil Vilerino
fdc8b7cdc4 d3d12: Implement H264 VUI Writer 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:19:00 +00:00
Sil Vilerino
cf8cbf0647 d3d12: Disable codecs according to meson video-codecs option 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:19:00 +00:00
Brian King ((MEDIA))
84c0448b36 d3d12: Add constraint_set1_flag support 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:19:00 +00:00
Sil Vilerino
d6bb4ddc63 d3d12: Video Encode - Remove PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE as not supported 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:19:00 +00:00
Sil Vilerino
151ebf8ec3 d3d12: Use log2_max_frame_num_minus4 and log2_max_pic_order_cnt_lsb_minus4 from pipe_pic_params_h264 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:19:00 +00:00
Sil Vilerino
34961b1118 d3d12: Plumb pipe_h264_enc_picture_desc.dbk.disable_deblocking_filter_idc 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:19:00 +00:00
Sil Vilerino
527def0171 gallium/vl: Check for VP9 and AV1 meson option support flags 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:19:00 +00:00
Sil Vilerino
7b22dd8bfd meson: add vp9 and av1 codec support options 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:19:00 +00:00
Sil Vilerino
870570ee66 frontend/va: Support VAEncMiscParameterMaxSliceSize 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:19:00 +00:00
Sil Vilerino
ec4021b3c2 frontend/va: Parse VUI HEVC parameters 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:19:00 +00:00
Sil Vilerino
4637f1db48 frontend/va: Parse VUI H264 parameters 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:18:59 +00:00
Sil Vilerino
bee4a3683c frontend/va: Add log2_max_frame_num_minus4 and log2_max_pic_order_cnt_lsb_minus4 for h264enc 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:18:59 +00:00
Sil Vilerino
9ce17de1fd pipe: Add max_slice_bytes for H264, HEVC encoding 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:18:59 +00:00
Sil Vilerino
6b4010b906 pipe: Add HEVC VUI encode params 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:18:59 +00:00
Sil Vilerino
0c312c5c59 pipe: Add H264 VUI encode params 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:18:59 +00:00
Sil Vilerino
10eb9296fe pipe: Add PIPE_VIDEO_CAP_ENC_INTRA_REFRESH_MAX_DURATION 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:18:59 +00:00
Sil Vilerino
44a3bfcc67 pipe: Add PIPE_VIDEO_CAP_ENC_H264_DISABLE_DBK_FILTER_MODES_SUPPORTED 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:18:59 +00:00
Sil Vilerino
be4287c3aa pipe: Extend get_feedback with additional metadata 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:18:59 +00:00
Sil Vilerino
e6d754f183 gallium/auxiliary: Fix pb_bufmgr_slab.c leak 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:18:59 +00:00
Sil Vilerino
695201fe94 vl/win32: Add vl_win32_screen_create_from_d3d12_device 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26223>
 2023-11-20 17:18:59 +00:00