This change:
1. add new helpers to handle dmabuf alloc/import/free
2. use FREE to match with alloc macro
3. simplify opaque fd code path
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38074>
There's already the type, and there's no concurrent usage of fd and
dmabuf fd, so just drop it. This fixes sparse resource to work with
dmabuf external memory for lavapipe. In addition, this makes sparse
resource from venus on lavapipe to work with dmabuf backing.
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38074>
This change:
1. Move size validation within sparse binding, but not escape to
non-sparse code path.
2. Error out if sparse is requested on unsupported platforms.
Fixes: d747c4a874 ("lavapipe: Implement sparse buffers and images")
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38074>
Not the most optimal solution but 64-bit vertex attributes are rarely
used. Could still revisit if we find a real use case that matters.
This fixes recent VKCTS coverage:
dEQP-VK.pipeline.fast_linked_library.vertex_input.component_mismatch.r64g64b64.*_to_dvec2
dEQP-VK.pipeline.shader_object_.*.vertex_input.component_mismatch.r64g64b64.*_to_dvec2
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14243
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38237>
Most of the infrastructure was already in place for 8 bit (we just
had to add the AFBC mode to use). We also needed to add support for
the 10 bit format (X6R10X6G10_X6R10X6B10_UNORM). Note that this
10 bit format is only supported for AFBC, for linear we have to fall
back to the old multi-plane way of handling it.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35771>
When importing an image, check that the specific combination of
format plus modifier is supported, rather than just checking the
format. This will allow drivers to support some YUV formats in
special cases (specific modifiers, like AFBC for panfrost) while
also allowing us to fall back to generic multi-plane formats when
those modifier+format combinations are not supported by
hardware.
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35771>
Including the 10 bit variant X6R10X6G10_X6R10X6B10_UNORM. Only the
RG_RB variants seem to have fourccs, so those are the only ones being
added for now, although they would, obviously, be easy to add).
These are used for Y210, Y212, and Y216 fourccs. In particular Y210
is interesting for panfrost, as it is the fourcc used to indicate a
10 bit single plane 4:2:2 encoded as AFBC (similar to how YUYV is
the canonical AFBC for 10 bit 4:2:0).
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35771>
We had assumed AFBC superblocks were always tiled in an 8x8 pattern,
but this is true only for 32bpp and lower formats; for larger formats
the pattern is 4x4. This isn't an issue yet, but will be when we
support R16G16B16A16 in AFBC.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35771>
This is required because otherwise dri2_get_modifier_num_planes will be
confused: dri2_get_mapping_by_fourcc gives the emulated 2 plane YUYV,
but panfrost itself supports a hardware single plane YUYV. This is
arguably a problem with dri2, but other drivers have implemented
dri2_get_modifier_num_planes so we may as well. It also gives us a
hook for supporting more exotic planar configurations, should that
be necessary in the future.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35771>
panvk_meta_get_unorm_format_for_blk_size() requires a block size of 4
or less, but we didn't actually check for that before calling it. Fix
that, and also rename the function because what we actually care about
isn't whether it is a unorm format, but a blendable format.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35771>
pps initializes perf counter multiple times, once from
GpuDataSource::register_data_source and once from
GpuDataSource::OnSetup. This is fine, except we should replace
failing assert with skip on second call.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38224>
nir_parallel_copy_instr can be emulated using an intrinsic for each
entry and an array of arrays that is used by the pass to remember which
copies belong together.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36483>
The shaders in question use:
(memory_load + (gl_SubgroupSize - 1)) & ~(gl_SubgroupSize - 1)
My guess is that this is supposed to be the subgroup size of whatever
produced the value, not the subgroup size in this shader.
And because in the consumer the workgroup size is 32, we use wave32.
Fixes: a2d3cbac2a ("radv: determine subgroup/wave size early")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14187
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38214>
Align with gallium side. When fixed-function blending is not available,
the internal blend shader is used. This is handled by a single ST_TILE
in the blend shader with the current sample ID, which requires sample
shading enablement.
Cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38129>
We have the invariant that zero-initializing is legal but it's not
obvious in the source code, so add a sentinel value for it to make code
that uses it crystal clear.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38189>
Some implementations can emit tracepoints when copying u_trace
buffers. It's important to reserve the slots we want to copy into
before emitting the copies so that both processes don't clash with one
another.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38199>
If renderpass has D/S attachment, but pipeline has D/S as UNDEFINED,
D/S should be properly disabled for the pipeline. The easiest way is to
ensure that D/S state is valid when pipeline's D/S format is UNDEFINED.
So we always create VkPipelineDepthStencilStateCreateInfo.
CC: mesa-stable
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37550>
Note that currently autostrip is disabled globally with
Wa_14021490052 for some gfx versions and steppings.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37975>
Note that currently autostrip is disabled globally with
Wa_14021490052 for some gfx versions and steppings.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37975>
These registers need to be whitelisted by kernel so that we can use
it to disable autostrip at will. This is about Wa_14024997852.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37975>
This prevents mesa from segfaulting if GLX is working on some screens, but not all screens.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: stefan11111 <stefan11111@shitposting.expert>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38201>
The handling in dedup_srcs was incorrect because it would apply the
modifier from srcs[i] to the LUT without removing the modifier from the
instruction. We can fix and simplify this code by removing all modifiers
before the dedup_srcs() call, which we were doing immediately after the
call anyway.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13966
Fixes: 66c9c40f68 ("nak: Handle modifiers in dedup_srcs() in opt_lop()")
Reviewed-by: Seán de Búrca <sdeburca@fastmail.net>
Reviewed-by: Lorenzo Rossi <git@rossilorenzo.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38220>
Coverity notices that in this case part of the decision to go down the
locked path invovles reading a flag, which is turn set inside the
protected code. Additional threads can decide they need to go down the
locked path, and then wait on the lock, even though the first thread
willse the device_registered to true, which would have otherwise
prevented them from going down the locked path.
What Coverity doesn't know, is that it is a violation of the Vulkan API
contract to call this function from two different threads, so in
practice that cann't happen. We'll move the setting of the
image_device_registered out of the locked area to see if that pacifies
Coverity, and if not then we'll just ignore it.
CID: 1662067
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37582>
