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Author SHA1 Message Date
Mike Blumenkrantz
e5d6ce6e5e zink: collapse a conditional in zink_batch_resource_usage_set() 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12008>
 2021-07-26 19:48:07 -04:00
Mike Blumenkrantz
13d732ec5b zink: add some resource util functions for batch usage 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12008>
 2021-07-26 19:48:07 -04:00
Mike Blumenkrantz
0a2b03376d zink: force batch completion check on query result 
non-timeline drivers have no screen-based method of "checking" batch
completion, so the context method has to be used here to avoid an infinite
loop

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12008>
 2021-07-26 19:48:07 -04:00
Mike Blumenkrantz
5bab4cc546 zink: add screen function for checking usage completion 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12008>
 2021-07-26 19:48:07 -04:00
Rob Clark
53c39f710f freedreno/a6xx: Add missing PC_CCU_INVALIDATE_x 
The kernel normally inserts these between submits, but when we merge
submits in userspace we need to add them ourselves.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5114
Fixes: cccdc513e3 ("freedreno/drm/sp: Implement deferred submit merging")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12049>
 2021-07-26 21:11:35 +00:00
Mike Blumenkrantz
1dc7b9b08b zink: use array size in spirv bo length calculations 
I don't know why I was dropping this, but doing so breaks drivers that have
optimization passes based on the lengths of these variables

Fixes: c1cdf30a11 ("zink: apply Delete All The Code methodology to the ubo/ssbo variables")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12070>
 2021-07-26 20:59:07 +00:00
Roman Stratiienko
ed98e54f19 kmsro: Add 'kirin' driver support 
Kirin is used by hisilicon SOCs (Hikey boards, etc.)
Driver is available in the mainline kernel [1]

[1]: https://elixir.bootlin.com/linux/v5.13/source/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c#L928

Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11755>
 2021-07-26 20:39:17 +00:00
Dave Airlie
5bf6ec31cc crocus/gen4: restrict memcpy mapping to gen5 
This is due to gen4 + 4.5 having some rather strange swizzling
that we can't actually detect properly in userspace

Fixes: f3630548f1 ("crocus: initial gallium driver for Intel gfx 4-7")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12058>
 2021-07-26 20:28:37 +00:00
Thong Thai
856e2b7529 frontends/va: change to per-layer rate control 
Allows for each layer in a Scalable Video Coding (SVC) video to have its
own rate control setting, when encoding H.264.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11850>
 2021-07-26 15:06:22 -04:00
Thong Thai
c2695823fd frontends/omx: change rate ctrl struct to array 
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11850>
 2021-07-26 15:06:17 -04:00
Thong Thai
687bbe2270 radeon/vcn/enc: change to per-temporal layer rate control 
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11850>
 2021-07-26 15:06:13 -04:00
Thong Thai
65ad80f1d8 radeon/vce: change rate ctrl struct to array 
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11850>
 2021-07-26 15:06:09 -04:00
Thong Thai
21da3be7a2 r600: change rate ctrl struct to array 
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11850>
 2021-07-26 15:06:05 -04:00
Thong Thai
1e0d512595 gallium: change rate ctrl struct to array 
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11850>
 2021-07-26 15:06:00 -04:00
Thong Thai
ec53e519c3 frontends/va: handle h264 num_temporal_layers for SVC encoding 
Allows for the number of temporal layers to be specified when encoding
Scalable Video Coding (SVC) H.264 videos.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11850>
 2021-07-26 15:05:56 -04:00
Thong Thai
8236320a0b radeonsi: enable H.264 temporal encoding support for VCN 
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11850>
 2021-07-26 15:05:48 -04:00
Thong Thai
51935d594e radeon/vcn/enc: H.264 SVC encode 
Implement H.264 temporal, Scalable Video Coding (SVC) for VCN devices by
sending the required parameters to the firmware, and creating H.264 NALU
prefix and SEI scalability_info headers.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11850>
 2021-07-26 15:05:43 -04:00
Thong Thai
41f4b69354 gallium: update h264 struct to track temporal layers 
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11850>
 2021-07-26 15:05:39 -04:00
Thong Thai
96c581e897 frontends/va: check number of temporal layers supported by encoder 
Checks the encoder to determine the number of temporal layers supported,
and returns max_num_temporal_layers_minus1, along with setting the
corresponding control flag if multiple layers are supported.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11850>
 2021-07-26 15:05:33 -04:00
Thong Thai
a23beb9c43 gallium: add temporal layers cap enum 
Determine the number of temporal layers the encoder supports. Used for
encoding Scalable Video Coding (SVC) videos.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11850>
 2021-07-26 15:05:26 -04:00
Danylo Piliaiev
b45cddda18 tu: handle half-reg fs outputs 
This would allow to enable translation of RelaxedPrecision spirv
variable decorator into mediump which for us means fp16.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12067>
 2021-07-26 16:25:14 +00:00
Karol Herbst
1387d1d411 nv30: fix emulated vertex index buffers 
We ended up applying the offset twice. Quite embarrassing.

This fixes a bunch of vertex shader related issues like the gnome desktop
is less broken and probably a lot of other applications.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5061
Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12054>
 2021-07-26 15:39:25 +00:00
Samuel Pitoiset
0497588eac radv: allow unused VkSpecializationMapEntries 
Fixes future CTS: dEQP-VK.pipeline.spec_constant.*.basic.*unused_*

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12062>
 2021-07-26 14:09:09 +02:00
Daniel Schürmann
bc500da67d nir/shrink_vectors: shrink vecN properly 
This patch allows to shrink vecN instructions where
one or more components at any position are unused.

Stat changes for softpipe:
total instructions in shared programs: 2986101 -> 2985416 (-0.02%)
instructions in affected programs: 51216 -> 50531 (-1.34%)

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11411>
 2021-07-26 09:24:37 +00:00
Daniel Schürmann
36fe7398c0 nir/shrink_vectors: shrink ALU properly 
ALU instructions of which not all components are read,
can be shrunk to the number of read components.
Previously, this would only remove trailing components.

This patch enables to remove components from any position.

Stat changes for softpipe:
total instructions in shared programs: 3001291 -> 2984698 (-0.55%)
instructions in affected programs: 225585 -> 208992 (-7.36%)
total loops in shared programs: 1389 -> 1358 (-2.23%)
loops in affected programs: 36 -> 5 (-86.11%)

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11411>
 2021-07-26 09:24:37 +00:00
Daniel Schürmann
8317fe314c nir/opt_shrink_vectors: reverse iteration order 
This pass should be backwards in order to reach the fixed point
in linear time.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11411>
 2021-07-26 09:24:37 +00:00
Daniel Schürmann
d27417b597 nir: consider write_mask in nir_ssa_def_components_read() 
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11411>
 2021-07-26 09:24:37 +00:00
Daniel Schürmann
73905c4d01 nir/opt_shrink_vectors: don't shrink vectors used by intrinsics 
Store intrinsics shrink the sources by creating a new vecN.
Other intrinsics cannot shrink their sources.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11411>
 2021-07-26 09:24:37 +00:00
Daniel Schürmann
ece99eb69f nir/lower_alu_to_scalar: don't skip gaps in write_mask 
Otherwise, this may lead to segmentation faults.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11411>
 2021-07-26 09:24:37 +00:00
Juan A. Suarez Romero
4eb0475b5a v3dv: assert job->cmd_buffer is valid 
In v3dv_write_uniforms_wg_offsets() function, the job's cmd_buffer is a
valid command buffer, so there is no reason to check if its NULL or not.

This fixes CID#1487441 ("Dereference after null check") error.

v1:
 - `job->cmd_buffer` is the same as `cmd_buffer` (Alejandro)

v2:
 - Use `cmd_buffer` instead of `job->cmd_buffer` (Iago)

Fixes: 31a786c80a ("v3dv: handle QUNIFORM_FB_LAYERS")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11999>
 2021-07-26 07:28:37 +00:00
Lionel Landwerlin
8a99873712 isl: fix mapping of format->stringname 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ed6e586562 ("intel: properly constify isl_format_layouts")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5110
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12051>
 2021-07-26 07:16:28 +00:00
Shmerl
8aa6002943 vulkan/overlay: don't display histogram and range for device and format 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4320
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12056>
 2021-07-25 21:29:31 +00:00
Dave Airlie
2138d1b9e6 teximage: return correct desktop GL error for compressedteximage 
For GL4.6 the spec says to return GL_INVALID_OPERATION for this.

Cc: mesa-stable
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12032>
 2021-07-26 05:59:18 +10:00
Alyssa Rosenzweig
9cc0834ca6 asahi: Generalize src_offset for non-4byte formats 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 18:00:39 -04:00
Alyssa Rosenzweig
a3e0b3b912 asahi: Add integers to agx_vertex_formats 
Handles all the easy cases.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 18:00:07 -04:00
Alyssa Rosenzweig
3cd6f62388 agx: Shift vertex buffer stride in the compiler 
Required to support non-32-bit vertex formats efficiently.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 17:57:19 -04:00
Alyssa Rosenzweig
c7ba0fb04d agx: Add agx_format_shift routine 
Required to calculate alignments for vertex buffers correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 17:45:38 -04:00
Alyssa Rosenzweig
b329fe8264 asahi: Pass instance_divisor to the compiler 
Passes dEQP-GLES3.functional.instanced.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 17:26:02 -04:00
Alyssa Rosenzweig
96c98e0d25 agx: Define p_extract for type converts 
Useful for grabbing the high 32-bit word of a 64-bit value.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 17:25:40 -04:00
Alyssa Rosenzweig
3417ecb4d7 agx: Implement instanced arrays 
Divide by instance divisor if needed. Same strategy as ACO.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 17:25:11 -04:00
Alyssa Rosenzweig
538e3a3100 agx: Include divisors in the vertex shader key 
Needed to lower the divisions.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 17:24:47 -04:00
Alyssa Rosenzweig
0c353d47be agx: Add udiv-by-constant routine 
Uses the ridiculousfish algorithm, will be used to lower instanced
arrays into something efficient.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 17:24:02 -04:00
Alyssa Rosenzweig
50a4c993fd agx: Add agx_ushr helper 
Syntax sugar for the underlying bitfield manipulation instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 17:23:42 -04:00
Alyssa Rosenzweig
3c1f754a71 agx: Handle load_instance_id 
Preloaded into r6, as predicted.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 15:12:18 -04:00
Alyssa Rosenzweig
3f5eebe5e6 agx: Drop dated /* TODO: RA */ 
We skip over vertex ID in RA now, it's fine.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 15:12:03 -04:00
Alyssa Rosenzweig
1b1dd2e522 asahi: Enable instancing 
Passes dEQP-GLES3.functional.draw.draw_arrays_instanced.lines.single_attribute

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 15:04:25 -04:00
Alyssa Rosenzweig
465224379c agx: Plug memory leak in register allocator 
Fixes: 85e18deb18 ("agx: Assign registers locally")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reported-by: Coverity
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 15:00:22 -04:00
Alyssa Rosenzweig
7848100f27 agx: Use consistent ncomps 
Fixes register allocation failure in:
dEQP-GLES3.functional.ubo.single_basic_array.shared.row_major_mat4_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 14:55:16 -04:00
Alyssa Rosenzweig
cce1a2fc19 agx: Dump register file when failing to allocate 
Usually shows a bug.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 14:54:34 -04:00
Alyssa Rosenzweig
5fb9159eb9 agx: Fix mismatched units in load_ubo 
Fixes assertion failure in
dEQP-GLES3.functional.ubo.single_basic_type.shared.highp_float_fragment

   Assertion failed: ((value & 1) == 0), function agx_print_sized, file
   ../src/asahi/compiler/agx_print.c, line 39.

Fixes: 033d4d09fc ("agx: Implement load_ubo/kernel_input")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
 2021-07-24 14:39:44 -04:00