This used to not matter, but since we started emitting shader-temps
properly, this causes issues where we end up with samplers and images as
shader-temps. That causes asserts while emitting them.
So let's remove the unused vars as well.
This fixes a piglit regression that somehow went unnoticed on CI.
Fixes: 85964945e7 ("zink: emit vars with nir_var_shader_temp mode")
Tested-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20227>
i965 used these, but Gallium drivers do this lowering via a separate
nir_lower_tex call from st/mesa. Vulkan drivers don't use these at all.
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20223>
None of the drivers have used this since we dropped i965, and BLORP
no longer uses it as of the previous commit. We can also drop the
former compressed_multisample_tex_mask (now padding) field so that
things remain 64-bit aligned.
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20223>
The compiler looks at this key field to determine whether to perform
an MCS fetch for a txf_ms or samples_identical texture message, if a
nir_tex_src_ms_mcs_intel source wasn't provided. If it isn't set,
it instead uses constant 0 (nothing is compressed).
All of the drivers (iris, crocus, anv, hasvk) unconditionally set this
to ~0 because we don't want to pay for costly shader recompiles (which
can cause nasty stuttering). Most textures are compressed anyway, and
the hardware ignores the l2dms MCS parameter if MCS is disabled.
The only user was BLORP, which sets the key field based on whether the
texture's aux usage has MCS. But if it has MCS, it also does the MCS
fetch itself and supplies it directly. Otherwise, it relies on the
compiler to fill in the 0 value. But it could easily just provide the
0 value itself in that case and not rely on the compiler at all.
With that fixed, we can just drop the key fields entirely. We leave
them as padding for now to avoid repacking structures; we won't need
to after the next commits anyway.
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20223>
On the host we emit this as separate ops anyway, so avoid
wired optimizations in the guest that might introduce
difficult to optimize dependencies.
v2: update trace expectations - some minor accuracy changes
are to be expected when fma is handled differently
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20182>
READONLY is illegal on calls. Others were unused.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>
D3D10 established that rasterization should be discarded when a null PS was
bound, and depth/stencil state was disabled, and llvmpipe followed those
semantics. Nowadays all APIs have explicit rasterization discard flag,
and so does Gallium, so it's better for llvmpipe to faithfully follow
that flag, and trust the state tracker to follow the right semantics.
Second guessing pipe_rasterizer_state::rasterizer_discard actually
causes problems, specially when no depth-stencil surface is bound, as
D3D10 mandates rasterization should still happen, yet among all the
translation layers it often happens depth-stencil enablement is
optimized away when no depth-stencil is bound, which in turn was causing
llvmpipe to disable rasterization when it shouldn't.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20155>
nir_opt_if doesn't catch all the possible cases of empty then branches,
so resolve this on the fly when creating the backend IR.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20141>
If we access non-existing images Cayman hardware may lock up
and trigger a reset that is not always successful. Therefore,
make sure the images access is legal.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20141>
Don't add extra movs to construct the swizzles, but just split the
instruction into separate channels, if possible. Idea by Filip Gawin.
shader-db for RV370:
total instructions in shared programs: 84632 -> 83565 (-1.26%)
instructions in affected programs: 12613 -> 11546 (-8.46%)
helped: 295
HURT: 8
total temps in shared programs: 12437 -> 12237 (-1.61%)
temps in affected programs: 1807 -> 1607 (-11.07%)
helped: 153
HURT: 20
LOST: 1
GAINED: 19
The HURT instructions and the single lost shaders are some fluctuations
from pair scheduling. The number of instructions before pair scheduling
is always lower or equivalent.
Partial fix for: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6339
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20009>
For any instruction that can be reasonably converted to alpha we check
all of its readers to see if the conversion is possible (including check
for at least one free alpha source) at the beginning of pair scheduling.
However, if the reader instruction has multiples sources that could be
converted to alpha and multiple indeed are, than we could run of of the
alpha sources eventually. So recheck just before converting that there
are still some unused sources left.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20009>
