Commit graph

2778 commits

Author SHA1 Message Date
Qiang Yu
588a65f29a ac: do not lower some ops in nir_lower_packing
AMD does not implement nir_op_pack_32_4x8_split, others
are implemented, so don't lower them.

Fixes: 0f937426cc ("radeonsi: lower subgroup ops after wave size is known")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11781
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30885>
2024-08-30 05:46:51 +00:00
Yinjie Yao
7f1c0fbe61 radeonsi/vcn: Rename transform_skip_disabled and remove hardcoded value for VCN5
This fix the HEVC encode corruption caused by mismatch between PPS
header and IB setting, the fix only apply for VCN5.
Rename from transform_skip_dicarded to transform_skip_disabled.

Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30930>
2024-08-30 01:17:22 +00:00
Samuel Pitoiset
2fda0db66f ac,radeonsi,radv: add common GFX preambles
RADV and RadeonSI have a few differences.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30789>
2024-08-27 14:14:57 +00:00
Samuel Pitoiset
80e8e18cc6 ac: add ac_gfx103_get_cu_mask_ps()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30789>
2024-08-27 14:14:57 +00:00
Benjamin Cheng
95a980b61f radv/video: add event support for VCN4
This was the main missing piece for passing vulkan video CTS
as the video firmwares couldn't do proper vulkan events.

With new enough firmware this is now possible.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30837>
2024-08-26 22:19:09 +00:00
Qiang Yu
58e412014a ac,radv,radeonsi: stop using quad vote any/all when llvm
ClustedAnd with bool argument and cluster_size==4 will be lowered
to quad_vote_all. So does ALU nir_iand/ior op with bool src.

OpenGL and Vulkan subgroup clustered_and tests with bool argument
fail when using LLVM. It seems LLVM has bug when quad vote bool
is in complex control flow. So stop using it for now.

Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30610>
2024-08-26 10:46:15 +08:00
David Rosca
6e2ae9c581 radeonsi/vcn: Use pipe header params in H264 header encoder
This now supports writing all fields as we get them on input from
packed headers.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
2024-08-23 10:00:02 +02:00
David Rosca
af849516f0 radeonsi/vcn: Use pipe header params in HEVC header encoder
This now supports writing all fields as we get them on input from
packed headers.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
2024-08-23 10:00:02 +02:00
David Rosca
32c6a61e2b radeonsi/vcn: Switch to app DPB management for H264 and HEVC encode
This removes the internal DPB management logic, which was unnecessary as
it was duplicating what applications already do, and it was also causing
issues when the internal DPB would de-sync from application DPB (eg.
driver removes reference that application still intends to use).

DPB is now dynamically resized instead of using fixed number of slots.
This also saves a lot of memory with HEVC encoding, as that was always
using the max_references which va frontend sets to 15.

Move reconstructed pictures to the end of the context and meta buffers
to ensure resizing works correctly.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30672>
2024-08-23 09:59:58 +02:00
Marek Olšák
665eae51ef amd: update addrlib
There are some changes in ac_surface.c to make this work.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30507>
2024-08-16 21:44:32 +00:00
Marek Olšák
07554d32db ac/nir: adjust gfx11 tuning for the compute blit
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30208>
2024-08-10 02:14:44 +00:00
Marek Olšák
db7823e8b9 ac/nir: adjust performance-related decisions for clear/copy_buffer shader
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30208>
2024-08-10 02:14:44 +00:00
Marek Olšák
361266fec7 ac/nir: import the clear/copy_buffer compute shader from radeonsi
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30208>
2024-08-10 02:14:44 +00:00
Timur Kristóf
f317311bad ac/nir: Shorten the name of ac_nir_calc_io_offset_mapped.
The other variant of this function doesn't
exist anymore, so there is no ambiguity.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29812>
2024-08-08 16:55:02 +00:00
Timur Kristóf
c9b5ef0e53 ac/nir/tess: Simplify calculation of HS output LDS offset.
No functional change, just make the code more readable.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29812>
2024-08-08 16:55:02 +00:00
Timur Kristóf
d43466e917 ac/nir: Remove ac_nir_calc_io_offset function.
This function is not used anymore, because none of the callers
rely on driver locations (intrinsic base) anymore.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29812>
2024-08-08 16:55:02 +00:00
Timur Kristóf
7c009172e3 ac/nir/esgs: Map linked ES/GS I/O based on GS input mask.
With this change, ES/GS	linking	will not rely on driver	locations
anymore (driver locations are considered deprecated in NIR).

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29812>
2024-08-08 16:55:02 +00:00
Timur Kristóf
d758bea8dd ac/nir/tess: Map linked LS/HS I/O based on TCS input mask.
With this change, LS/HS linking will not rely on driver locations
anymore (driver locations are considered deprecated in NIR).

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29812>
2024-08-08 16:55:02 +00:00
Timur Kristóf
b162c7962f ac/nir: Add helper for I/O location mapping.
Map I/O locations based on a prefix sum (for linked shaders),
or based on the provided callback.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29812>
2024-08-08 16:55:02 +00:00
Timur Kristóf
ed6499db6b ac/nir/esgs: Don't emit ES outputs that aren't read by GS.
This is	necessary to prevent a regression from a future	commit,
in order to allow us to	map output locations differently.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29812>
2024-08-08 16:55:02 +00:00
Timur Kristóf
6d83389a39 ac/nir/esgs: Add gs_inputs_read to ES output lowering.
This commit just adds the field, it will be taken into use
in a following commit.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29812>
2024-08-08 16:55:02 +00:00
Timur Kristóf
9aa5c38e8d ac/nir/tess: Don't emit VS outputs that aren't read by TCS.
This is necessary to prevent a regression from a future commit,
in order to allow us to map output locations differently.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29812>
2024-08-08 16:55:02 +00:00
Timur Kristóf
b5f53fdf32 ac/nir/tess: Add tcs_inputs_read to LS output lowering.
This commit just adds the field, it will be taken into use
in a following commit.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29812>
2024-08-08 16:55:02 +00:00
Alyssa Rosenzweig
daa97bb41a amd: switch to derivative intrinsics
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30565>
2024-08-08 15:26:07 +00:00
Marek Olšák
97d664b22f ac/surface/gfx12: turn off HiZ for pre-production samples
Fixes: f703dfd1bb - radeonsi: add gfx12

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30525>
2024-08-07 20:35:18 +00:00
Zan Dobersek
7fd5f76393 nir/lower_vars_to_scratch: calculate threshold-limited variable size separately
ir3's lowering of variables to scratch memory has to treat 8-bit values as
16-bit ones when comparing such value's size against the given threshold
since those values are handled through 16-bit half-registers. But those
values can still use natural 8-bit size and alignment for storing inside
scratch memory.

nir_lower_vars_to_scratch now accepts two size-and-alignment functions,
one used for calculating the variable size and the other for calculating
the size and alignment needed for storing inside scratch memory. Non-ir3
uses of this pass can just duplicate the currently-used function. ir3
provides a separate variable-size function that special-cases 8-bit types.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29875>
2024-08-07 14:32:28 +00:00
Marek Olšák
de83b5ef77 ac/surface/gfx12: fix setting tile_swizzle
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30503>
2024-08-05 19:35:39 +00:00
yinjiyao
50ff1e4f86 radeonsi/vcn: add HDR sei in hevc enc
Enable HDR sei in hevc encoder.

Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30388>
2024-07-29 21:48:04 +00:00
David Rosca
8b1a889e45 radeonsi/vcn: Add support for QVBR rate control mode
This rate control mode needs pre-encode enabled and currently is
supported for VCN3 and VCN4.
AV1 needs quality level scaled down from 255 to 51 range.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4024
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30221>
2024-07-24 20:18:49 +00:00
Ruijing Dong
8a5ef9413b radeonsi/vcn: add HDR metadata obu in av1enc
Enable HDR metadata obu in av1 encoder for
both vcn4/5.

Reviewed-by: David Rosca <david.rosca@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30237>
2024-07-23 17:16:21 +00:00
Ruijing Dong
aa86c3a235 radeonsi/vcn: input av1 hdr metadata
get av1 hdr metadata from frontends.

Reviewed-by: David Rosca <david.rosca@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30237>
2024-07-23 17:16:21 +00:00
Marek Olšák
d90080b51b nir/opt_vectorize_io: optionally don't vectorize IO with different types
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11443

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
2024-07-23 16:13:17 +00:00
Marek Olšák
07ef1a8124 ac,radeonsi: set 16-bit flags in io_options optimally
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
2024-07-23 16:13:17 +00:00
Marek Olšák
709ebd8293 amd: expose nir_io_mix_convergent_flat_with_interpolated
The drivers need to invert how they gather flat inputs.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
2024-07-23 16:13:17 +00:00
Marek Olšák
b2d32ae246 nir: add nir_intrinsic_load_per_primitive_input, split from io_semantics flag
Instead of having 1 bit in nir_io_semantics indicating a per-primitive
FS input, add a dedicated intrinsic for it.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
2024-07-23 16:13:16 +00:00
Ganesh Belgur Ramachandra
ec4e5ef0f7 amd/common: skip lane size determination for chips without image opcodes (e.g. gfx940)
This fixes VAAPI decode performance issues.

Fixes: 5b3e1a0532 ("radeonsi: change the compute blit to clear/blit multiple pixels per lane")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30273>
2024-07-23 14:50:37 +00:00
Pierre-Eric Pelloux-Prayer
0c868aa94a amd: use a valid size for ac_pm4_state allocation
If max_dw is smaller than the pm4 array the allocation size would be
smaller than sizeof(ac_pm4_state).

Fixes: 428601095c ("ac,radeonsi import PM4 state from RadeonSI")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30257>
2024-07-22 10:09:34 +00:00
Daniel Stone
ccc6442d6f u_format: Rewrite format table to use YAML
u_format has always had its format table in CSV. This is kind of nice
for some things, but is a serious pain to extend, especially with
optional fields.

In going through our many (many, many) duplicated tables of format
mappings, it would've been nice to add some descriptions to our central
u_format table, such as mapping to DRM FourCC, to EGLImage mappings, and
to GL internalformats for EGLImage imports. Unfortunately, doing so with
more additional fields would just make the CSV totally unreadable.

Move the CSV table to a YAML-based table and adjust the Python parsers
to suit. The resulting generated files are identical before and after
the transition.

The new parser also has a significant amount of format validation to
make it easier to catch common errors.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29649>
2024-07-19 13:50:42 +00:00
David Rosca
8fa9e78e39 radeonsi/vcn: Support 10bit RGB for EFC input
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30101>
2024-07-18 13:11:13 +00:00
Samuel Pitoiset
e2882ea3e2 ac/rgp: assume GFX11_5 use the same SQTT/RGP versions as GFX11
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30225>
2024-07-17 16:25:19 +00:00
Alex Deucher
dec4603a21 ac/surface: fix version check for gfx12 DCC
It's 58, not 59.  The original 58 feature was not
ready so it was dropped.

Fixes: 0bb83a4060 ("ac/surface: finish display DCC for gfx12")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30212>
2024-07-16 16:33:32 +00:00
Marek Olšák
a5b4ae67ae ac: add radeon_info::has_scratch_base_registers
Fixes: 3b0bfd254f - radeonsi/gfx11: make flat_scratch changes for compute

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30071>
2024-07-15 13:52:25 -04:00
Marek Olšák
0bb83a4060 ac/surface: finish display DCC for gfx12
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30114>
2024-07-13 02:17:37 +00:00
Marek Olšák
46071c90c7 ac/surface: finish display DCC for gfx11.5
Fixes: 6835257246 - amd/common: update DCC for gfx11.5

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30114>
2024-07-13 02:17:37 +00:00
Marek Olšák
11272a8d82 ac/nir: remove sleeps from gfx12 streamout code
This is faster.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
2024-07-13 01:32:48 +00:00
Marek Olšák
1b2cd628b8 nir: rename ordered_xfb_counter_add_gfx12_amd -> ordered_add_loop_gfx12_amd
because it can also be used by compute.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
2024-07-13 01:32:48 +00:00
Marek Olšák
1fd43bca2c radeonsi: don't use CP DMA on GFX940
It's been defeatured.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30115>
2024-07-13 00:58:30 +00:00
David Rosca
6cc32c609b radeonsi/vcn: Add low latency encode support
This feature should be enabled for use cases when the lowest encoding
latency is desired, such as real-time game streaming.
Disabled by default due to increased power usage.

There is no libva interface currently that could be used for this, so
for now it can only be enabled by setting AMD_DEBUG=lowlatencyenc
environment variable.

See: https://gitlab.freedesktop.org/drm/amd/-/issues/3336

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30039>
2024-07-11 18:33:41 +00:00
Samuel Pitoiset
cc3cb526c4 ac,radeonsi: add ac_is_reduction_mode_supported()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30074>
2024-07-10 07:57:42 +00:00
Pierre-Eric Pelloux-Prayer
e7b200f20b ac/info: remove has_syncobj
syncobj support is now required so these features are always available.
This is the same as 02fe3c32cd, without the radeonsi parts
to not break radeonsi on radeon.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29876>
2024-07-09 15:07:27 +02:00