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ac,radv,radeonsi: stop using quad vote any/all when llvm

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ClustedAnd with bool argument and cluster_size==4 will be lowered
to quad_vote_all. So does ALU nir_iand/ior op with bool src.

OpenGL and Vulkan subgroup clustered_and tests with bool argument
fail when using LLVM. It seems LLVM has bug when quad vote bool
is in complex control flow. So stop using it for now.

Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30610>
This commit is contained in:
Qiang Yu 2024-08-12 15:19:11 +08:00
parent a37933b721
commit 58e412014a
3 changed files with 6 additions and 5 deletions
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2
src/amd/common/ac_shader_util.c
View file

@ -91,7 +91,7 @@ void ac_set_nir_options(struct radeon_info *info, bool use_llvm,
options->lower_int64_options = nir_lower_imul64 | nir_lower_imul_high64 | nir_lower_imul_2x32_64 | nir_lower_divmod64 |
nir_lower_minmax64 | nir_lower_iabs64 | nir_lower_iadd_sat64 | nir_lower_conv64;
options->divergence_analysis_options = nir_divergence_view_index_uniform;
options->optimize_quad_vote_to_reduce = true;
options->optimize_quad_vote_to_reduce = !use_llvm;
options->lower_fisnormal = true;
options->support_16bit_alu = info->gfx_level >= GFX8;
options->vectorize_vec2_16bit = info->has_packed_math_16bit;

7
src/amd/vulkan/radv_shader.c
View file

@ -532,8 +532,9 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_shader_st
bool gfx7minus = pdev->info.gfx_level <= GFX7;
bool has_inverse_ballot = true;
bool use_llvm = radv_use_llvm_for_stage(pdev, nir->info.stage);
#if AMD_LLVM_AVAILABLE
has_inverse_ballot = !radv_use_llvm_for_stage(pdev, nir->info.stage) || LLVM_VERSION_MAJOR >= 17;
has_inverse_ballot = !use_llvm || LLVM_VERSION_MAJOR >= 17;
#endif
NIR_PASS(_, nir, nir_lower_subgroups,
@ -544,7 +545,7 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_shader_st
.lower_to_scalar = 1,
.lower_subgroup_masks = 1,
.lower_relative_shuffle = 1,
.lower_rotate_to_shuffle = radv_use_llvm_for_stage(pdev, nir->info.stage),
.lower_rotate_to_shuffle = use_llvm,
.lower_shuffle_to_32bit = 1,
.lower_vote_eq = 1,
.lower_vote_bool_eq = 1,
@ -553,7 +554,7 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_shader_st
.lower_shuffle_to_swizzle_amd = 1,
.lower_ballot_bit_count_to_mbcnt_amd = 1,
.lower_inverse_ballot = !has_inverse_ballot,
.lower_boolean_reduce = 1,
.lower_boolean_reduce = !use_llvm,
.lower_boolean_shuffle = true,
});

2
src/gallium/drivers/radeonsi/si_shader.c
View file

@ -2502,7 +2502,7 @@ struct nir_shader *si_get_nir_shader(struct si_shader *shader,
.lower_shuffle_to_swizzle_amd = true,
.lower_ballot_bit_count_to_mbcnt_amd = true,
.lower_inverse_ballot = !sel->info.base.use_aco_amd && LLVM_VERSION_MAJOR < 17,
.lower_boolean_reduce = true,
.lower_boolean_reduce = sel->info.base.use_aco_amd,
.lower_boolean_shuffle = true,
});