Commit graph

164239 commits

Author SHA1 Message Date
Lionel Landwerlin
e2dc32d755 anv: move functions around to plan for generated draws
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
971e07361a genxml: add gen12/12.5 CS prefetch disable bits
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
4a3faab512 anv: move draw command helpers to their own file
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
624ac55721 anv: move total_batch_size to anv_batch
We'll want 2 batches :

   * the main one

   * another to contain dispatch commands to generate stuff in the
     main batch

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
8d21e29be3 anv: add helper to get current address of a batch
And allow the function to get the very first address in the batch.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
c9272e80b1 anv: add a utility function to ensure command buffer space
Ensuring the space is contiguous.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
21e32e1f8d anv: document utrace field
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Jason Ekstrand
c70ef757e6 anv: Use extended parameters on Gen11+
Gen11 added a nifty feature where we have three custom system-generated
values called extended parameters that we can set to any 32-bit values
we want.  These work just like vertex and instance ID and are controlled
in the pipeline by the 3DSTATE_SGVS_2 packet.  They are provided to the
draw call either by extra DWORDs on the end of 3DSTATE_PRIMITIVE or by
storing values to more state registers.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Jason Ekstrand
2680e32f71 intel/blorp: Emit a dummy 3DSTATE_VF_SGVS_2
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Jason Ekstrand
9859413bf4 intel/genxml: Add 3DPRIMITIVE_EXTENDED opcodes on Gen11+
On Gen11 and above, the 3DPRIMITIVE command takes an optional additional
three DWORDs of data as "extended parameters".  These extended
parameters only exist in the packet if "Extended Parameters Present" is
set.  Because our packing code doesn't handle variable-length commands
well, this commit adds a second version of the command which isn't real
but is just a copy of 3DPRIMITIVE with the additional dwords where the
"Extended Parameters Present" defaults to true and "DWord Length" is
adjusted by 3 as needed.  The 3DPRIMITIVE command is then the gen4-9
version which still works fine but doesn't have the new parameters.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Jason Ekstrand
781a16382d intel/genxml: Make some fields Booleans
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
75d20a18f5 anv/utrace: only record the emitted pipecontrol flags
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
5fd0d27280 intel/ds: trace a couple of more pipe control flags
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Marek Olšák
eea416d0c9 cso: fix a regression from draw_vbo rework
Fixes: c9b13a9338 - cso: remove cso_draw_vbo from all draws, call the driver or u_vbuf directly

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20288>
2022-12-13 18:41:26 +00:00
Aleksey Komarov
d51fc12af9 panfrost: fix sampler_count and unbind samplers in bind_sampler_states
1. Old approach did not support unbind (set to NULL) samplers because
it only copied memory if sampler is not empty. New approach checks
if sampler is empty - it will set NULL.

2. Old approach just set sampler_count to 0 if sampler is empty.
That's wrong and we need to find highest non-null samplers[] entry.
It was done in new approach.

3. Gallium dosc says:
```
NOTE: at this time, start is always zero ...
This may change in the future.
```
It's better to take into consideration start parameter in new approach.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20285>
2022-12-13 18:28:21 +00:00
Lionel Landwerlin
a921486e2a anv: disable Wa_1806565034 when robustImageAccess is enabled
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5711
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7859
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20280>
2022-12-13 18:05:19 +00:00
Lionel Landwerlin
94bb4a13fa intel/fs: make Wa_1806565034 conditional to non robust access
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20280>
2022-12-13 18:05:19 +00:00
Lionel Landwerlin
89a550a37b isl: make Wa_1806565034 conditional to non robust access
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20280>
2022-12-13 18:05:19 +00:00
Sathishkumar S
6a3179c5a9 frontends/va: fix crash during grayscale rendering
crash is observed as format is assumed to be yuv and buffer plane
order is undefined for monochrome. luma only format is not to be
considered yuv format. It has to be rendered with rgb=rrr.

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20165>
2022-12-13 15:37:18 +00:00
Sathishkumar S
7ad4a5079e radeonsi/vcn: fix regression in yuv422 jpeg decode
- yuv422 decode was blocked in 12acee17fa, enable it back.
- nv12 yuv422 and grayscale decode is supported on all versions.
- JPEG2 and higher versions supports 444p decode.
- add l8_unorm to supported formats, can be used for grayscale.

Fixes: 12acee17fa (frontends/va: reallocate surface for yuv400/yuv444 picture)

v2: indent the switch case correctly (Thong Thai)

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20165>
2022-12-13 15:37:18 +00:00
Samuel Pitoiset
b4f940913d radv: do not remove the PointSize built-in for polygon mode as points
Determine if it can be removed when generating the graphics pipeline
key because of dynamic states.

Fixes new CTS dEQP-VK.rasterization.polygon_as_large_points.* and also
spec@!opengl 1.1@polygon-offset with Zink/RADV.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20073>
2022-12-13 15:01:31 +00:00
Marcin Ślusarz
75375233f6 intel/compiler/mesh: extract emit_urb_direct_vec4_write
No functional changes.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20292>
2022-12-13 13:00:49 +00:00
Marcin Ślusarz
3a60112ce5 intel/compiler: optimize away local_inv_index and local_inv_id if workgroup size is 1
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20292>
2022-12-13 13:00:49 +00:00
Marcin Ślusarz
85b1c89e20 intel/compiler: split lower_cs_intrinsics_convert_block
No functional changes.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20292>
2022-12-13 13:00:48 +00:00
Marcin Ślusarz
bb93f1bda1 intel/compiler/mesh: extract shared code for offset adjustment
No functional changes.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20292>
2022-12-13 13:00:48 +00:00
Marcin Ślusarz
5ffdd47a26 anv: simplify EXT_mesh_shader lowering
No functional changes.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20292>
2022-12-13 13:00:48 +00:00
Marcin Ślusarz
7fbd1dfb18 anv,intel/compiler/mesh: drop lowering of gl_Primitive*IndicesEXT
Until U888X index format lands this change shouldn't have any impact on performance.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20292>
2022-12-13 13:00:48 +00:00
车扬
f6929e7c3b intel: fix the wrong function name
pipe not create_vertex_elements fuction

Signed-off-by: cheyang <cheyang@bytedance.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20291>
2022-12-13 11:43:17 +00:00
Lionel Landwerlin
a0991c7c79 anv: fixup descriptor copies
I did not properly understood that we cannot access the views written
to the descriptor sets because they might have been destroyed after
the write operation and the copy operation is allowed to copy what is
invalid data. The shader just can't access it.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 03e1e19246 ("anv: Refactor descriptor copy")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20222>
2022-12-13 09:13:05 +00:00
Gert Wollny
79cb465526 r600: Lower all bitfield ops on pre-EG
Fixes:  4dff3ff005
    nir/opt_algebraic: Optimize open coded bfm.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20283>
2022-12-13 09:04:53 +00:00
Gert Wollny
357e5fac99 r600/sfn: Use variable length DOT on Evergreen and Cayman
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20283>
2022-12-13 09:04:53 +00:00
Gert Wollny
573448f93c r600/sfn: prepare alu split for use of variable length dot
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20283>
2022-12-13 09:04:53 +00:00
Gert Wollny
edabd5cd84 r600/sfn: check used channels when evaluating allowed mask
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7878

v2: Fix ws in comment (iorn10)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20283>
2022-12-13 09:04:53 +00:00
Martin Roukala (né Peres)
8c30cf4443 ci/test-vk: uprev vkd3d
This commit uprevs vkd3d, which flags
test_primitive_restart_list_topology_stream_output as being a flake on
RADV / NAVI21.

Suggested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20278>
2022-12-13 06:48:10 +00:00
Qiang Yu
d2ac1b18df ac/nir: add ac_nir_lower_legacy_gs
For legacy (non-NGG) GS to lower outputs to memory stores and add
shader query when required.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20158>
2022-12-13 11:43:53 +08:00
Qiang Yu
0e52a4faf0 ac/nir: move ngg_gs_shader_query to a common function
To be shared by NGG GS and legacy GS. Legacy GS need this when
GFX10 which mix use NGG and legacy GS. For example when streamout
is enabled, it uses legacy GS, otherwise uses NGG GS. So legacy
GS also need to update query emulation which is a sum of NGG and
legacy GS results.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20158>
2022-12-13 11:43:49 +08:00
Qiang Yu
9a6416b374 nir,ac/llvm,radv: add stream id index to nir_load_ring_gsvs_amd
For used by legacy GS to store output to different ring according
to stream id.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20158>
2022-12-13 11:43:45 +08:00
Qiang Yu
0ea589ec69 ac/llvm,radv,radeonsi: pass instruction to intrinsic_load abi
For simple intrinsic which also need other fields to translate
to LLVM like stream_id.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20158>
2022-12-13 11:43:40 +08:00
Qiang Yu
796a150196 nir: add nir_load_ring_gs2vs_offset_amd
Used by legacy GS output lowering.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20158>
2022-12-13 11:42:33 +08:00
Qiang Yu
603e68ba36 ac/nir,radeonsi: replace llvm ngg gs invocation query with nir
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20156>
2022-12-13 01:26:42 +00:00
Qiang Yu
fd240f759f nir,radv,radeonsi: add nir_atomic_add_gs_invocation_count_amd
For shader query emulation.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20156>
2022-12-13 01:26:42 +00:00
Emma Anholt
17c18a492a freedreno/registers: Add some docs for PM4 events.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19733>
2022-12-12 23:29:53 +00:00
Emma Anholt
378f83917c doc/freedreno: Add a bunch of docs of the hardware and drivers.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19733>
2022-12-12 23:29:53 +00:00
Emma Anholt
e284e6ad3c freedreno: Clarify that CACHE_FLUSH is pre-5xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19733>
2022-12-12 23:29:53 +00:00
Emma Anholt
5d37f6b16c ci/docs: Always expose the built docs.
When testing my docs changes outside of an MR, there was no way to look at
the result.

Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19733>
2022-12-12 23:29:53 +00:00
Peng Huang
7642f3b99c intel: Fix crashes for importing drm buffer
image_aspect_to_binding() converts aspect to index by subrracting
VK_IMAGE_ASPECT_MEMORY_PLANE_0_BIT_EXT, however these enum values
are bitfields, not consecutive numbers, so comparing and subtracting
them won't work.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20269>
2022-12-12 23:02:38 +00:00
Iván Briano
68b546ec3d hasvk: pipelineStageCreationFeedbackCount is allowed to be 0
Fixes: 6601e5d6fc ("anv: implement VK_EXT_pipeline_creation_feedback")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20216>
2022-12-12 22:32:42 +00:00
Jan Palus
8560ce28c2 vdpau: allow building vdpau st with virgl only
Fixes: 6b5aecb195 ("virgl: add support for hardware video acceleration")

Signed-off-by: Jan Palus <jpalus@fastmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20108>
2022-12-12 22:01:27 +00:00
Timothy Arceri
9e9b8dc7f8 glsl: fix function inlining for images
Here we skip replacing parameters with their actual values for
images as glsl_to_nir() expects them to be copied to temps first.
Tree grafting has a similiar rule to avoid this happening also.

Fixes: 8d10a6835f ("glsl: dont create temps for builtin function inputs")

Tested-by: Martin Roukala <martin.roukala@mupuf.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20274>
2022-12-12 21:28:44 +00:00
Bas Nieuwenhuizen
92959061a9 radv: Improved export conflict bug workaround.
Based on f129db911b ("radeonsi/gfx11: use a better workaround for the export conflict bug")
which claims better performance.

I couldn't be bothered to do the refactor to check the sample count with
dynamic sample counts, so this is just conservative there.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20273>
2022-12-12 19:59:13 +00:00