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Author SHA1 Message Date
Samuel Pitoiset
e1f8cfc2b2 radv: rename NGG query state to be more generic 
To use emulated GS counters for legacy GS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>
 2023-07-27 09:13:11 +02:00
Christian Gmeiner
86a5e942dd freedreno/regs: python does not need ';' 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24330>
 2023-07-27 04:53:19 +00:00
Christian Gmeiner
d305b4a1c8 freedreno/regs: remove dead code 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24330>
 2023-07-27 04:53:19 +00:00
Christian Gmeiner
03bd9b9a58 freedreno/regs: remove not used variable 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24330>
 2023-07-27 04:53:19 +00:00
Christian Gmeiner
c2d8f3c561 freedreno/regs: remove double assignment of self.current_domain 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24330>
 2023-07-27 04:53:19 +00:00
Erik Faye-Lund
9709ae4cc6 meson: report with_glvnd in summary 
GLVND *really* kinda belongs in *both* GLX and EGL, but it feels silly
to repeat the same setting. So let's just report it under the GL
section, as that's generic enough to apply to both of other sections.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24317>
 2023-07-27 00:46:29 +00:00
Lionel Landwerlin
365b14489d anv: wire image sparse loads 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23882>
 2023-07-27 02:03:02 +03:00
Lionel Landwerlin
fe81d40bff intel/nir: add lower for sparse images & textures 
We have to lower images into image load + sampler residency.

There is also a restriction on sampler access with a compare, lower
those as 2 sampler instructions to meet the restriction.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23882>
 2023-07-27 02:02:59 +03:00
Lionel Landwerlin
300cc829de intel/nir: handle image_sparse_load in storage format lowering 
The last component of sparse load is the residency data. We don't want
to touch/convert that value with the format lowering.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23882>
 2023-07-27 02:02:34 +03:00
Lionel Landwerlin
d33aff783d intel/fs: add support for sparse accesses 
Purely from the backend point of view it's just an additional
parameter to sampler messages.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23882>
 2023-07-27 02:02:30 +03:00
Dmitry Baryshkov
ba5f0c203c gallium: unbreak kmsro/freedreno case 
In case the case of kmsro and freedreno driver, freedreno will fail to
with the xmlconfig errors as the kmsro declaration doesn't have defaults
for the freedreno options. Instead of directly using v3d_driconf for
kmsro, add native kmsro_driconf, which optionally includes v3d and
freedreno options.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24218>
 2023-07-26 21:57:13 +00:00
Dmitry Baryshkov
a5b445782e gallium: move kmsro definition to the bottom of the file 
The kmsro (in theory) can be using any other driver. In order to
simplify handling of driver public headers, move kmsro definition to the
bottom of the drm_helper.h

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24218>
 2023-07-26 21:57:13 +00:00
David Heidelberg
2cf55d94b6 ci/kernel: add amd patch to prevent crashes when starting X 
See: https://gitlab.freedesktop.org/drm/amd/-/issues/2669

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9402

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24338>
 2023-07-26 21:12:37 +00:00
Faith Ekstrand
29c4417fb8 nir: Add a backend_flags field to nir_tex_instr 
In 9ffd00bcf1 ("nir_to_tgsi: Pack our tex coords into vec4
nir_tex_src_backend[12]"), Emma added a pair of back-end sources to
nir_tex_instr to allow complex lowering to be done in NIR.  This adds a
tiny bit more hw-specific back-end information that a NIR lowering pass
can communicate to the back-end compiler.

While the opcode contains most of the information needed, some thing
such as the presence of offsets is currently only communicated via the
presence of specific source types in the source list.  This information
is gone when the texture instruction is lowered to back-end sources.
Adding a backend_flags field fixes this by allowing the lowering pass to
communicate a small amount of side-band information if needed.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22303>
 2023-07-26 20:12:49 +00:00
Gert Wollny
3954d545ca r600: don't use sb disasm to disassamble copy shader 
We will remove sb at one point, so drop its use.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:43 +00:00
Gert Wollny
02384de494 r600: don't check possible size of ALU CF 
The scheduler and sfn assembler already o this.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:43 +00:00
Gert Wollny
c3e5b8da58 r600: Assert when backend wants to create a new ALU CF 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:43 +00:00
Gert Wollny
9d4104d4fb r600: Explicitly force new CF in gs copy shader 
With that we can assert on ALU CF mission in the assembler

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:43 +00:00
Gert Wollny
104cac4dbd r600/sfn: Schedule AR uses befor possible groups 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:43 +00:00
Gert Wollny
9bf68273ad r600/sfn: rework checks for ALU CF emission 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:43 +00:00
Gert Wollny
6aafa2bb49 r600/sfn: Splizt ALU blocks in scheduler to fit into 128 slots 
With that the backend doesn't split these ALU CFs any more.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:43 +00:00
Gert Wollny
440cf7439d r600/sfn: on Cayman loading an index register needs only one slot 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:43 +00:00
Gert Wollny
4b4770e820 r600/sfn: make remaining slots a signed value 
Needed to check the limits.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:43 +00:00
Gert Wollny
b4ddc9b0c7 r600/sfn: Add flags to check whether a group starts CF and can do that 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:43 +00:00
Gert Wollny
acf21d7462 r600/sfn: Add method to convert to AluGroup directly 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:42 +00:00
Gert Wollny
bd7a9b7f4e r600/sfn: override slot count for IfInstr 
We have one slot for the predicate (todo fix this value)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:42 +00:00
Gert Wollny
c517defbdd r600/sfn: Fix typo with block type 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:42 +00:00
Gert Wollny
e60ff83834 r600/sfn: set block sizes based on chip class 
Be conservative with the ALU slots and the VTX slots.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:42 +00:00
Gert Wollny
55f692c451 r600/sfn: Always check arrays writes before allowing copy propagation 
Also propaate extra dependencies when an indirect load is propagated

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:42 +00:00
Gert Wollny
1d4dd664e0 r600/sfn: Fix use of multiple IDX with kcache 
Currently we don't properly support using he two IDX registers in the
same ALU CF, so work around this by enforcing a new CF if both indices
are used.

Fixes: d21054b4bc
    r600/sfn: Add pass to split addess and index register loads

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24297>
 2023-07-26 19:33:42 +00:00
David Heidelberg
d99b830c2b Revert "ci/farms: always compare the code against main repository" 
Unsustainable solution for the fork due to need keep main repository
up-date there.

This reverts commit 7b29ae557a.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24337>
 2023-07-26 20:59:57 +03:00
Connor Abbott
37a92d0af1 tu: Disable transformFeedbackPreservesProvokingVertex 
Our implementation only preserves the provoking vertex if it is last,
and always preserving it would be more draw-time validation because the
vertex ordering is tied up with the tessellation domain origin. It turns
out we didn't notice this because the tests aren't good enough to catch
the issue.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24304>
 2023-07-26 17:09:36 +00:00
Connor Abbott
6383f9c131 ir3: Handle GS stream "mixing" with non-point output primitives 
This fixes some new Vulkan CTS tests that do this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24304>
 2023-07-26 17:09:36 +00:00
Rhys Perry
37fbfa655a aco: insert s_nop before VGPR deallocation 
A hazard requires this, apparently.

https://reviews.llvm.org/D155681

fossil-db (gfx1100):
Totals from 23175 (17.36% of 133461) affected shaders:
Instrs: 41240100 -> 41263275 (+0.06%)
CodeSize: 211858524 -> 211951224 (+0.04%)
Latency: 469738570 -> 469738576 (+0.00%)
InvThroughput: 58013998 -> 58013999 (+0.00%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24320>
 2023-07-26 13:58:22 +00:00
David Heidelberg
7b29ae557a ci/farms: always compare the code against main repository 
`rules:changes:compare_to` resolved firstly pushed branch pipelines,
which always evaluated `rules:changes` as true which breaks the workflow

Since we now explicitely say, that we compare against `main` repository,
GitLab can evaluate against real changes.

Fixes: 79f7882fc6 ("ci: add quirk for GitLab assuming changes is always true for scheduled runs")

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24305>
 2023-07-26 15:01:17 +03:00
Lionel Landwerlin
50c29e1ffa anv: simplify buffer address+size loads from descriptor buffer 
Only found a couple titles that have been helped by this :

 PERCENTAGE DELTAS Shaders   Instrs    Cycles
 cyberpunk_2077    10388     -0.00%    -0.00%
 -----------------------------------------------
 All affected      1         -2.24%    -0.39%
 -----------------------------------------------
 Total             10388     -0.00%    -0.00%

 PERCENTAGE DELTAS    Shaders   Instrs    Cycles
 red_dead_redemption2 5949      -0.10%    -0.00%
 --------------------------------------------------
 All affected         111       -0.74%    -0.14%
 --------------------------------------------------
 Total                5949      -0.10%    -0.00%

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23318>
 2023-07-26 09:41:23 +00:00
Lionel Landwerlin
f1f58c3bea isl: add ability to store buffer size in unused RENDER_SURFACE_STATE fields 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23318>
 2023-07-26 09:41:23 +00:00
Lionel Landwerlin
d099e47de0 intel/fs: add more UNDEFs around SEND messages 
lower_find_live_channel() in particular is used a lot in control flow
to find the live channel for the surface/sampler handle. Adding UNDEFs
on the temporary registers used for finding the live channels helps
reduce the liveness of those temporary registers, especially in loops.

Some titles affected :

Rise Of The Tomb Raider:
Totals from 2780 (22.58% of 12311) affected shaders:
Instrs: 1294455 -> 1294592 (+0.01%); split: -0.15%, +0.16%
Cycles: 1473136441 -> 1471302617 (-0.12%); split: -1.52%, +1.40%
Max live registers: 144282 -> 143595 (-0.48%)
Max dispatch width: 22200 -> 22232 (+0.14%)

Red Dead Redemption 2:
Totals from 435 (7.28% of 5972) affected shaders:
Instrs: 488472 -> 487594 (-0.18%); split: -0.31%, +0.14%
Cycles: 11354732 -> 11384928 (+0.27%); split: -0.44%, +0.71%
Spill count: 1217 -> 1172 (-3.70%)
Fill count: 3521 -> 3447 (-2.10%)
Scratch Memory Size: 64512 -> 62464 (-3.17%)
Max live registers: 35997 -> 35798 (-0.55%)

Fallout 4:
Totals from 8 (0.49% of 1638) affected shaders:
Instrs: 41908 -> 40509 (-3.34%)
Cycles: 3638464 -> 3555680 (-2.28%); split: -2.67%, +0.39%
Spill count: 717 -> 665 (-7.25%)
Fill count: 2542 -> 2438 (-4.09%)
Scratch Memory Size: 32768 -> 16384 (-50.00%)
Max live registers: 567 -> 534 (-5.82%)

Cyberpunk 2077:
Totals from 2984 (28.97% of 10301) affected shaders:
Instrs: 3888874 -> 3891600 (+0.07%); split: -0.20%, +0.27%
Cycles: 67906489 -> 67767721 (-0.20%); split: -0.68%, +0.47%
Spill count: 200 -> 98 (-51.00%)
Fill count: 237 -> 90 (-62.03%)
Scratch Memory Size: 10240 -> 8192 (-20.00%)
Max live registers: 215715 -> 212727 (-1.39%)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24282>
 2023-07-26 08:48:33 +00:00
Lionel Landwerlin
5c72724819 intel/fs: consider UNDEF as non-partial write 
A few titles show max live register reductions, but nothing
significant in instruction count or other stats.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24282>
 2023-07-26 08:48:32 +00:00
Samuel Pitoiset
08bfcc12d4 radv: rename radv_pipeline_stage to radv_shader_stage 
It's more generic and it will fit shader object just well.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24313>
 2023-07-26 07:44:49 +00:00
Samuel Pitoiset
090d88247d radv: cleanup pipeline compute emit helpers 
Merge both functions together and rename the function.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24313>
 2023-07-26 07:44:49 +00:00
Samuel Pitoiset
fdec88bd7c radv: rework determining the NGG stage without a graphics pipeline 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24313>
 2023-07-26 07:44:49 +00:00
Samuel Pitoiset
174816019f radv: simplify lowering NGG GS intrinsics 
The is_ngg field is already set correctly for GS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24313>
 2023-07-26 07:44:49 +00:00
Samuel Pitoiset
70dbe011bb radv: rename graphics pipeline linking helpers 
There is no pipeline dependency.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24313>
 2023-07-26 07:44:49 +00:00
Samuel Pitoiset
697d4d4b03 radv: move removing all varyings when the FS is a noop 
This allows us to remove one more pipeline dependency.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24313>
 2023-07-26 07:44:49 +00:00
Samuel Pitoiset
5da9f38c53 radv: stop passing radv_graphics_pipeline to radv_fill_shader_info() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24313>
 2023-07-26 07:44:49 +00:00
Samuel Pitoiset
a7fdcc3b22 radv: rework considering force VRS without relying on graphics pipeline 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24313>
 2023-07-26 07:44:49 +00:00
Samuel Pitoiset
9d89b29a80 radv: set next_stage to MESA_SHADER_NONE if there is no FS 
This follows the same convention as shader object where the last stage
would have nextStage to 0. This will allow more refactoring.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24313>
 2023-07-26 07:44:49 +00:00
Samuel Pitoiset
b250efa714 radv: initialize stage/next_stage earlier 
This will allow more refactoring.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24313>
 2023-07-26 07:44:49 +00:00
Lionel Landwerlin
d62e494b37 intel/vec4: fix log_data pointer 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3384f029be ("intel/compiler: rework input parameters")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9421
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24307>
 2023-07-26 06:36:18 +00:00