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radv: initialize stage/next_stage earlier
This will allow more refactoring. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24313>
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parent
d62e494b37
commit
b250efa714
5 changed files with 20 additions and 20 deletions
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@ -150,9 +150,9 @@ radv_compile_cs(struct radv_device *device, struct vk_pipeline_cache *cache, str
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nir_shader_gather_info(cs_stage->nir, nir_shader_get_entrypoint(cs_stage->nir));
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/* Run the shader info pass. */
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radv_nir_shader_info_init(&cs_stage->info);
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radv_nir_shader_info_pass(device, cs_stage->nir, MESA_SHADER_NONE, pipeline_layout, pipeline_key,
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RADV_PIPELINE_COMPUTE, false, &cs_stage->info);
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radv_nir_shader_info_init(cs_stage->stage, MESA_SHADER_NONE, &cs_stage->info);
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radv_nir_shader_info_pass(device, cs_stage->nir, pipeline_layout, pipeline_key, RADV_PIPELINE_COMPUTE, false,
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&cs_stage->info);
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radv_declare_shader_args(device, pipeline_key, &cs_stage->info, MESA_SHADER_COMPUTE, MESA_SHADER_NONE,
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&cs_stage->args);
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@ -2116,9 +2116,7 @@ radv_fill_shader_info(struct radv_device *device, struct radv_graphics_pipeline
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radv_foreach_stage(i, active_nir_stages)
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{
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gl_shader_stage next_stage = radv_get_next_stage(i, active_nir_stages);
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radv_nir_shader_info_pass(device, stages[i].nir, next_stage, pipeline_layout, pipeline_key, pipeline->base.type,
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radv_nir_shader_info_pass(device, stages[i].nir, pipeline_layout, pipeline_key, pipeline->base.type,
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i == pipeline->last_vgt_api_stage && consider_force_vrs, &stages[i].info);
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}
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@ -2192,9 +2190,9 @@ radv_create_gs_copy_shader(struct radv_device *device, struct vk_pipeline_cache
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.stage = MESA_SHADER_VERTEX,
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.shader_sha1 = {0},
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};
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radv_nir_shader_info_init(&gs_copy_stage.info);
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radv_nir_shader_info_pass(device, nir, MESA_SHADER_FRAGMENT, pipeline_layout, pipeline_key, RADV_PIPELINE_GRAPHICS,
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false, &gs_copy_stage.info);
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radv_nir_shader_info_init(gs_copy_stage.stage, MESA_SHADER_FRAGMENT, &gs_copy_stage.info);
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radv_nir_shader_info_pass(device, nir, pipeline_layout, pipeline_key, RADV_PIPELINE_GRAPHICS, false,
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&gs_copy_stage.info);
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gs_copy_stage.info.wave_size = 64; /* Wave32 not supported. */
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gs_copy_stage.info.workgroup_size = 64; /* HW VS: separate waves, no workgroups */
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gs_copy_stage.info.so = gs_info->so;
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@ -2603,7 +2601,9 @@ radv_graphics_pipeline_compile(struct radv_graphics_pipeline *pipeline, const Vk
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radv_foreach_stage(i, active_nir_stages)
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{
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radv_nir_shader_info_init(&stages[i].info);
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gl_shader_stage next_stage = radv_get_next_stage(i, active_nir_stages);
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radv_nir_shader_info_init(i, next_stage, &stages[i].info);
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}
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/* Determine if shaders uses NGG before linking because it's needed for some NIR pass. */
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@ -352,9 +352,9 @@ radv_rt_nir_to_asm(struct radv_device *device, struct vk_pipeline_cache *cache,
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/* Gather shader info. */
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nir_shader_gather_info(stage->nir, nir_shader_get_entrypoint(stage->nir));
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radv_nir_shader_info_init(&stage->info);
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radv_nir_shader_info_pass(device, stage->nir, MESA_SHADER_NONE, pipeline_layout, pipeline_key,
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RADV_PIPELINE_RAY_TRACING, false, &stage->info);
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radv_nir_shader_info_init(stage->stage, MESA_SHADER_NONE, &stage->info);
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radv_nir_shader_info_pass(device, stage->nir, pipeline_layout, pipeline_key, RADV_PIPELINE_RAY_TRACING, false,
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&stage->info);
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/* Declare shader arguments. */
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radv_declare_shader_args(device, pipeline_key, &stage->info, stage->stage, MESA_SHADER_NONE, &stage->args);
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@ -3028,12 +3028,12 @@ void llvm_compile_shader(const struct radv_nir_compiler_options *options, const
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/* radv_shader_info.h */
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struct radv_shader_info;
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void radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *nir, gl_shader_stage next_stage,
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void radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *nir,
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const struct radv_pipeline_layout *layout, const struct radv_pipeline_key *pipeline_key,
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const enum radv_pipeline_type pipeline_type, bool consider_force_vrs,
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struct radv_shader_info *info);
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void radv_nir_shader_info_init(struct radv_shader_info *info);
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void radv_nir_shader_info_init(gl_shader_stage stage, gl_shader_stage next_stage, struct radv_shader_info *info);
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void radv_nir_shader_info_link(struct radv_device *device, const struct radv_pipeline_key *pipeline_key,
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struct radv_pipeline_stage *stages);
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@ -847,23 +847,23 @@ radv_get_user_data_0(const struct radv_device *device, struct radv_shader_info *
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}
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void
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radv_nir_shader_info_init(struct radv_shader_info *info)
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radv_nir_shader_info_init(gl_shader_stage stage, gl_shader_stage next_stage, struct radv_shader_info *info)
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{
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memset(info, 0, sizeof(*info));
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/* Assume that shaders can inline all push constants by default. */
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info->can_inline_all_push_constants = true;
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info->stage = stage;
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info->next_stage = next_stage;
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}
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void
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radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *nir, gl_shader_stage next_stage,
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radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *nir,
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const struct radv_pipeline_layout *layout, const struct radv_pipeline_key *pipeline_key,
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const enum radv_pipeline_type pipeline_type, bool consider_force_vrs,
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struct radv_shader_info *info)
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{
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info->stage = nir->info.stage;
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info->next_stage = next_stage;
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struct nir_function *func = (struct nir_function *)exec_list_get_head_const(&nir->functions);
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if (layout && layout->dynamic_offset_count &&
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