Commit graph

213989 commits

Author SHA1 Message Date
Rob Clark
df9986bcf2 gallium: Make upload_cb0 return a releasebuf
pipe_upload_constant_buffer0() was immediately releasing the
u_upload_alloc() releasebuf.  But it is used in various call-
paths where the release needs to be deferred further.

Fixes crashes in firefox for any driver that uses the same
u_upload_mgr instance for pipe->const_uploader and
pipe->stream_uploader.

Fixes: b3133e250e ("gallium: add pipe_context::resource_release to eliminate buffer refcounting")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14309
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38896>
(cherry picked from commit 51605bfac2)
2025-12-15 11:23:34 -08:00
Calder Young
7e9f5c9ca5 anv: Fix typo when checking if async rt scratch size changed
Current stack size is stored in layout.sw_stack_size, but the function
thats supposed to update it is comparing layout.total_size instead.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
CC: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38898>
(cherry picked from commit 0b3f0d1662)
2025-12-15 11:23:34 -08:00
Connor Abbott
df07f10924 ir3: Fix condition for using uniform predicates
cat2_may_use_scalar_alu() was incorrect because the instruction could
use an indirectly-accessed const where a0.x (i.e. the offset) is
non-uniform. Fortunately, we already know whether this is the case,
because the original instruction would then write a non-shared GPR.
Also, the restrictions for scalar ALU are the same regardless of whether
we write up0.x or a shared GPR, and vice versa the restrictions for
normal cat2 are the same regardless of whether we write p0.x or a
non-shared GPR, so it should always be safe to write p0.x if non-shared
and up0.x if shared. So, just do that.

Fixes: 2a8c5ebc77 ("ir3: enable scalar predicates")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38895>
(cherry picked from commit da969df092)
2025-12-15 11:23:34 -08:00
Konstantin Seurer
976ea01e5b nir: Ignore ray query ranges that don't start with rq_initialize
Handles is a rare edge case where the ray query is used "before"
there is a rq_initialize.

cc: mesa-stable

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38850>
(cherry picked from commit 034f58c7e3)
2025-12-15 11:23:34 -08:00
Hans-Kristian Arntzen
8d2ce33b98 egl/x11: Fix memory leak when querying translated coord.
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38901>
(cherry picked from commit c00ae68585)
2025-12-15 11:23:34 -08:00
Samuel Pitoiset
72644a0c21 radv: fix race condition when getting the blit queue
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14439
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38883>
(cherry picked from commit a89118c5b0)
2025-12-15 11:23:34 -08:00
Samuel Pitoiset
f3489af028 radv: only include executable size when capturing shaders with RGP
This might help RGP to not try to disassemble past s_endpgm and crashes
on unknown instructions.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14419
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38885>
(cherry picked from commit 31a24caad9)
2025-12-15 11:23:34 -08:00
Valentine Burley
6b5b9b5518 panfrost/ci: Fix GitLab rules after YAML split
Add the new file so panfrost CI jobs are properly triggered.

Fixes: c793f612fc ("ci/panfrost: Split inherit definitions into -inc")
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38890>
(cherry picked from commit 040a24785e)
2025-12-15 11:23:34 -08:00
Connor Abbott
225c35a5da tu: Fill render pass state when resuming
We forgot to call tu_fill_render_pass_state when resuming because it was
mixed in with emitting commands for the start of the subpass. Fix that
by pulling it out. This adds some duplication, but I think it's better
than mixing command emission and CPU-side state setup in the same
function.

Fixes: cb0f414b2a ("tu: Add support for suspending and resuming renderpasses")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38873>
(cherry picked from commit f734dff419)

Conflicts:
	src/freedreno/vulkan/tu_cmd_buffer.cc
2025-12-15 11:23:34 -08:00
Lionel Landwerlin
83420158a4 anv: fixup error path for shader allocation
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d39e443ef8 ("anv: add infrastructure for common vk_pipeline")
Acked-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869>
(cherry picked from commit 7cc9d8eec7)
2025-12-15 11:23:34 -08:00
Lionel Landwerlin
907dddeafc anv: add missing device_memory_report for shaders
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d39e443ef8 ("anv: add infrastructure for common vk_pipeline")
Acked-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869>
(cherry picked from commit 567c1b3af4)
2025-12-15 11:23:34 -08:00
Lionel Landwerlin
6a28b684cc anv: fix internal representations of shaders
The shader assembly was only available when not hitting the cache.

Additionally the serialized shader code was also the relocated variant
which meant that it could differ from one run to the next. Instead
serialize the unrelocated code produced by the compiler.

With this change we now decode the copy of the ISA we have on the
host.

NIR dumps are only available for shaders not loaded from the cache
(much like the other drivers).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8f4c2bd566 ("anv: add runtime shader statistic support")
Acked-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869>
(cherry picked from commit 37789249a1)
2025-12-15 11:23:34 -08:00
Nanley Chery
0fdc830c7e anv: Don't allow STORAGE + CCS for Y_TILED mod
This can happen as a result of us adding on CCS to modifiers which don't
support it on gfx9-11.

Fixes image corruption seen with the following test:

   $ mpv av://lavfi:testsrc --config=no --vo=gpu-next --scale=ewa_lanczossharp --fs

Fixes: 01c4ea771c ("anv: Enable storage accesses with modifiers on gfx12+")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12910
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38855>
(cherry picked from commit fe372f3b1b)
2025-12-15 11:23:34 -08:00
Dylan Baker
abb4ed103f .pick_status.json: Update to b5cf3b1628 2025-12-15 11:23:34 -08:00
Dylan Baker
83be364205 anv/video: Cast intentional read past end of struct member to void*
Coverity notices that we read past the end of the array we're pointing
to, which is intentional, we want to copy additional members from the
source struct into the target pointer. As such, cast to a `void *`,
since this will make Coverity happy.

CID: 1649589
Fixes: 314de7af06 ("anv: Initial support for VP9 decoding")
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38438>
(cherry picked from commit 938fb7703e)
2025-12-15 11:23:34 -08:00
Georg Lehmann
fdf3bd7c96 nir/divergence_analysis: fix swizzle_amd without fetch inactive
Fixes: ad5be40303 ("nir: add fetch inactive index to quad_swizzle_amd/masked_swizzle_amd")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867>
(cherry picked from commit 5f28bb72a7)
2025-12-15 11:23:34 -08:00
Georg Lehmann
b9d15a8eda nir/opt_uniform_subgroup: fix swizzle_amd without fetch_inactive
Fixes: ad5be40303 ("nir: add fetch inactive index to quad_swizzle_amd/masked_swizzle_amd")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867>
(cherry picked from commit 1fc38d8539)
2025-12-15 11:23:34 -08:00
Georg Lehmann
96bc22641e nir/opt_uniform_subgroup: don't try to optimize non trivial clustered reduce
Fixes: 535caaf3e0 ("nir: Optimize uniform iadd, fadd, and ixor reduction operations")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867>
(cherry picked from commit e11d7f06d0)
2025-12-15 11:23:34 -08:00
Dylan Baker
bd1905f6e9 anv/video: Read the right source for memcpy
I'm assuming this based off the `if` branch above, after reading the
code for bit that Coverity pointed out in that branch. It doesn't look
correct to start at the base pointer, which will be 0 initialized and
has 52 bits of zero padding, while the default values are 255.

Fixes: 314de7af06 ("anv: Initial support for VP9 decoding")
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38437>
(cherry picked from commit 0735551b08)
2025-12-15 11:23:34 -08:00
Dylan Baker
44252f71a9 .pick_status.json: Update to 095c2acf01 2025-12-15 11:23:34 -08:00
Benjamin Cheng
00f265aa3d radv/video: Always end ref pic modification list
The app-provided arrays should always end with IDC_END, but when
overriding we need to end the list with IDC_END as well.

Fixes: 2e21eec921 ("radv/video: Fix num_ref_idx_l{0,1} related overrides")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14436
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38858>
(cherry picked from commit 72b43c0595)

Conflicts:
	src/amd/vulkan/radv_video_enc.c
2025-12-15 11:23:34 -08:00
Erik Faye-Lund
facf76f5a0 docs/panfrost: remove some stray newlines
These were accidental when I split up the large article in to multiple
documents. Let's fix that up, so we don't end up repeating this for
future documents.

Fixes: 8248cc0bf4 ("docs/panfrost: move details to separate articles")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38738>
(cherry picked from commit 7b61b2eb61)
2025-12-15 11:23:34 -08:00
Calder Young
c3e9b076e7 anv: Fix misplaced assertion in anv_scratch_pool_alloc
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Fixes: ee42a489 ("anv: Fix scratch pool buffer allocation sizes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38861>
(cherry picked from commit 2fbc722dcf)
2025-12-15 11:23:34 -08:00
Rob Clark
30359ada7c freedreno/decode: Add extra indent levels
Now we start hitting an extra indent level.

Fixes: d7db333b0e ("freedreno/decode: Add gen8 support")
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
(cherry picked from commit ccdd5eb49d)
2025-12-15 11:23:34 -08:00
Connor Abbott
ffb58b4f88 tu: Fix FragCoord offset when HW viewport offset is enabled
FragCoord seems to have the offset applied to it, so we don't need to
subtract it out. Fixes upcoming test
dEQP-VK.renderpasses.dynamic_rendering.primary_cmd_buff.custom_resolve.monolithic.fdm_nonsubsampled_multiview_with_offset.

Fixes: b34b089ca1 ("tu: Use GRAS bin offset registers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38451>
(cherry picked from commit cd1e784148)
2025-12-15 11:23:34 -08:00
Connor Abbott
2e2cc8995c tu: Fix GRAS_BIN_FOVEAT* programming with more than 1 layer
Similar to when patching load/store coordinates, we have to convert the
layer to the view, splatting view 0 to all layers when there is more
than 1 layer and FDM-per-layer is not enabled.

Fixes upcoming new test
dEQP-VK.renderpasses.*.custom_resolve.*.fdm_nonsubsampled_multilayer_with_offset.

Fixes: b34b089ca1 ("tu: Use GRAS bin offset registers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38451>
(cherry picked from commit b2c685af42)

Conflicts:
	src/freedreno/vulkan/tu_cmd_buffer.cc
2025-12-15 11:23:34 -08:00
Calder Young
a5ae0223c1 anv: Fix scratch pool buffer allocation sizes
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
CC: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38840>
(cherry picked from commit ee42a48984)
2025-12-15 11:23:34 -08:00
Ashley Smith
0244f135f5 panfrost,panvk: Enable shader_realtime_clock on panthor 1.6
shader_realtime_clock requires a newer kernel version in order to enable
GLB_COUNTER_EN this change adds a check on this kernel functionality.

Remove GL_EXT_shader_realtime_clock from extensions as this now depends
on kernel version.

Fixes: e9c2c324 ("panvk: enable VK_KHR_shader_clock")
Signed-off-by: Ashley Smith <ashley.smith@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37915>
(cherry picked from commit 5681fabdc2)

Conflicts:
	src/panfrost/ci/panfrost-g610-gles2-extensions.txt
2025-12-15 11:23:34 -08:00
Dylan Baker
f8ac25562d .pick_status.json: Update to 72b43c0595 2025-12-15 11:23:34 -08:00
Natalie Vock
8a4dbad936 radv: Move VMID reservation to vkCreateDevice
DXVK's DXGI implementation can create extra instances used for
enumerating physical devices besides the games' instance. When reserving
VMIDs for SPM, the DXGI instances may snatch the VMID reservation early,
making VMID reservation for the instance that actually needs it fail.
This starts being a problem on kernels 6.18+ where only one user may
reserve a VMID at a time.

Move reserving VMIDs to SQTT initialization inside vkCreateDevice so
that only the instances that actually create logical devices try
reserving VMIDs.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38746>
(cherry picked from commit a7a4abc8d8)

Conflicts:
	src/amd/vulkan/radv_physical_device.c
	src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
2025-12-15 11:23:34 -08:00
Janne Grunau
464e686c84 util/driconf/asahi: Override GL renderer for web browsers
Several web sites block clients with "Apple" in the WebGL renderer
string if the reported OS is not one of Apple's.
This check seems to implemented via a 3rd party product which is slowly
rolled out over more web sites. Instead of playing whack-a-mole with
web sites in multiple browsers override the OpenGL renderer in mesa for
known browsers.

Backport-to: 25.3
Signed-off-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38845>
(cherry picked from commit f912db3f8d)
2025-12-08 09:25:38 -08:00
Patrick Lerda
b7285f4f9f r600: improve cayman scissor 1x1 workaround
This change improves evergreen_apply_scissor_bug_workaround().
It provides a fully functional workaround for cayman.

Note: this was the last functionality which was working
properly on evergreen but not on cayman.

Here are the tests fixed:
spec/arb_framebuffer_no_attachments/arb_framebuffer_no_attachments-atomic/glscissor: fail pass
spec/arb_framebuffer_no_attachments/arb_framebuffer_no_attachments-query/glscissor: fail pass
deqp-gles31/functional/fbo/no_attachments/interaction/1x1ms0_default_2048x2048ms4: fail pass
deqp-gles31/functional/fbo/no_attachments/npot_size/1x1: fail pass

Fixes: 87a5b07f90 ("gallium/radeon: add R600/Evergreen/Cayman support to common viewport code")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38743>
(cherry picked from commit 6246b7be10)
2025-12-08 09:25:37 -08:00
Dave Airlie
b43d7fbb82 nak/cmat: free the type mapping hash table.
Just noticed this on review.

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38843>
(cherry picked from commit 96662cd459)
2025-12-08 09:25:37 -08:00
Faith Ekstrand
0fcb9ef6c5 pan/bi: Handle small vectors in bi_src_index()
bit_size <= 32 does not actually guarantee a single component, which
nir_src_as_uint() requires.  We could just check num_components == 1 but
it's easy enough to support any vector that fits in 32 bits.

Cc: mesa-stable
Reviewed-by: Romaric Jodin <rjodin@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38772>
(cherry picked from commit d3a890a58e)
2025-12-08 09:25:36 -08:00
Utku Iseri
72a8c1f9ea panfrost: add earlyzs FPK condition for v6-
While v7+ checks this on HW, older architectures depend on SW to do it.

Fixes: c43882ad54 ("panfrost: Allow pixels using discard to be killed")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38522>
(cherry picked from commit 5c63446b94)
2025-12-08 09:25:36 -08:00
Yiwei Zhang
95c3a72a18 pan: fix pan_blend_reads_dest to consider special min/max funcs
The min/max funcs are designed to operate solely on the source and
destination colors directly, without any scaling or multiplication by a
factor.

Test: dEQP-GLES3.functional.fragment_ops.blend.* pass with enabled FPK

Cc: mesa-stable
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38824>
(cherry picked from commit d5bf0b0df7)
2025-12-08 09:25:35 -08:00
Dylan Baker
b73d481413 .pick_status.json: Update to f912db3f8d 2025-12-08 09:25:32 -08:00
Eric R. Smith
d8030a1b76 panfrost: do not allow skipping of fragment shader when alpha-to-coverage
Some checks failed
macOS-CI / macOS-CI (dri) (push) Has been cancelled
macOS-CI / macOS-CI (xlib) (push) Has been cancelled
When alpha to coverage is enabled we cannot allow the fragment shader to
be skipped, because the calculated alpha result is essentially a side
effect (it can cause some samples to be discarded).

This brings the OpenGL driver in line with panvk, which already has this
check in its version of fs_required().

Signed-off-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38794>
(cherry picked from commit 3ce6bcb9e8)
2025-12-05 08:11:47 -08:00
Aitor Camacho
cefaa50440 wsi/metal: Fix blit_imate_to_image's pool selection for cmd buffer alloc
Fixes: 39a7d65113 ("wsi/metal: Backend addition for drivers built on top of Metal")

Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38785>
(cherry picked from commit 273f668520)
2025-12-05 08:11:47 -08:00
Aitor Camacho
34af07e695 wsi/metal: Fix command buffer release at destroy
Fixes: 39a7d65113 ("wsi/metal: Backend addition for drivers built on top of Metal")

Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38785>
(cherry picked from commit a547c6306a)
2025-12-05 08:11:47 -08:00
Dylan Baker
0719004362 .pick_status.json: Update to 0104b3df41 2025-12-05 08:11:47 -08:00
Benjamin Cheng
3bd0cdbd6a radv/video: Fix force_integer_mv=1 on intra frame
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
According to AV1 spec, force_integer_mv=1 on intra frames. However, VCN
FW does not expect integer mv to be set unless screen content tools are
enabled. This also aligns the code to the radeonsi logic.

(cherry-picked from commit fa1fd2413f)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38812>
2025-12-04 21:14:22 +00:00
Anna Maniscalco
0cdc3db6c3 radv: recalculate legacy_gs_info on bind
Previously legacy_gs_info calculated based on
gs_info->legacy_gs_info.esgs_itemsize which is calculated based on gs
input varyings.

However, when using ESO vs/tes can have outputs not read by gs, which
leads to underestimating LDS usage.

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38805>
2025-12-04 20:41:10 +00:00
Samuel Pitoiset
75c4b7999b radv: reduce maxTexelBufferElements to 1<<29
It's the number of elements. RADV exposes VK_FORMAT_R64_{UINT,SINT}
formats for texel buffers, so the maximum is 1<<29 to fit in the
32-bit bounds checking.

Fixes KHR-GL46.texture_buffer_size_clamping.* with Zink and new VKCTS
dEQP-VK.texture.misc.max_elements.*.

Cc: mesa-stable.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38805>
2025-12-04 20:41:10 +00:00
Samuel Pitoiset
9555ed4f9a radv: add radv_hide_rebar_on_dgpu and enable for Red Dead Redemption 2
RDR2 VRAM memory management when resizable BAR is enabled seems
incorrect because it keeps allocating VRAM without freeing anything.

This introduces a drirc option to emulate a fake carveout of 256MiB to
workaround this game bug. This also adjust memory budgets by
distributing it between visible and invisible because AMDGPU reports
the same value for both when REBAR is enabled.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12091
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38805>
2025-12-04 20:41:10 +00:00
Faith Ekstrand
95f11b74f5 pan/bi: Fix LD_VAR_BUF indirect offset calculations
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We multiply by 16 correctly but then drop that in the case where vbase
is non-zero.  We typically lower FS input indirects so we don't see this
often but there are a few cases where they still sneak through.

Fixes: 0fcddd4d2c ("pan/bi: Rework varying linking on Valhall")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38788>
(cherry picked from commit 83f90b0760)
2025-12-04 09:17:04 -08:00
Karol Herbst
a3b0070415 nir: add ACCESS to shared_uniform_block_intel
intel_nir_blockify_uniform_loads simply overwrites the intrinsic for
load_shared, which leads to messed up indicies, e.g:
  "base=0, access=volatile, align_mul=4, align_offset=0
became:
  "base=0, align_mul=4, align_offset=4"

Fixes: 0dd09a292b ("nir: add ACCESS_ATOMIC")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38801>
(cherry picked from commit a255e2ca56)
2025-12-04 09:15:34 -08:00
Timothy Arceri
5e7eec9e63 util/driconf: add Cursemark workaround
Fixes gpu hang on radeonsi and corrupt rendering on iris.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14392
Cc: mesa-stable

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38777>
(cherry picked from commit b75cd07265)
2025-12-04 09:15:33 -08:00
Gurchetan Singh
531a4d5a65 gfxstream: fix logspam in TLS helper function
Logspam has been reported in a gfxstream initialization
path.

Fixes: 4a30c6fd70 ("gfxstream: Use the Mesa common tss_* TLS helper functions")
Cc: mesa-stable

Reviewed-by: David Gilhooley <djgilhooley.gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38776>
(cherry picked from commit 4f45e834ae)
2025-12-04 09:15:31 -08:00
Dylan Baker
24cf50afab .pick_status.json: Update to b13003133d 2025-12-04 09:15:25 -08:00