Commit graph

224035 commits

Author SHA1 Message Date
Georg Lehmann
dd3c7756cc radv/gfx11+: program INST_PREF_SIZE for compute
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42028>
2026-06-10 08:22:59 +00:00
Georg Lehmann
e1b649d333 radv: remove gfx6 code from ngg emission
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42028>
2026-06-10 08:22:59 +00:00
Georg Lehmann
ae9eb6298b amd/common: add helper for INST_PREF_SIZE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42028>
2026-06-10 08:22:59 +00:00
Georg Lehmann
f341fb0742 amd/common: don't pass radeon_info to ac_align_shader_binary_for_prefetch
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42028>
2026-06-10 08:22:59 +00:00
Georg Lehmann
5c3a6c938b amd/gpu_info: precompute instruction prefetch distance
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42028>
2026-06-10 08:22:58 +00:00
Samuel Pitoiset
ec6748468d ci: add a new option called profile in ci_run_n_monitor.py
It seems very useful, at least to me, to have some predefined profiles
for vkd3d or VKCTS main uprevs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42110>
2026-06-10 07:59:20 +00:00
Samuel Pitoiset
47298397dc util/drirc: remove the driver option in drirc_validate
Each driver use its own drirc file now, so the option is useless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41881>
2026-06-10 07:17:14 +00:00
Samuel Pitoiset
957eb2b5f0 radv,anv: remove useless includes for drirc stuff
No longer needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41881>
2026-06-10 07:17:14 +00:00
Thomas H.P. Andersen
c0531ece56 nvk: use the new generation script for drirc
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41881>
2026-06-10 07:17:14 +00:00
Samuel Pitoiset
4c66fc1383 venus: use drirc_gen
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41881>
2026-06-10 07:17:14 +00:00
Samuel Pitoiset
86406ca87d v3dv: use drirc_gen
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41881>
2026-06-10 07:17:14 +00:00
Samuel Pitoiset
8b422baac8 hk: use drirc_gen
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41881>
2026-06-10 07:17:14 +00:00
Samuel Pitoiset
309c2a213a panvk: use drirc_gen
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41881>
2026-06-10 07:17:14 +00:00
Samuel Pitoiset
281ae60b5e pvr: use drirc_gen
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41881>
2026-06-10 07:17:14 +00:00
Samuel Pitoiset
dbbd251b6f dzn: use drirc_gen
WSI options are already NULL, so they are never used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41881>
2026-06-10 07:17:14 +00:00
Samuel Pitoiset
0dd9b61c80 util/drirc_gen: allow to override the defaults VK WSI common options
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41881>
2026-06-10 07:17:14 +00:00
Samuel Pitoiset
482e9f3002 util/drirc_gen: add heap_memory_percent to common VK options
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41881>
2026-06-10 07:17:14 +00:00
Samuel Pitoiset
34c343aad1 util/drirc_gen: prevent generating empty structs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41881>
2026-06-10 07:17:14 +00:00
Samuel Pitoiset
59d6d5e45f util/drirc_gen: fix generating 64-bit driconf options
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41881>
2026-06-10 07:17:14 +00:00
Samuel Pitoiset
8e008649cb util/drirc_gen: change the driconf DTD to not require one app/engine entry
To be able to validate empty files for drivers that don't have any
driconf entries yet.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41881>
2026-06-10 07:17:14 +00:00
Job Noorman
1a9a0a15f7 ir3: lower undef booleans to zero
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
We are generally fine with undefs. However, booleans are only allowed to
contain 0/1 but are stored in 16b registers. Undefs may cause such
registers to be uninitialized and contain values other than 0/1. This
especially happens with undef booleans in phi srcs, which are explicitly
left uninitialized. In general, such non-0/1 values don't cause problems
because we mostly use booleans by comparing them to 0. However, they do
cause problems in special cases like `inot(x)` which we lower to `sub(1,
x)` which only works if true==1.

Fixes misrenderings in "Kingdoms of Amalur: Reckoning".

Totals from 12 (0.01% of 176258) affected shaders:
Instrs: 14590 -> 14615 (+0.17%)
CodeSize: 29796 -> 29808 (+0.04%)
NOPs: 3091 -> 3098 (+0.23%); split: -0.03%, +0.26%
MOVs: 735 -> 748 (+1.77%)
(sy)-stall: 4509 -> 4508 (-0.02%)
Cat0: 3471 -> 3483 (+0.35%); split: -0.03%, +0.37%
Cat1: 1257 -> 1270 (+1.03%)

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42051>
2026-06-10 06:05:05 +00:00
Job Noorman
46fce462fb nir/lower_undef_to_zero: add filter argument
Some backends may want to lower some, but not all, undefs.

For example, in ir3, we are generally fine with undefs. However,
booleans are only allowed to contain 0/1 but are stored 16b registers.
Undefs may cause such registers to be uninitialized and contain values
other than 0/1.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42051>
2026-06-10 06:05:05 +00:00
Paulo Zanoni
489aa1808f anv: give anv_ensure_fp64_shader() a chance to be called
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
In anv_shader_lower_nir() we call anv_ensure_fp64_shader() only if
device->fp64_nir is set, but the function that sets device->fp64_nir
is anv_ensure_fp64_shader()! That means the only way for
device->fp64_nir to be set is through blorp: if the app does not issue
the blorp shader that uses fp64, then we won't have it.

Change the check to be like the one we have in blorp_compile_fs_brw().

Fixes: 7d3b62e13d ("anv: only load fp64 software shader when needed")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42100>
2026-06-09 23:29:41 +00:00
Christian Gmeiner
fbd2f140fe etnaviv: Drop unused num_loops shader stat
Some checks are pending
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macOS-CI / macOS-CI (xlib) (push) Waiting to run
The field was never populated (initialized to 0 with a TODO) yet
printed in dump_shader_info(..) and etna_dump_shader(..), giving
the misleading impression that loop counts were tracked. Remove
the field and its consumers.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41560>
2026-06-09 22:23:04 +00:00
Dave Airlie
4ac11c9006 nak: block pipe_format from nak bindings.
This comes from the compiler bindings and lately we get

error[E0659]: `PIPE_FORMAT_R8_UINT` is ambiguous
    --> ../src/nouveau/compiler/nak/from_nir.rs:2193:13
     |
2193 |             PIPE_FORMAT_R8_UINT => MemType::U8,
     |             ^^^^^^^^^^^^^^^^^^^ ambiguous name
     |
     = note: ambiguous because of multiple glob imports of a name in the same module
note: `PIPE_FORMAT_R8_UINT` could refer to the constant imported here
    --> ../src/nouveau/compiler/nak/from_nir.rs:12:5
     |
12   | use nak_bindings::*;
     |     ^^^^^^^^^^^^^^^
     = help: consider adding an explicit import of `PIPE_FORMAT_R8_UINT` to disambiguate
note: `PIPE_FORMAT_R8_UINT` could also refer to the constant imported here
    --> ../src/nouveau/compiler/nak/from_nir.rs:14:5
     |
14   | use compiler::bindings::*;
     |     ^^^^^^^^^^^^^^^^^^^^^
     = help: consider adding an explicit import of `PIPE_FORMAT_R8_UINT` to disambiguate

Acked-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42109>
2026-06-09 22:06:55 +00:00
Lone_Wolf
f958ad1195 clc: fix build with LLVM23 (TargetRegistry::lookupTarget)
See d50631faad

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15471
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41558>
2026-06-09 21:17:21 +00:00
Rob Clark
1ab1799733 freedreno/perfetto: Use sequence-scoped clk
Now that the clock snapshots are serialized properly, switch to sequence
scoped clock id.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42013>
2026-06-09 20:33:11 +00:00
Rob Clark
2a2199fb3e freedreno/perfetto: serialize clk snapshots
Move clk snapshots into same thread as render-stage traces.  This will
let us move to sequence scoped clock.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42013>
2026-06-09 20:33:10 +00:00
Rob Clark
87b34e03ae freedreno/perfetto: Add non-draw stage
Make it easier to see the scope of non-draw passes, rather than only
showing individual compute/blit jobs.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42013>
2026-06-09 20:33:10 +00:00
Rob Clark
b9e2da183e perfetto: Use BufferExhaustedPolicy::kStall
Renderpass traces on traceq are ok to block.  We'd prefer this over
dropping traces.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42013>
2026-06-09 20:33:10 +00:00
Rob Clark
1b8a219c54 perfetto: Increase SMB size
Increase local perfetto shared memory buffer size, to reduce dropped
traces.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42013>
2026-06-09 20:33:10 +00:00
Rob Clark
4adf158aef rusticl: Flush perfetto track events
Flush periodically in the single and worker thread.  And also before
thread exit.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42013>
2026-06-09 20:33:10 +00:00
Rob Clark
f68e6f8848 util/queue: Flush perfetto before blocking
In particular if a queue is going to block, a trace may end with
buffered end traces before the queue gets it's next job.  So flush
before blocking.  (Also on the producer side, since it is easy.)

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42013>
2026-06-09 20:33:10 +00:00
Rob Clark
4b8d296e05 util/thread: Flush traces at thread exit
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42013>
2026-06-09 20:33:10 +00:00
Rob Clark
fd591a9eba perfetto: Add API to flush track events
Track events can be buffered in TLS.  They should be flushed before a
thread exits, and ideally periodically (ie. before a thread blocks) to
ensure that "end" events are not lost.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42013>
2026-06-09 20:33:10 +00:00
Vinson Lee
94c7ccbaa3 radeonsi: remove duplicate '.bpp' initializer in si_sdma_copy_image
Some checks are pending
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macOS-CI / macOS-CI (xlib) (push) Waiting to run
Compiling with clang produces a -Winitializer-overrides warning:

  src/gallium/drivers/radeonsi/si_sdma_copy_image.c:217:17: warning:
  initializer overrides prior initialization of this subobject
  [-Winitializer-overrides]

The surf_src and surf_dst ac_sdma_surf initializers each set '.bpp = bpp'
twice: once next to the other scalar fields and once again after the
nested '.offset' initializer. The values are identical, so behavior is
unchanged, but the duplicate field initializer is redundant. Drop the
second one.

Fixes: e6e305988c ("ac,radv,radeonsi: merge tiled/linear surfaces into one struct")
Assisted-by: Claude Code (Claude Opus 4.8)
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pelloux@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42068>
2026-06-09 13:10:56 -07:00
Sushma Venkatesh Reddy
48bc6cbe38 intel/perf: Add WCL OA support
WCL is mapped to PTL

Tested-by: Vishwanatha Fnu <fnu.vishwanatha@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42009>
2026-06-09 19:34:54 +00:00
Caio Oliveira
0aff5e006c jay: Handle dpas_intel intrinsic
Some checks are pending
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macOS-CI / macOS-CI (xlib) (push) Waiting to run
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41913>
2026-06-09 17:33:23 +00:00
Caio Oliveira
0f309dbfe5 jay: Add helpers for managing unordered instructions
In addition to the general predicates, add wrappers to set
and get the SBID, since they are in the extra struct of
each instruction.  This is a preparation for adding DPAS.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41913>
2026-06-09 17:33:23 +00:00
Sid Pranjale
f6dd632b31 v3dv: drop legacy CPU queue fallback paths
We now require kernel side CPU queue support (introduced via
DRM_V3D_PARAM_SUPPORTS_CPU_QUEUE). If the underlying kernel lacks
this support i.e. is older than kernel 6.8, physical device
initialization will now fail.

With this requirement guaranteed, we can remove the userspace
fallback paths that manually managed and stalled on indirect
CSD dispatches and query resets.

Reviewed-by: Maíra Canal <mcanal@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42087>
2026-06-09 16:53:48 +00:00
Maíra Canal
37ef45a8c0 v3dv: Drop legacy comments about single-sync support
After commit 16c96b0e93 ("v3dv: drop single sync kernel interface"), we
no longer use V3DV_QUEUE_ANY. Therefore, drop it and also remove the
legacy comments about single-sync support.

Signed-off-by: Maíra Canal <mcanal@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42119>
2026-06-09 16:34:47 +00:00
Samuel Pitoiset
156752feb5 radv/ci: skip all WSI tests on GFX1201
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
They cause random kernel NULL pointer dereferences. Seems pretty
recent but skipping them is definitely more reliable.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42123>
2026-06-09 16:06:31 +00:00
Lakshman Chandu Kondreddy
0752d8b08d zink: Set can_do_invalid_linear_modifier workaround for QCOM blob driver
As QCOM blob driver handles invalid <-> linear modifier conversion,
set can_do_invalid_linear_modifier workaround to true.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42116>
2026-06-09 15:40:15 +00:00
Tapani Pälli
93476c6299 anv: fix a null pointer access with isl_mod_info
It is possible for isl_mod_info to be NULL if no drm modifier was
given, layout transition on external queue can hit this condition.

Fixes: 11f8f333e2 ("anv: set a private binding when the image is not externally shared")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42015>
2026-06-09 15:20:02 +00:00
Calder Young
864bee8d49 nir: Do not mask helper lanes of writes if ACCESS_INCLUDE_HELPERS is set
Some checks are pending
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macOS-CI / macOS-CI (xlib) (push) Waiting to run
Fixes: 586da7b ("nir: Add nir_lower_helper_writes pass")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42031>
2026-06-09 12:57:04 +00:00
Alyssa Rosenzweig
09df2ee2ba nir/opt_sink: sink more Intel block instructions
Results on my jay branch

SIMD16:
   Totals from 1456 (55.01% of 2647) affected shaders:
   Instrs: 2119110 -> 2116320 (-0.13%); split: -0.23%, +0.10%
   CodeSize: 29561972 -> 29460340 (-0.34%); split: -0.47%, +0.13%

SIMD32:
   Totals from 1462 (55.23% of 2647) affected shaders:
   Instrs: 2421472 -> 2422930 (+0.06%); split: -0.20%, +0.26%
   CodeSize: 34434240 -> 34415840 (-0.05%); split: -0.33%, +0.28%
   Number of fill instructions: 29830 -> 29829 (-0.00%); split: -0.01%, +0.00%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42102>
2026-06-09 12:16:57 +00:00
Sagar Ghuge
3da4653d46 jay: Implement halt
Some checks are pending
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Halt needs to be always in pair. First halt issued will mask off active
channels and second one will basically re-enable those masked off
channels.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42067>
2026-06-09 11:47:33 +00:00
Samuel Pitoiset
36f3175187 radv/amdgpu: defer allocating the NULL PRT BO
To avoid wasting VRAM when emulated sparse residency isn't used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41883>
2026-06-09 11:13:35 +00:00
Samuel Pitoiset
887a390ec0 radv: advertise VK_KHR_shader_abort
Without VK_KHR_device_fault there is no way to get back the abort
messages.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40723>
2026-06-09 10:33:12 +00:00
Samuel Pitoiset
982f9312bd radv: implement VK_KHR_shader_abort
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40723>
2026-06-09 10:33:11 +00:00