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amd/common: don't pass radeon_info to ac_align_shader_binary_for_prefetch

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Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42028>
This commit is contained in:
Georg Lehmann 2026-06-08 09:13:34 +02:00 • committed by Marge Bot
parent 5c3a6c938b
commit f341fb0742
5 changed files with 15 additions and 9 deletions
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8
src/amd/common/ac_binary.c
View file

@ -113,7 +113,9 @@ void ac_parse_shader_binary_config(const char *data, size_t nbytes, unsigned wav
conf->float_mode |= V_00B028_FP_16_64_DENORMS;
}
unsigned ac_align_shader_binary_for_prefetch(const struct radeon_info *info, unsigned size)
unsigned ac_align_shader_binary_for_prefetch(enum amd_gfx_level gfx_level,
unsigned prefetch_distance,
unsigned size)
{
/* The SQ fetches up to N cache lines of 16 dwords
* ahead of the PC, configurable by SH_MEM_CONFIG and
@ -130,10 +132,8 @@ unsigned ac_align_shader_binary_for_prefetch(const struct radeon_info *info, uns
* boundaries, but (1) needs to be addressed. Due to buffer
* suballocation, we just play it safe.
*/
unsigned prefetch_distance = info->instr_prefetch_distance;
if (prefetch_distance) {
if (info->gfx_level >= GFX11)
if (gfx_level >= GFX11)
size = align(size + prefetch_distance * 64, 128);
else
size = align(size + prefetch_distance * 64, 64);

7
src/amd/common/ac_binary.h
View file

@ -10,11 +10,12 @@
#include <stdbool.h>
#include <stddef.h>
#include "amd_family.h"
#ifdef __cplusplus
extern "C" {
#endif
struct radeon_info;
struct ac_compiler_info;
struct ac_shader_config {
@ -38,7 +39,9 @@ void ac_parse_shader_binary_config(const char *data, size_t nbytes, unsigned wav
const struct ac_compiler_info *compiler_info,
struct ac_shader_config *conf);
unsigned ac_align_shader_binary_for_prefetch(const struct radeon_info *info, unsigned size);
unsigned ac_align_shader_binary_for_prefetch(enum amd_gfx_level gfx_level,
unsigned prefetch_distance,
unsigned size);
#ifdef __cplusplus
}

2
src/amd/vulkan/radv_shader.c
View file

@ -1238,7 +1238,7 @@ radv_alloc_shader_memory(struct radv_device *device, uint32_t size, bool replaya
{
const struct radv_physical_device *pdev = radv_device_physical(device);
size = ac_align_shader_binary_for_prefetch(&pdev->info, size);
size = ac_align_shader_binary_for_prefetch(pdev->info.gfx_level, pdev->info.instr_prefetch_distance, size);
size = align(size, RADV_SHADER_ALLOC_ALIGNMENT);
mtx_lock(&device->shader_arena_mutex);

3
src/gallium/drivers/radeonsi/gfx/si_shader.c
View file

@ -180,7 +180,8 @@ unsigned si_get_shader_prefetch_size(struct si_shader *shader)
struct si_screen *sscreen = shader->selector->screen;
/* This excludes arrays of constants after instructions. */
unsigned exec_size =
ac_align_shader_binary_for_prefetch(&sscreen->info,
ac_align_shader_binary_for_prefetch(sscreen->info.gfx_level,
sscreen->info.instr_prefetch_distance,
shader->complete_shader_binary_size);
/* INST_PREF_SIZE uses 128B granularity.

4
src/gallium/drivers/radeonsi/gfx/si_shader_binary.c
View file

@ -126,7 +126,9 @@ static void *pre_upload_binary(struct si_screen *sscreen, struct si_shader *shad
unsigned *staging_offset,
int64_t bo_offset)
{
unsigned aligned_size = ac_align_shader_binary_for_prefetch(&sscreen->info, binary_size);
unsigned aligned_size = ac_align_shader_binary_for_prefetch(sscreen->info.gfx_level,
sscreen->info.instr_prefetch_distance,
binary_size);
if (bo_offset >= 0) {
/* sqtt needs to upload shaders as a pipeline, where all shaders