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radv/gfx11+: program INST_PREF_SIZE for compute

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Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42028>
This commit is contained in:
Georg Lehmann 2026-06-03 17:20:07 +02:00 • committed by Marge Bot
parent e1b649d333
commit dd3c7756cc
3 changed files with 24 additions and 1 deletions
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1
src/amd/vulkan/radv_device.c
View file

@ -1172,6 +1172,7 @@ radv_device_init_compiler_info(struct radv_device *device)
.hw =
{
.address32_hi = pdev->info.address32_hi,
.instr_prefetch_distance = pdev->info.instr_prefetch_distance,
.address_prt_wa_control_bit = pdev->info.address_prt_wa_control_bit,
.rbplus_allowed = pdev->info.rbplus_allowed,
},

21
src/amd/vulkan/radv_shader.c
View file

@ -1613,6 +1613,15 @@ radv_open_rtld_binary(enum amd_gfx_level gfx_level, const struct radv_shader_bin
}
#endif
static unsigned
radv_get_inst_pref_size(const struct radv_compiler_info *compiler_info, unsigned exec_size)
{
enum amd_gfx_level gfx_level = compiler_info->ac->gfx_level;
unsigned prefetch_distance = compiler_info->hw.instr_prefetch_distance;
return ac_get_instr_prefetch_size(gfx_level, prefetch_distance, exec_size);
}
static unsigned
radv_get_num_pos_exports(const struct radv_shader_info *info, unsigned *clip_dist_mask, unsigned *cull_dist_mask)
{
@ -2142,6 +2151,7 @@ radv_postprocess_binary_config(const struct radv_compiler_info *compiler_info, s
{
enum amd_gfx_level gfx_level = compiler_info->ac->gfx_level;
struct ac_shader_config *config = &binary->config;
unsigned exec_size;
if (binary->type == RADV_BINARY_TYPE_RTLD) {
#if !defined(USE_LIBELF)
@ -2153,6 +2163,8 @@ radv_postprocess_binary_config(const struct radv_compiler_info *compiler_info, s
return false;
}
exec_size = rtld_binary.exec_size;
if (!ac_rtld_read_config(compiler_info->ac, &rtld_binary, config)) {
ac_rtld_close(&rtld_binary);
return false;
@ -2163,6 +2175,10 @@ radv_postprocess_binary_config(const struct radv_compiler_info *compiler_info, s
ac_rtld_close(&rtld_binary);
#endif
} else {
struct radv_shader_binary_legacy *bin = (struct radv_shader_binary_legacy *)binary;
exec_size = bin->exec_size;
}
const struct radv_shader_info *info = &binary->info;
@ -2374,6 +2390,11 @@ radv_postprocess_binary_config(const struct radv_compiler_info *compiler_info, s
S_00B84C_EXCP_EN(excp_en) | S_00B84C_EXCP_EN_MSB(excp_en_msb);
config->rsrc3 |= S_00B8A0_SHARED_VGPR_CNT(num_shared_vgpr_blocks);
if (gfx_level >= GFX12)
config->rsrc3 |= S_00B8A0_INST_PREF_SIZE_GFX12(radv_get_inst_pref_size(compiler_info, exec_size));
else if (gfx_level >= GFX11)
config->rsrc3 |= S_00B8A0_INST_PREF_SIZE_GFX11(radv_get_inst_pref_size(compiler_info, exec_size));
break;
default:
UNREACHABLE("unsupported shader type");

3
src/amd/vulkan/radv_shader.h
View file

@ -516,9 +516,10 @@ struct radv_compiler_info {
struct {
uint32_t address32_hi;
uint32_t instr_prefetch_distance : 8;
uint32_t rbplus_allowed : 1;
uint32_t address_prt_wa_control_bit : 8;
uint32_t padding : 23;
uint32_t padding : 15;
} hw;
/* Misc values included as part of the cache key */