We need to do this before we gather shader_info because lowering indirect
indexing can trigger more code elimination.
The opts_not_run parameter is removed because it was only needed for array
temps.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
The pass is called sooner because we want to optimize the point_coord
barycentrics in ac_nir_lower_ps_early.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
This removes duplicated gathering from 3 places for shader variants,
and adds it where it should be, which is before late optimizations and
late lowering passes, which is where we want it for the radeonsi linker.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
It will be done in a different place later, but for now, we need to get
it out of si_update_shader_binary_info because the function will be
removed and PS input gathering will be moved, which will be quite
complicated, but it's needed for having a linker in radeonsi.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
This is a prerequisite for linking merged shaders.
At the beginning of get_nir_shader (renamed to get_nir_shaders), we get
both shaders that are going to be merged, and then we optimize them together
and pass them to LLVM or ACO-specific code as struct si_linked_shaders.
The code setting uses_instance_id is moved because the previous place
doesn't work with this new organization.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
This splits shader variant compilation into the following stages:
* get_input_nir
* run_pre_link_optimization_passes
(not implemented yet: run linking optimizations here)
(not implemented yet: gather shader_info here)
* run_late_optimization_and_lowering_passes
This order is important when we start adding linking optimizations for
shader variants and start getting shader_info from shader variants instead
of input NIR.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
We always have progress==true (e.g. due to si_nir_lower_abi), so late_opts
is likely to be always true.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
We will lower polygon stipple before we have si_shader_args, so we need
an intrinsic to get the buffer descriptor.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
We will get shader_info from NIR after this and before si_init_shader_args,
so we need to use system values.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
We don't need to look at the framebuffer state and record how many color
buffers to write. Instead, we can deduce which color buffers are enabled
from spi_shader_col_format, which already does the right thing.
So PS epilogs only need a single bool flag that determines whether all
enabled color buffers should be written.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
This adds an option into the prolog key to replace frag_coord.xy with
pixel_coord when sample shading is disabled, which is most of the time.
This reduces the number of input VGPRs.
It's already implement in ac_nir_lower_ps_early for monolithic shaders
and the PS prolog in ACO, so this just implements it for the PS prolog
in LLVM IR.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
Using the used component count is not enough. We need to consider
the component mask because any component can be disabled. This might
fix tests.
This removes the component counting from ac_get_fs_input_vgpr_cnt
and determines the component mask where it's needed.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
This should be faster.
2 user SGPRs contain 8 sample positions, storing 4 bits per coordinate
and extracting them in the shader.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
Liveness info can be huge, since with larger shaders it essentially
grows quadratically (linear increase in number of SSA defs *
linear increase in blocks).
Freeing liveness info early helps somewhat mitigate memory usage here.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29577>
The checksum for the Osmos trace on TGL has changed, so update it
to reflect the current state of the trace.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Mike Blumenkrantz <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33256>
This trace contains generated GL IDs from the time it was recorded,
making it invalid.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Mike Blumenkrantz <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33256>
LLVM 15 is pretty old, and notably not supported by either ANGLE nor
Skia anymore. So let's move up to LLVM 19 using packages provided by
LLVM themselves, apart from PPC and ARMv7 which don't have builds.
The Skia build now requires a bunch of new warning exclusions; hopefully
most of these are no longer needed when we can upgrade Skia shortly.
The ci-deb-repo revision has also been bumped to get us a new version of
xtensor which builds with LLVM 19, and a version of spirv-tools which
also works with LLVM 19.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Closes: mesa/mesa#11538
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33137>
When building for the dynamic loader used by e.g. Clover, pipe_i915 was
the only target failing to declare a driver descriptor. This becomes an
error with more aggressive linkers.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Fixes: 87392385b5 ("gallium/drm: Define the DRM entrypoints in drm_helper.h")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33137>
NEW util/conversion.rs
Adds traits `TryFromWithErr` and `TryIntoWithErr` and their
implementation for types with `TryFrom` and `TryInto` traits
former
```
try_into().map_err(|_| CL_OUT_OF_HOST_MEMORY)
try_from(val).map_err(|_| CL_OUT_OF_HOST_MEMORY)
```
can now be written as
```
try_into_with_err(CL_OUT_OF_HOST_MEMORY)
try_from_with_err(val, CL_OUT_OF_HOST_MEMORY)
```
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33267>
cat3 instructions read their 3rd src later than their first two srcs.
Pre-a7xx, this was only supported for mad(sh) but on a7xx, it works for
all cat3 instructions.
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33183>
cat3 instructions read their 3rd src later than their first two srcs.
This was implemented in two different places: once for scheduling and
once for legalization. Extract this logic in a new helper and also add
similar logic for gat/swz there (which the scheduling logic failed to
account for).
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33183>
Preamble defs were rematerialized at the end of the preamble. However,
when some of the sources were defined inside control flow, this would
lead to these sources not dominating their use. Fix this by finding the
block that is dominated by all sources and inserting the new instruction
there.
Also make sure we only de-duplicate instructions if the new instruction
is dominated by the existing one.
Fixes a NIR validation error in Devil may cry 5.
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Fixes: fdfe86aa52 ("ir3: Expand preamble rematerialization")
Fixes: 6a744ddebc ("ir3: Initial support for pushing globals with ldg.k")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33270>
This was accidentally deleted when rewriting to use common Vulkan
dynamic state. This meant we wouldn't correctly fall back when someone
accidentally used FDM together with multiple viewports.
Fixes: 97da0a7734 ("tu: Rewrite to use common Vulkan dynamic state")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33241>
Scheduling an alias.rt right before an alias.tex causes a GPU hang.
Follow the blob and schedule all alias.rt at the end of the preamble to
prevent this from happening.
Fixes a hang in Borderlands 3 on medium or higher graphics settings.
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Fixes: 0aa9678d4d ("ir3: add support for alias.rt")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33238>
just accept the arguments as-is. this matches how gcc/clang actually work
and simplifies the meson.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33242>
reduces a bit of boilerplate.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33242>
