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radeonsi: reorder NIR passes in get_nir_shader (part 1)
Put passes that optimize the code first, and passes that lower it later. This will be needed later. Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
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1 changed files with 11 additions and 10 deletions
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@ -2265,15 +2265,6 @@ static void get_nir_shader(struct si_shader *shader, struct si_nir_shader_ctx *c
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if (nir->info.stage <= MESA_SHADER_GEOMETRY)
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NIR_PASS(progress, nir, si_nir_kill_outputs, key);
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NIR_PASS(progress, nir, ac_nir_lower_tex,
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&(ac_nir_lower_tex_options){
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.gfx_level = sel->screen->info.gfx_level,
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.lower_array_layer_round_even = !sel->screen->info.conformant_trunc_coord,
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});
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if (nir->info.uses_resource_info_query)
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NIR_PASS(progress, nir, ac_nir_lower_resinfo, sel->screen->info.gfx_level);
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bool inline_uniforms = false;
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uint32_t *inlined_uniform_values;
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si_get_inline_uniform_state((union si_shader_key*)key, nir->info.stage,
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@ -2322,6 +2313,8 @@ static void get_nir_shader(struct si_shader *shader, struct si_nir_shader_ctx *c
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progress = true;
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}
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NIR_PASS(progress, nir, nir_opt_shrink_stores, false);
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if (nir->info.stage == MESA_SHADER_FRAGMENT) {
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/* This uses the epilog key, so only monolithic shaders can call this. */
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if (shader->is_monolithic) {
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@ -2376,6 +2369,15 @@ static void get_nir_shader(struct si_shader *shader, struct si_nir_shader_ctx *c
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NIR_PASS(progress, nir, nir_lower_fragcoord_wtrans);
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}
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NIR_PASS(progress, nir, ac_nir_lower_tex,
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&(ac_nir_lower_tex_options){
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.gfx_level = sel->screen->info.gfx_level,
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.lower_array_layer_round_even = !sel->screen->info.conformant_trunc_coord,
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});
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if (nir->info.uses_resource_info_query)
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NIR_PASS(progress, nir, ac_nir_lower_resinfo, sel->screen->info.gfx_level);
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/* This must be before si_nir_lower_resource. */
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if (!sel->screen->info.has_image_opcodes)
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NIR_PASS(progress, nir, ac_nir_lower_image_opcodes);
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@ -2562,7 +2564,6 @@ static void get_nir_shader(struct si_shader *shader, struct si_nir_shader_ctx *c
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*/
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.has_shared2_amd = sel->screen->info.gfx_level >= GFX7,
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});
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NIR_PASS(progress, nir, nir_opt_shrink_stores, false);
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nir_divergence_analysis(nir);
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NIR_PASS(progress, nir, ac_nir_flag_smem_for_loads, sel->screen->info.gfx_level,
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