Commit graph

69376 commits

Author SHA1 Message Date
Konstantin Seurer
d30593ae3d llvmpipe: Compile texture fetch functions on demand
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35043>
2025-05-20 20:10:16 +00:00
Aditya Swarup
ac863b8b15 iris: Disable fast clear when surface width is 16k
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HSD 16023071695 description mentions we need to extend
WA_16021232440 to cover the case when surface width is 16k.

BSpec: 57340

Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34838>
2025-05-20 10:44:52 -07:00
Konstantin Seurer
8edee1e25b lavapipe: Fail device enumeration when DRAW_USE_LLVM=0 is set
DRAW_USE_LLVM=0 is not supported and crashes.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35036>
2025-05-20 16:54:19 +00:00
Dmitry Baryshkov
275a39b3c6 rusticl/device: relax some params for embdded profile
As stated in the OpenCL standard, the lowest allowed values
CL_DEVICE_MAX_PARAMETER_SIZE and CL_DEVICE_LOCAL_MEM_SIZE in case of the
embedded profile are 1K. Limit the check to full profile only, in order
to stop forcing OpenCL 1.0 for embedded-profile device like Qualcomm
Adreno A702.

Backport-to: 25.1
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35073>
2025-05-20 15:21:06 +00:00
Karol Herbst
41a18a27b0 radeonsi: fix variable_shared_size assert in si_switch_compute_shader
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shader->selector->stage is always set to COMPUTE even for OpenCL. Remove
the assert as it doesn't really protect against anything and patch the
shared size only when variable_shared_size is set.

Fixes: e478410466 ("radeonsi: inline shader_info in si_shader_info, keep only what's used")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35003>
2025-05-19 17:51:15 -04:00
Mike Blumenkrantz
0e57c236c4 lavapipe: EXT_zero_initialize_device_memory
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34955>
2025-05-19 17:50:29 +00:00
Matt Turner
eea3ed6a37 gallivm: Use llvm.roundeven in lp_build_round()
`lp_build_round` intends to implement round with ties-to-even behavior,
as can be seen by its test's use of `nearbyint` to generate reference
values and by it use in implementing `nir_op_fround_even`.

Fixes: 0d3b285360 ("gallivm: use llvm intrinsics for 16-bit round/trunc/roundeven")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34937>
2025-05-19 17:02:03 +00:00
Sil Vilerino
9ebb5e65fc d3d12: Add new video encode HEVC configuration CU size 16-32 range
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Reviewed-by: Pohsiang Hsu <pohhsu@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35057>
2025-05-19 11:32:24 -04:00
Sil Vilerino
33f670d869 d3d12/meson: Add USE_D3D12_PREVIEW_HEADERS compiler flag based on dep_dxheaders.version()
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13126

Reviewed-by: Pohsiang Hsu <pohhsu@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35057>
2025-05-19 11:32:17 -04:00
Danylo Piliaiev
de6d111d73 freedreno/regs: A6XX_EARLY_LRZ_LATE_Z is really A6XX_EARLY_Z_LATE_Z
By observing prop driver and doing some tests this mode is about
both early_z and early lrz.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34973>
2025-05-19 13:30:39 +00:00
Patrick Lerda
45133e0e91 radeon/evergreen: improve depth24_stencil8 mipmap behavior
This change is an update to 42be38a8fb. It fixes the remaining
depth24_stencil8 mipmap issues.

This change was tested with the test below modified to check for
every width and height between (1,1) and (143,143), the levels
are tested between 0 and 5.

This change was tested on r600 cypress, palm, barts and cayman.
Here are the tests fixed:
khr-gl(3[0-3]|4[0-5])/texture_repeat_mode/depth24_stencil8_11x131_1_clamp_to_edge: fail pass
khr-gl(3[0-3]|4[0-5])/texture_repeat_mode/depth24_stencil8_11x131_1_mirrored_repeat: fail pass
khr-gl(3[0-3]|4[0-5])/texture_repeat_mode/depth24_stencil8_11x131_1_repeat: fail pass
khr-gles3/texture_repeat_mode/depth24_stencil8_11x131_1_clamp_to_edge: fail pass
khr-gles3/texture_repeat_mode/depth24_stencil8_11x131_1_mirrored_repeat: fail pass
khr-gles3/texture_repeat_mode/depth24_stencil8_11x131_1_repeat: fail pass

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34406>
2025-05-19 12:50:25 +00:00
Patrick Lerda
1186c73c6b r600: implement gs indirect load_per_vertex_input
This functionality is useful with the software fp64
implementation. It allows running the remaining
tests.

Note: the same tests do not generate this indirect
access on cayman which has the hardware fp64
implementation enabled.

This change was tested on cypress, palm and barts.
Here are the tests fixed:
spec/arb_gpu_shader_fp64/execution/gs-isnan-dvec: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-array-copy: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-dmat4: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-dmat4-row-major: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-double-array-const-index: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-double-array-variable-index: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-double-bool-double: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-double-uniform-array-direct-indirect: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-doubles-float-mixed: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-dvec4-uniform-array-direct-indirect: fail pass
spec/arb_gpu_shader_fp64/uniform_buffers/gs-nested-struct: fail pass

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34926>
2025-05-19 12:07:37 +00:00
Patrick Lerda
8df9e3b2d0 r600: add a constant representing gs vertex indirect total
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34926>
2025-05-19 12:07:37 +00:00
Eric Engestrom
add5447483 vmware/ci: move jobs to nightly until farm is stabilized
Example of this job hanging/timing out in merge pipelines that
I personally saw in the last 24h (and right now is Monday morning):
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76580719
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76580721
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76581000
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76581063
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76585062
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76585063
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76585109
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76585110
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76587835
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76587836
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76607117
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76607118
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76607119
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76607120
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76607687
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76607688
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/76620657

That's a rather long list, so I'm merging this without waiting for your
feedback @blu, but please revert this commit once the issue has been
fixed :)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35048>
2025-05-19 10:36:27 +00:00
Mary Guillemard
9e6e7d9ee3 panfrost: Enable 2 sample count support on v12+
v12+ supports this, let's expose it.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34997>
2025-05-19 10:13:49 +00:00
Mary Guillemard
37856eff06 panfrost: Use pan_sample_pattern in pan_cmdstream
We had a duplicate function there, let's use common code instead and
allow v4.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34997>
2025-05-19 10:13:49 +00:00
Jianxun Zhang
6eeb079653 iris: New compressed heaps for scanout buffers (xe2)
Two new heaps are introduced to use a different PAT entry
for compressed buffers to display.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29928>
2025-05-16 16:03:54 -07:00
Seán de Búrca
611772af45 rusticl: replace unnecessary Vec references with slice refs
v2: restore static borrow on `core::device::devs()`

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
2025-05-16 19:58:31 +00:00
Seán de Búrca
543b07bee8 rusticl: write CLInfoValues from iterators instead of collecting
All of the current instances of writing info values from `Vec`s involve
building an iterator and then collecting it specifically for writing.
By using an `ExactSizeIterator`, we can avoid the need for allocating in
these cases.

v2: use existing `CLInfoValue::write_iter()` instead of custom type

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
2025-05-16 19:58:31 +00:00
Seán de Búrca
3a16c9ab43 rusticl: iterate subgroup sizes only as needed
Making subgroup sizes an iterator avoids collecting (and thus
allocation) in cases where the values are unneeded or only the first is
needed.

v2: fix calculation of `SetBitIndices<u32>` iterator length

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
2025-05-16 19:58:31 +00:00
Seán de Búrca
0980ba8595 rusticl: use simple equality check for contexts instead of HashSet
v2: use `[T]::split_first()` to consolidate equality check
v3: undo misleading comment split

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
2025-05-16 19:58:31 +00:00
Seán de Búrca
ac44513b9e rusticl: hand-map 3-element arrays for fallible conversion
Iterating arrays and collecting to a `Vec` requires allocating memory
for the `Vec` and, when the needed result is an array of the same size
as the original, an unnecessary fallible conversion back to an array.

While arrays have a `map()` method for infallible conversions,
`try_map()` is unstable. Fortunately, we only have to worry about one
array size and it's small, so hand-mapping is a viable alternative.

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
2025-05-16 19:58:31 +00:00
Collabora's Gfx CI Team
38efae8964 Uprev Piglit to 1767af745ed96f77b16c0c205015366d1fbbdb22
1498c397ea...1767af745e

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34936>
2025-05-16 17:25:05 +00:00
Loïc Molinari
a35415530d panfrost: Use util_streaming_load_memcpy() to copy AFBC superblocks
Use the now AArch64 optimized util_streaming_load_memcpy() routine to
copy the AFBC superblocks from non-cacheable to cacheable memory.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34606>
2025-05-16 13:35:33 +00:00
Loïc Molinari
d3544aebd7 panfrost: Optimize AFBC-P offsets computation
Copy block info from non-cacheable memory to cacheable memory in order
to avoid flushing the write combining buffer at each iteration for
only 4 bytes written.

This makes AFBC-P offsets computation ~13.5 times faster on Rock 5B
for a 2048x2048 RGBA8 texture, taking ~0.2 ms instead of ~2.7 ms.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34606>
2025-05-16 13:35:33 +00:00
David Rosca
bade93c447 radeonsi/vce: Fix output quality and performance in speed preset
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Fixes: 544a180320 ("radeonsi/vce: Support quality presets")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34894>
2025-05-16 10:36:44 +00:00
David Rosca
ad96031ec6 radeonsi/vce: Only send one task per IB
There is no need to use second task for config when creating the
session, also it doesn't work now as we don't set the next task
offset in task info anymore.

Fixes: 9ca1cda2be ("radeonsi/vce: Cleanup")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34894>
2025-05-16 10:36:44 +00:00
David Rosca
fd1480c3df radeonsi/vce: Fix bitstream buffer size
On old VCE this was being rejected by kernel because the size here
was the buffer size, but the bitstream buffer address includes the
offset.

Fixes: 901aafb030 ("radeonsi/vce: Support raw packed headers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13128
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34894>
2025-05-16 10:36:44 +00:00
Juan A. Suarez Romero
f27d062abc gallium/util: fix num primitives for line loops
When computing the number of primitives from the number of vertices, for
the case of line loops we need to include an extra line that closes the
shape.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35007>
2025-05-16 09:06:17 +00:00
Gert Wollny
58d8dc9543 r600/sfn: dump the lowered shader when translation fails
So far we printed the variant before the final lowering was done,
this is usually not that helpful. For this the code to dump the
shader has to go into r600_shader_from_nir.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34999>
2025-05-16 08:45:58 +00:00
Valentine Burley
2ce2c1f835 zink/ci: Skip flaky trace on TGL
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Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35016>
2025-05-16 08:00:11 +00:00
Rob Clark
65e18a8494 freedreno: Fix shader-clock when kernel exposes UCHE_TRAP_BASE
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Fixes: 4b1b4ee10c ("freedreno,tu: Read and pass to compiler uche_trap_base)
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35010>
2025-05-15 22:27:17 +00:00
Yinjie Yao
089e2cb6f9 radeonsi: Disable av1 cdef_channel_strength for VCN4
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VCN4 hardware doesn't support this feature, it can only be supported in VCN5.

Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35004>
2025-05-15 18:52:08 +00:00
Seán de Búrca
e4d895f0e1 rusticl: fix build with clippy driver
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35002>
2025-05-15 09:35:17 -07:00
Seán de Búrca
35af55a2a7 rusticl: replace map_or(false, f) with is_some_and(f)
A new clippy lint fails on this pattern, causing build errors on
versions >= 1.84.0. `is_some_and()` is stable from 1.70.0.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35002>
2025-05-15 09:35:08 -07:00
José Roberto de Souza
bca12800aa iris: Restrict platforms that needs Wa_1604061319
It was being applied even to platforms that don't require it.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34988>
2025-05-15 15:25:12 +00:00
Corentin Noël
6c1c116a0f virgl: Avoid possible double free when destroying the hw resource
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When a resource is un-referenced, the reference count is decremented,
and intentionally no lock is acquired. This can result in the following
race condition when a resource is created from a handle:

```
[Thread] Operation
[0] Create resource from handle for the first time, refcount set to 1
[0] resource is unreferenced, refcount is decremented to 0 (intentionally
    no mutex is locked)
[0] before entering virgl_hw_res_destroy to lock
    virgl_drm_winsys::bo_handles_mutex the thread yields
[1] Create resource from handle pulls the resource from
     virgl_drm_winsys::bo_handles, refcount is incremented to 1
[1] resource is unreferenced, refcount is decremented to 0
[1] Enter virgl_hw_res_destroy,
[1] acquire the lock on virgl_drm_winsys::bo_handles_mutex
[1] check reference count to be 0, yes -> the resource is destroyed
[1] release the lock on virgl_drm_winsys::bo_handles_mutex
[0] Enter virgl_hw_res_destroy,
[0] acquire the lock on virgl_drm_winsys::bo_handles_mutex
[0] Here the res pointer already points to freed memory
[0] check reference count to be 0, yes -> the resource is destroyed (again!)
double free or corruption (!prev)
```

To work around this race condition, keep track of the number of times
the resource was pulled from virgl_drm_winsys::bo_handles to see whether
it has to be kept alive despite the reference count being zero.

This can be reproduced with the `spec@ext_image_dma_buf_import@ext_image_dma_buf_import-refcount-multithread`
piglit test.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34809>
2025-05-15 10:38:13 +00:00
Mary Guillemard
0bb9df9d33 pan/lib: Make pan_shader_get_compiler_options not GENX
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34895>
2025-05-15 10:40:57 +02:00
Mary Guillemard
7158f2eb8b pan/lib: Make pan_shader_compile not GENX
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34895>
2025-05-15 10:40:47 +02:00
Eric Engestrom
2bc7130808 r300/ci: switch radeon.ko jobs to common kernel (6.13.7)
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Now that it is possible to have more than one initrd, let's switch to
the common b2c kernel which requires two additional initrds:

 * The GPU initrd which contains amdgpu, i915, nouveau, radeon, and xe,
   along with their necessary firmware
 * The depmod initrd which contains what's necessary to modprobe the
   modules of the GPU initrd

Since the GPU initrd is huge (73 MB), let's reduce the size by dropping
all the firmware that is not related to AMD.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34881>
2025-05-14 23:06:42 +00:00
Marek Olšák
3fd2bdd285 radeonsi: move si_gs_output_info into si_temp_shader_variant_info
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Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
97357e721d radeonsi: add struct si_temp_shader_variant_info
This contains all shader info that's used during compilation,
but is never used after compilation.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
53cd29d946 radeonsi: move shaders args initialization into its own file
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
af8c4f19ab radeonsi: move shader variant info and spi_ps_input_ena code into its own file
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
2e8cac328a radeonsi: move si_nir_mark_divergent_texture_non_uniform to its own file
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
deda05e2b7 nir: move nir_lower_color_inputs into radeonsi
it's the only user

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
70aa58cc95 radeonsi: move shader info structures into new file si_shader_info.h
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
5389a3736f radeonsi: move NIR passes from si_shader.c into their own files
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
e478410466 radeonsi: inline shader_info in si_shader_info, keep only what's used
This reduces the si_shader_info size by 244 B.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
dc5e0e2b73 radeonsi: rename num_stream_output_components -> num_gs_stream_components
it's not for streamout

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00