Commit graph

123936 commits

Author SHA1 Message Date
Jason Ekstrand
d011fbde5c nir: Use a switch statement in nir_handle_add_jump
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5101>
2020-05-19 17:21:23 +00:00
Jason Ekstrand
8c87082c94 nir: Validate jump instructions as an instruction type
This has the downside of putting block successor validation in two
places that are a bit further apart.  However, handling them as a
special case makes the code more confusing than needed.  At least two
different people have not noticed that we don't have jump instruction
validation in the last week or two and added it.  Being able to search
for validate_jump_instr is useful.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5101>
2020-05-19 17:21:23 +00:00
Samuel Pitoiset
0fb3dc8d10 radv/aco: enable storageInputOutput16 on GFX9+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
cc1a1da8ab aco: fix off-by-one error with 16-bit MTBUF opcodes on GFX10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
1647e098e9 aco: implement 16-bit interp
For 16-bit bank LDS (ie. Kabini/Stoney) we need a slightly different
path. It's completely untested though because I don't have these
chips but according to vkpipeline-db the generated assembly seems fine.

Note that 16-bit I/O is currently only exposed on GFX9+ for both
compiler backends.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
bbbb4057e6 aco: emit v_interp_*_f16 instructions as VOP3 instead of VINTRP
This adds a separate emission path in the assembly for the 16-bit
interp instructions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
34f2c4dc6a aco: validate v_interp_*_f16 as VOP3 instructions instead of VINTRP
16-bit interp instructions are considered VINTRP by the compiler
but they are emitted as VOP3 by the assembler.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
3fba5bb9cc aco: implement 16-bit vertex fetches with tbuffer_load_format_d16_*
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
7ffd394605 aco: implement 8-bit/16-bit mov's with p_create_vector
ACO doesn't lower 8-bit/16-bit mov's in NIR.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2997
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
860b4d16f4 aco: allow to load/store 16-bit values in VMEM for tess and geom
We only have to adjust some assertions to allow storing/loading
16-bit values.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
9bd3b67163 aco: convert 16-bit values before exporting MRTs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Samuel Pitoiset
462a5fe6f4 aco: store 16-bit temporary outputs as v2b
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
2020-05-19 17:05:05 +00:00
Emmanuel Gil Peyrot
a3fb064e00 Expose EGL_KHR_platform_* when EXT is supported
On EGL 1.4, one had to check for the existence of EGL_EXT_platform_base
before querying the eglGetPlatformDisplayEXT() and
eglCreatePlatformWindowSurfaceEXT() symbols, to then use them if the
EGL_EXT_platform_* extension for the given platform was exposed.

Since EGL 1.5, the platform functionality was made core, which means we
can obtain the symbols unconditionally, but we can't know the EGL
version before having created a display, at which point we've already
done a platform selection by passing an EGLNativeDisplay.  The
EGL_KHR_platform_* extensions thus are used by clients to know whether
it's safe or not to dlsym() the EGL 1.5 symbols.

This commit adds those extensions when the given platform is enabled.

Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5052>
2020-05-19 16:41:54 +00:00
Alyssa Rosenzweig
52d6b4d6c0 pan/decode: Fix min/max_tile_coord mixup
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5099>
2020-05-19 16:24:49 +00:00
Alyssa Rosenzweig
deb78eec1b pan/decode: Use a page table for tracking mmaps
We create a hash table mapping GPU va's to mmap structures, such that
searching for a mapped address is effectively O(1) rather than O(N) to
the number of mapped entries as with the previous linked list approach.
This is a memory-time tradeoff, but the speed-up is tracing is notable.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5099>
2020-05-19 16:24:49 +00:00
Rob Clark
3c355f1ae8 freedreno/ir3/validate: add checking for types and opcodes
For cases where instructions have a src and/or dst type, validate that
it matches the src/dst register types.  And for cases where there are
different opcodes for half vs full, validate that the opcode matches.

Now that we maintain this properly throughout the stages of the ir, we
can drop the fixups from the RA pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
f484d63617 freedreno/ir3: add helpers to deal with src/dst types
Add some helpers to properly maintain src/dst types, and in the cases
where opcode depends on src or dst type, maintain that as well.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
3561d34fff freedreno/ir3: add simple validate pass
We can add to this as we notice other things that are worth validating
between ir3 passes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
554f3d54ca freedreno/ir3: fix mismatched wrmask for overlapping VS inputs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
16cd232dbc freedreno/ir3/cp: fix cmps folding
When we start doing cp iteratively, we hit the case that we've already
`cmps.s.*` into a `cmps.s.ne p0.x, ...`..  when we try to do that again
we can invert the logic condition.  So check specifically the condition
to prevent this.

TODO we could maybe be more clever about this to combine conditions.
But why isn't that happening in nir?  For example, see
dEQP-GLES31.functional.ssbo.layout.single_basic_array.packed.bool

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
39de27d3b9 freedreno/ir3/print: print cat2 condition
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
7b86b5ed7d freedreno/ir3: fix immed type in create_addr0()
We can also remove a bunch of manual src/dst flag munging, since the
instruction builders handle this automatically now.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
3474ba53b5 freedreno/ir3/cf: handle multiple cov's properly
There can be multiple (for ex.) f32f16's from a single source, in
particular appearing in different blocks.  We need to update all uses
of the src which had conversion folded in, not all the uses of the
individual cov.  Also, to avoid invalidating the ssa use info that was
gathered at the beginning of the pass, don't actually eliminate the
cov, but instead change it to a simple mov that the cp pass can gobble
up.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
3db5d146e9 freedreno/ir3: fix mismatched flags on split
We have to fixup the meta:split half flag, because `ir3_split_dest()` is
called before we fixup the dest type.  But we should fixup both the
split src and dest, as well as the thing it is splitting.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
b24b6a8365 freedreno/ir3/group: fix for half-regs
If we're inserting a mov to resolve a conflict between meta:collect's
(ie. for .zyx type swizzles, etc), we should use the correct precision.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
fcfe5eff63 freedreno/ir3: make input/output iterators declare cursor ptr
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
c1d33eed41 freedreno/ir3: make foreach_ssa_src declar cursor ptr
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
65f604e3b3 freedreno/ir3: make foreach_src declare cursor ptr
To match how the newer iterators work.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
599fd861d4 freedreno/ir3: be iterative
It does pick up a few more cf/cp opportunities, according to sharder-db.
But don't think it will be measurable.

But this will allow some future simplification to cp by pulling out it's
internal iteration.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
b828929ac9 freedreno/ir3: move where we preserve binning pass inputs
For a6xx, since we use same VBO state for binning and VS, we need to
preserve potentially unused inputs.  This needs to be done before DCE.
So move it before we add earlier DCE passes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
d0cfc06a2c freedreno/ir3: add IR3_PASS() macro
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
c9e5605720 freedreno/ir3/postsched: report progress
Or do the easy thing and claim we always changed something.  It is kinda
hard and not worth the effort to determine for real.

Also rip out unused error handling.  This pass should never fail.  And
we weren't even actually checking the return.

And while we're at it, switch over to taking the 'struct ir3 ir*`
instead of ctx, to standardize with the other passes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
c953794cd6 freedreno/ir3/legalize: report progress
It always does something.  Just return true for IR3_PASS()

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
c3630c9d29 freedreno/ir3/group: report progress
Not iterative, but this will let IR3_PASS() macro know if there are any
changes to print.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
721147a05d freedreno/ir3/deps: report progress
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
e4ecfde2dd freedreno/ir3/cp: report progress
Later when we do this pass iteratively, we can drop some of the internal
iteration and just rely on this pass getting run until there is no more
progress.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
372e466301 freedreno/cf: report progress
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
b6d121502d freedreno/ir3/dce: report progress
Eventually we'll pull the iteration out of the pass itself, but the
first step is to just report progress.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
9beb2baaff freedreno/ir3: juggle around ir3_debug_print()
In a later patch, this will get folded into an IR3_PASS() macro, at
least for most passes.  But to do that, it is better to standardize
on printing the ir3 after the pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Rob Clark
947aa23eff freedreno/ir3: remove Sethi-Ullman numbering pass
We haven't used this for a while.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5048>
2020-05-19 16:06:17 +00:00
Samuel Pitoiset
0ceb56a531 radv: fix missing break in radv_GetPhysicalDeviceProperties2()
Fixes: 57e796a12a ("radv: Implement VK_EXT_custom_border_color")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5097>
2020-05-19 15:51:14 +00:00
Rhys Perry
bcb0038c83 aco: fix disassembly with LLVM 11
SymbolInfoTy was modified in LLVM 11. It is also in MCDisassembler.h now
and we don't have to duplicate it anymore.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5060>
2020-05-19 14:18:26 +01:00
Gert Wollny
ff98b1b51a r600/sfn: Fix printing ALU op without dest
e.g. GROUP_BARRIER doesn't have a dest.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:14 +00:00
Gert Wollny
1124c3f1b6 r600/sfn: Don't reorder outputs by location
This was wrong, if anything it should be sorted by device_location, and NIR usually
provides this.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:14 +00:00
Gert Wollny
9f942a8e7c r600/sfn: Fix splitting constants that come from different kcache banks.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:14 +00:00
Gert Wollny
723ae8177e r600/sfn: Fix clip vertex output as possible stream variable
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
7ae4b7938e r600/sfn: SSBO: Fix query of dest components
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
7c247f505c r600/sfn: use the per shader atomic base
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
cd2d7966ac r600/sfn: Add support for texture_samples
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00
Gert Wollny
358b0a57bf r600/sfn: support indirect sampler buffer reads.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5085>
2020-05-19 07:52:13 +00:00