Commit graph

59078 commits

Author SHA1 Message Date
Paul Berry
caf9cef7ee i965/fs: Remove bogus field prog_data->dispatch_width.
Despite the name, this field wasn't being set to the dispatch width at
all; it was always 8.  The only place it was used was that the
constant buffer read length was aligned to it, and as far as I can
tell from the docs, there is no need to align this value to the
dispatch width; aligning it to a multiple of 8 is sufficient.  So I've
just replaced it with a hardcoded 8.

v2: In gen6_wm_state, use brw->wm.base.push_const_size for consistency
with VS and GS state upload.

Reviewed-by: Eric Anholt <eric@anholt.net>
2013-10-15 11:34:30 -07:00
Paul Berry
2910a82eb4 glsl: Add new GLSL 1.50 constants.
This patch populates the following built-in GLSL 1.50 variables based
on constants stored in ctx->Const:

- gl_MaxVertexOutputComponents
- gl_MaxGeometryInputComponents
- gl_MaxGeometryOutputComponents
- gl_MaxFragmentInputComponents
- gl_MaxGeometryTextureImageUnits
- gl_MaxGeometryOutputVertices
- gl_MaxGeometryTotalOutputComponents
- gl_MaxGeometryUniformComponents
- gl_MaxGeometryVaryingComponents

On i965/gen7, fixes all Piglit tests in "spec/glsl-1.50/built-in
constants/*" except for gl_MaxCombinedTextureImageUnits and
gl_MaxGeometryUniformComponents.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2013-10-15 11:34:30 -07:00
Eric Anholt
705a90e304 i965: Move the common binding table offset code to brw_shader.cpp.
Now that both vec4 and fs are dynamically assigning offsets, a lot of the
code is the same.

v2: Avoid passing around the next offset through the class.  (Review by
    Paul)

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-15 10:18:50 -07:00
Eric Anholt
d395485e1d i965/vec4: Dynamically assign the VS/GS binding table offsets.
Note that the dropped comment in brw_context.h is mostly (better written)
in brw_binding_table.c as well.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-15 10:18:48 -07:00
Eric Anholt
4e5306453d i965/fs: Dynamically set up the WM binding table offsets.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-15 10:18:45 -07:00
Eric Anholt
3c9dc2d31b i965: Make a brw_stage_prog_data for storing the SURF_INDEX information.
It would be nice to be able to pack our binding table so that programs
that use 1 render target don't upload an extra BRW_MAX_DRAW_BUFFERS - 1
binding table entries.  To do that, we need the compiled program to have
information on where its surfaces go.

v2: Rename size to size_bytes to be more explicit.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-15 10:18:42 -07:00
Eric Anholt
5463b5bbbd i965: Always have the struct gl_program * in the backend visitor.
vec4 already had it, so put it in the FS, too.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-15 10:18:40 -07:00
Eric Anholt
2788798388 i965: Drop a couple of unused defines.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-15 10:18:37 -07:00
Eric Anholt
fbc088ee49 i965: Remove dead arguments from prog_data_compare.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-15 10:18:32 -07:00
Alexander von Gluck IV
ce8eadb6e8 build: remove forced -fno-rtti
* As discussed on the mailing list,
  forced no-rtti breaks C++ public
  API's such as the Haiku C++ libGL.so
* -fno-rtti *can* be still set however
  instead of blindly forcing -fno-rtti,
  we can rely on the llvm-config
  --cppflags output.
  If the system llvm is built without
  rtti (default), the no-rtti flag will be
  present in llvm-config --cppflags
  (which we pick up on)
  If llvm is built with rtti
  (REQUIRES_RTTI=1), then -fno-rtti is
  removed from llvm-config --cppflags.
* We could selectively add / remove rtti
  from various components, however mixing
  rtti and non-rtti code is tricky and
  could introduce missing symbols.
* This needs impact tested.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2013-10-14 23:00:55 -05:00
Matt Turner
7a2e9f9778 configure.ac: Don't check for awk, grep, nm.
Not used since d53901c6.
2013-10-14 11:13:09 -07:00
Matt Turner
9ae1f0bad6 configure.ac: Don't check for cross compiling.
Dead since c845140a.
2013-10-14 11:13:09 -07:00
Matt Turner
a5ec01fb1b i965: Don't copy prop source mods into instructions that can't take them. 2013-10-14 11:13:09 -07:00
Constantin Baranov
53904c64da mesa: Add missing switch break in invalidate_framebuffer_storage()
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70411
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2013-10-14 09:06:07 -06:00
Grigori Goronzy
e6c2afa9ce st/vdpau: add format conversions for GetBitsYCbCr
Add simple plain C routines for NV12<->YV12 and YUYV<->UYVY
conversions. The NV12->YV12 conversion is commonly used, for instance
by VLC.

Reviewed-by: Christian König <christian.koenig@amd.com>
2013-10-13 20:09:38 +02:00
Grigori Goronzy
f250fd59c4 radeon: use staging for mapping linear textures
Textures that likely reside in VRAM, are mapped for reading and
don't require direct mapping should be staged into GTT, to avoid bad
performance. This fixes readback performance of VDPAU surfaces.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2013-10-13 20:09:34 +02:00
Grigori Goronzy
270fab5164 radeon/uvd: use PIPE_BIND_LINEAR for video surfaces
This new bind flag forces linear storage, but does not have other
side effects like R600_RESOURCE_FLAG_TRANSFER.

Reviewed-by: Christian König <christian.koenig@amd.com>
2013-10-13 20:09:02 +02:00
Vincent Lejeune
6e51c2a941 radeonsi: Allow Sinking pass to move preloaded const/res/sampl
This fixes a crash in Unigine Heaven 3.0, and probably in some
others apps.
2013-10-13 20:03:42 +02:00
Vadim Girlin
453ea2d309 radeonsi: pass alpha_ref value to PS in the user sgpr
Currently it's hardcoded in the shader, so every change requires
compilation of the shader variant, killing the performance
in Serious Sam 3 and probably other apps.

This patch passes alpha_ref in the user sgpr and removes it from
the shader key.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-10-13 20:03:35 +04:00
Vadim Girlin
10ddeb910b r600g: fix tgsi_op2_s with trans-only instructions
This fixes the issue when dst and src is the same reg and operation on one
channel overwrites the source for other channels, e.g.:

UMUL TEMP[2].xyz, TEMP[0].xyzz, TEMP[2].xxxx

In this example the result of the operation on channel x is written in
TEMP[2].x and then used as a second source operand for channels y and z
instead of original value in TEMP[2].x.

This patch stores the results in temp reg and moves them to
dst after performing operation on all channels.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=70327

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-10-13 20:03:35 +04:00
Kenneth Graunke
8958741e5a i965: Merge intel_context.h into brw_context.h.
v2: Keep the random 32-bit only version of memcpy, since Ian says I
    can't delete it without data proving it isn't useful.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
3dda3ebec9 i965: Delete our copy of likely/unlikely macros.
brw_context.h includes imports.h which includes compiler.h which already
defines these.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
67601da24c mesa: Move U_FIXED/S_FIXED macros from i965 to macros.h.
These make it easy to convert a floating point value to a fixed point
numbers.  The second parameter is the number of bits used for the
fractional part of the number.

It looks like core Mesa has similar functions already, but none that
allows an arbitrary number of fractional bits.  The more generic version
is probably useful to everyone.

r600g apparently has an identical copy of the S_FIXED macro, but doesn't
include this file.  I'm not sure what to do about that, so I'm just
going to leave it for now.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
1a82081db6 mesa: Move ROUND_DOWN_TO() macro from i915/i965 to macros.h.
This seems generally useful, so it may as well live in core Mesa.

In fact, the comment for ALIGN() in macros.h actually says to "see also"
ROUND_DOWN_TO, which...was in a driver somewhere.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
50c9f04c5f i965: Move need_workaround_flush = true to intel_batchbuffer_init.
intel_batchbuffer_init() sets up initial batchbuffer state; it seems
like a reasonable place to initialize this flag.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
ddc8decdb2 i965: Move DriverFlag initialization to brw_init_state().
Configuring which dirty flags we want sounds like a job for
brw_init_state().

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
ba0cc79ab9 i965: Merge intelInitContext into brwCreateContext.
The split here was completely arbitrary.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
90d52d2c76 i965: Move viewport driver hook setup to brw_init_driver_functions.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
f118fc26e1 i965: Make brwInitFunctions take brw_context rather than intel_screen.
It actually just wants generation checking, and brw->gen is the usual
way of doing that.  In the future, we'll also want to check brw->hw_ctx,
which isn't available from the screen.

While we're changing the function signature, convert from camel case to
our usual naming conventions.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
9848a42287 i965: Merge intelInitFunctions() and brwInitFunctions().
They do exactly the same thing.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
0138fd4610 i965: Merge intel_context.c into brw_context.c.
There's no point in having two files for context functions.  This patch
moves the code from intel_context.c into brw_context.c unmodified
(other than whitespace fixes).

Right now, this looks silly; future patches will merge functions and
tidy things up.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
8d315b2583 i965: Move memset of TextureFormatSupported to brw_init_surface_formats.
brw_init_surface_formats already sets entries in TextureFormatsSupported
to true; it may as well take care of initializing it to false too.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
fc5b865cec i965: Remove has_aa_line_parameters.
This flag is only used in one place, and is only set on one platform.
Just check for original Gen4 in the relevant function.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
220c1e5610 i965: Move state setup from brwCreateContext to brw_init_state().
This seems like a better place for it, and helps clean up
brwCreateContext (which is full of a lot of random stuff).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
d31b928b93 i965: Remove the brw_context::emit_state_always flag.
This was always set to false, and is only used for debugging.
To enable it, simply change the if (0) block and recompile.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
02b632d8e8 i965: Move hardware feature flags to brw_device_info.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:44 -07:00
Kenneth Graunke
ea890c031d i965: Move device quirks to brw_device_info.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:43 -07:00
Kenneth Graunke
d76f6c7ae4 i965: Move hardware limits to brw_device_info.
Since each kind of device has its own brw_device_info structure, we can
simply store the URB and thread limits there.  This eliminates all the
large if-ladders, and simplifies the context initialization code quite a
bit.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2013-10-13 00:10:43 -07:00
Kenneth Graunke
afe05e7193 i965: Replace some intel_screen fields with brw_device_info references.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:43 -07:00
Kenneth Graunke
9d490c172b i965: Delete the INTEL_SEPARATE_STENCIL override.
This option was useful during initial development, but it's been ages
since I've heard of anyone using it.  Plus, Gen7+ mandates separate
stencil, so it was really only useful on Sandybridge anyway.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:43 -07:00
Kenneth Graunke
6e9f427ed8 i965: Add a new brw_device_info structure.
The idea is that struct brw_device_info should store statically-known
information about hardware features.  Using the new family name in the
PCI ID table, we can easily grab the right structure.

This is basically the equivalent of intel_device_info in the kernel.

This patch also makes the new structure available from intel_screen, but
nothing uses it.  Right now, it looks very redundant with existing
fields, but that will change.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:43 -07:00
Kenneth Graunke
4a29b9a066 i965: Add the family name to the PCI ID table.
I removed this a while ago, since we never used it, but I'm finally
resurrecting the idea in the next commits.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:43 -07:00
Kenneth Graunke
8d4ecbccd6 i965: Remove #define name from PCI ID table.
Nothing uses the #define name, and it's not terribly useful - the
numerical ID serves the same purpose.  The only thing we could really do
with it is generate slightly prettier preprocessed code.  But who looks
at that?

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:43 -07:00
Kenneth Graunke
90511faedd i965: Pull most driconf option handling into a centralized function.
Using a helper function clarifies the context initialization code.

I would've liked to completely centralize it, but moving the optionCache
code from intelInitExtensions into here would've required setting flags
in the context, which seems like a waste.

v2: Rebase for the introduction of disable_derivative_optimization.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:43 -07:00
Kenneth Graunke
0fb525b87c i965: Move a bunch of code from intelInitContext to brwCreateContext.
Now that intelInitContext isn't shared between i915 and i965, the split
is fairly arbitrary.  This patch moves a bunch of the basic context
creation and generation checking code up to the top-level function
(and slightly earlier).

More will follow.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:43 -07:00
Kenneth Graunke
a25caad9e4 i965: Update the comment about viewport hacks.
It wasn't clear that this was necessary for EGL, or why.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:43 -07:00
Kenneth Graunke
832bcc3613 i965: Pull out INTEL_DEBUG handling into new intel_debug.[ch] files.
Now that there isn't an intel_context structure, the split between
brw_context.[ch] and intel_context.[ch] is rather awkward and arbitrary.
Removing intel_context.[ch] seems desirable, but not everything really
belongs in brw_context.[ch], either.

Moving INTEL_DEBUG handling into separate intel_debug.[ch] files should
make them relatively easy to find.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:43 -07:00
Kenneth Graunke
3f7b4e5d04 i965: Rename brwCreateContext's error parameter to dri_ctx_error.
"error" is a very generic name.  dri_ctx_error is the name used in
intelInitContext(), which is more specific.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-13 00:10:43 -07:00
Eric Anholt
95bd8a332d dri: Move i965-specific context flag logic to dri common.
Nobody else yet can do a forward context anyway, but others should be able
to do debug contexts, and those would have just had no effect currently.
2013-10-13 00:10:43 -07:00
Stephane Marchesin
5ceeeb360e i915g: Fix assert
Now that we support start, assert on start + num < max samplers

Reported by xexaxo
2013-10-12 11:40:54 -07:00