Commit graph

221897 commits

Author SHA1 Message Date
Alyssa Rosenzweig
d7283a25d7 jay: do not copyprop ballots globally
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Alyssa Rosenzweig
5828b66b65 jay: convert to LCSSA
for correctness with loops.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Alyssa Rosenzweig
fed6b7bea0 jay: drop UGPR->UMEM spilling path
This is totally broken now that we have a physical CFG for UGPRs. And of course,
UGPRs generally were totally broken without the physical CFG. So I conclude
this code basically never worked. Which is good because it was also basically
always dead too. Just delete it and replace with a clear error message, instead
of pretending it works and either randomly splatting validation or just straight
up miscompiling silently or whatever.

We might need an alternative UGPR->GPR spill path some day but that day is not
today.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Alyssa Rosenzweig
ad040f2fbb jay: introduce a physical control flow graph
Consider:

   u0 = foo()

   if (divergent) {
      u0 = bar()
      r0 = baz(u0)
   } else {
      r0 = quux(u0)
   }

Logically, this is fine, there is no interference between bar() and u0. But
physically, both sides of the if execute so the bar() write to u0 overwrites the
variable the else reads. So this is a miscompile.

The solution is to model the extra edges in the physical control flow graph,
which lives next to the existing logical control flow graph. Liveness for UGPRs
now follows the physical CFG, while liveness for GPRs continues to follow the
logical CFG. That models the interference properly, while still allowing phis to
work as before (since phis writing UGPRs follow uniform bits of control flow
that are necessarily critical edge free for the same reason the logical CFG is).

Because our RA copies shuffled registers back at block ends (following
Colombet), there's no issue with live range splits here (unlike aco which
inserts phis for this case and then needs to worry about critical edges around
those phis).

There might still be an extremely-challenging-to-hit bug here with UGPR spilling
which I need to think more about. It might be fine as-is? Not convinced though.
But this is big enough and strictly less broken than what we have right now and
the full solution will build on this, so here we are.

Fixes artefating in SuperTuxKart and Celestia knows what else.

Totals:
Instrs: 2770938 -> 2771269 (+0.01%); split: -0.00%, +0.02%
CodeSize: 40133712 -> 40138480 (+0.01%); split: -0.01%, +0.02%

Totals from 158 (5.97% of 2647) affected shaders:
Instrs: 514523 -> 514854 (+0.06%); split: -0.02%, +0.09%
CodeSize: 7603040 -> 7607808 (+0.06%); split: -0.03%, +0.09%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Alyssa Rosenzweig
fadb826515 jay/opt_propagate: disable f64 opts for now
could be done but would need more work.

No stats change.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Alyssa Rosenzweig
8e4145948f jay/opt_propagate: fold uflag copies
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Alyssa Rosenzweig
b9f8f2477e jay: inline jay_control()
This accessor is more opaque imho.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Alyssa Rosenzweig
978d20e5fe jay: drop jay_exec_mask
this strategy is panning out nicely.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Alyssa Rosenzweig
238c4ecf40 jay: fix 16-bit predicated compares
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Alyssa Rosenzweig
0bd4f1b874 jay: consolidate file prefixes
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Alyssa Rosenzweig
15365f8ea2 jay: jayize swsb print
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Alyssa Rosenzweig
fccd68625c jay: shrink stack allocation
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Kenneth Graunke
0a5c748e19 jay: Don't forget UACCUM!
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Alyssa Rosenzweig
3308626e12 jay/assign_flags: don't burn a flag for ballots
Increases GPR pressure somehow but it's obviously the right thing to do.

SIMD16:

   Totals:
   Instrs: 2767536 -> 2767381 (-0.01%); split: -0.01%, +0.00%
   CodeSize: 44323392 -> 40075680 (-9.58%); split: -9.58%, +0.00%

   Totals from 2147 (81.11% of 2647) affected shaders:
   Instrs: 2704498 -> 2704343 (-0.01%); split: -0.01%, +0.00%
   CodeSize: 43477568 -> 39229856 (-9.77%); split: -9.77%, +0.00%

SIMD32:

   Totals:
   Instrs: 4731031 -> 4746775 (+0.33%); split: -0.33%, +0.67%
   CodeSize: 76609152 -> 70004080 (-8.62%); split: -8.68%, +0.06%
   Number of spill instructions: 50110 -> 50187 (+0.15%); split: -0.00%, +0.16%
   Number of fill instructions: 51341 -> 51804 (+0.90%); split: -0.00%, +0.91%

   Totals from 2136 (80.70% of 2647) affected shaders:
   Instrs: 4666677 -> 4682421 (+0.34%); split: -0.34%, +0.67%
   CodeSize: 75735136 -> 69130064 (-8.72%); split: -8.78%, +0.06%
   Number of spill instructions: 50108 -> 50185 (+0.15%); split: -0.00%, +0.16%
   Number of fill instructions: 51339 -> 51802 (+0.90%); split: -0.00%, +0.91%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Alyssa Rosenzweig
2c77717e5c jay/assign_flags: don't burn a null flag
SIMD32:

   Totals from 423 (15.98% of 2647) affected shaders:
   Instrs: 740042 -> 736360 (-0.50%); split: -1.25%, +0.75%
   CodeSize: 11984176 -> 11925888 (-0.49%); split: -1.23%, +0.74%
   Number of spill instructions: 4675 -> 4676 (+0.02%)
   Number of fill instructions: 5698 -> 5684 (-0.25%); split: -0.28%, +0.04%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Alyssa Rosenzweig
796886f72c jay/assign_flags: refactor for next commit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41215>
2026-04-28 23:13:50 +00:00
Yiwei Zhang
6b8d934407 CODEOWNERS: update owners for Android components
Some checks are pending
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41246>
2026-04-28 21:42:34 +00:00
Alyssa Rosenzweig
0c49738211 nir/opt_reassociate: fix exactness bug
For an inexact-associative operation (fadd or fmul), can_reassociate ensures the
root of the chain is inexact to allow reassociating. However, build_chain just
checks for opcodes to match up after, although we do sum up exactness across the
chain. Although an Effort Was Made, it still seems incorrect to reassociate

   %3 = fadd! %0, %1
   %4 = fadd %3, %2

to instead be (ex.)

   %3 = fadd! %0, %2
   %4 = fadd! %3, %1

Closes: #14418
Fixes: e0b0f7e73c ("nir: add ALU reassocation pass")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41162>
2026-04-28 21:14:56 +00:00
Yiwei Zhang
2b6db10f38 android_stub: drop cutils/properties dependency
Reviewed-by: Dhruv Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41222>
2026-04-28 20:47:36 +00:00
Yiwei Zhang
8504922dda egl/android: use ndk api __system_property_get
Reviewed-by: Dhruv Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41222>
2026-04-28 20:47:36 +00:00
Yiwei Zhang
d147817599 util/os_misc: use ndk api __system_property_get
__system_property_get is available since api level 3. There was a glitch
back in Android L, but the complete official supported was added back to
NDK immediately after the removal, and was patched into the same api
level 21. So it's safe to say this api is available all the time.
Our helper does not have a default prop value, so __system_property_get
is a better fit.

Reviewed-by: Dhruv Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41222>
2026-04-28 20:47:36 +00:00
Faith Ekstrand
11399b15e0 pan/bi: Improve swizzle propagation
Instead of only propagating when we have a full word, always attempt to
find a propagation, only considering the bytes actually consumed by the
instruction.  This is especially important for v2i8 sources.

Reviewed-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41247>
2026-04-28 20:27:16 +00:00
Mike Blumenkrantz
2336149c90 lavapipe: KHR_device_address_commands
Some checks are pending
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40571>
2026-04-28 19:09:03 +00:00
squidbus
76a3951e03 kk: Fix issues with maximal reconvergence
If a loop has only one break case, Metal appears to re-order it to after
the loop ends, which goes against the expected behavior for reconvergence.
Work around this by putting the break statement into a trivial, always-true
runtime conditional, when maximal reconvergence is requested.

Fixes dEQP-VK.reconvergence.maximal.compute.nesting*

Reviewed-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41229>
2026-04-28 18:50:36 +00:00
Georg Lehmann
26ec32dada intel/nir_opt_peephole_ffma: fix fp_math_ctlr for modifiers
If abs/neg don't preserve nan/inf/sz, the whole expressions won't.

Fixes: 1b0808adf3 ("intel/nir: Make ffma peephole optimization preserve fp_fast_math flags")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41101>
2026-04-28 18:26:58 +00:00
Tapani Pälli
bdaf8b6b39 anv: do not use resource barrier with split barriers
Fixes failing CTS tests using asymmetric and non-asymmetric (regular)
split barriers.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15310
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41237>
2026-04-28 18:07:37 +00:00
Yiwei Zhang
ad857ba7cd panvk: drop panvk_android_create_deferred_image
No need a separate helper anymore since
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41145.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41216>
2026-04-28 17:46:48 +00:00
Samuel Pitoiset
669d3915c6 radv: slightly rework initializing the default graphics state
Some checks are pending
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All these parameters are only used for graphics.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41136>
2026-04-28 17:06:42 +00:00
Samuel Pitoiset
461154fd5c radv: remove useless tracking about non-coherent RBs with secondaries
Either the rendering begins in the primary and the information is
already known, or if it begins in the secondary, non-coherent RBs
should already be flushed in EndCommandBuffer().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41136>
2026-04-28 17:06:42 +00:00
Samuel Pitoiset
bcd74a7af0 radv: add RADV_CMD_DIRTY_RAY_TRACING_PIPELINE
This seems cleaner than storing the last emitted ray tracing pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41136>
2026-04-28 17:06:42 +00:00
Samuel Pitoiset
20f7fba442 radv: add RADV_CMD_DIRTY_COMPUTE_PIPELINE
This seems cleaner than storing the last emitted compute pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41136>
2026-04-28 17:06:42 +00:00
Samuel Pitoiset
c7c2ce13ae radv: stop tracking the last emitted graphics pipeline
This shouldn't have any effects because there is a dirty bit and
binding the same graphics pipeline doesn't trigger it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41136>
2026-04-28 17:06:42 +00:00
Samuel Pitoiset
6af89db05c radv: rename RADV_CMD_DIRTY_PIPELINE to RADV_CMD_DIRTY_GRAPHICS_PIPELINE
This is really only used for graphics pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41136>
2026-04-28 17:06:42 +00:00
Samuel Pitoiset
75e5ba9a03 radv: simplify resetting pipeline state for ESO
Checking if there is a bound graphics pipeline should be enough to
reset the appropriate states. Also clear the dirty pipeline bit only
for graphics pipelines because it's not used for compute pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41136>
2026-04-28 17:06:42 +00:00
Samuel Pitoiset
d1a428606e radv: add missing VkMemoryRangeBarriersInfoKHR from DAC
This is used to declare barrier dependencies for an addr range
(because no VkBuffer with DAC).

This fixes new dEQP-VK.api.device_address.misc.memory_range_barrier.

Fixes: a97c889a7b ("radv: implement VK_KHR_device_address_commands")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41198>
2026-04-28 16:39:26 +00:00
Samuel Pitoiset
ce60e18bce vulkan: add missing VkMemoryRangeBarriersInfoKHR support
This has been introduced by VK_KHR_device_address_commands and we
missed it completely.

Backport-to: 26.1
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41198>
2026-04-28 16:39:26 +00:00
Valentine Burley
7f6cd7f9aa tu: Fix D16 depth clear rounding mismatch in sysmem mode
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Different HW units (R2D blit engine, 3D pipeline, etc.) apply subtly
different F32->UNORM16 rounding to the same float clear value, causing
cleared pixels to fail subsequent depth comparisons.

Pre-quantize D16 clear values to exact UNORM16 precision before passing
to any HW path. The GMEM path is unaffected as it already converts to
integer in pack_blit_event_clear_value().

Fixes dEQP-EGL.functional.image.modify.renderbuffer_depth16_renderbuffer_clear_depth
with zink and ANGLE when sysmem is used.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41196>
2026-04-28 13:56:36 +00:00
Georg Lehmann
599a52174b nir: disable fp class analysis for 64bit transcendentals
Some backends have terrible precision for these fp64 opcodes, so don't try to
do anything clever.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15334
Fixes: 5a298f3560 ("nir: rewrite fp range analysis as a fp class analysis")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41206>
2026-04-28 13:26:42 +00:00
Erik Faye-Lund
92581c7f02 util/format: verify subsampling in name
This checks that the subsampling is specified in the name of the
format.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41151>
2026-04-28 12:44:33 +00:00
Erik Faye-Lund
c1934ddf65 util/format: mark subsampled RGB formats as actually subsampled
This applies to all subsampled layouts, including the planar ones.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41151>
2026-04-28 12:44:33 +00:00
Erik Faye-Lund
22cf4f6742 util/format: make subsampling explicit
Instead of parsing the format name, let's make the subsampling explicit
in the format table.

This fixes the reported subsampling for Y8U8V8_420_UNORM_PACKED and
Y10U10V10_420_UNORM_PACKED, which didn't match because of the _PACKED
suffix.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41151>
2026-04-28 12:44:33 +00:00
Erik Faye-Lund
36fc68ffa1 util/format: make Y8_UNORM an alias of Y8_400_UNORM
The definiton of Y8_UNORM and Y8_400_UNORM are already identical, with
the only real difference being that pipe_format_to_chroma_format() does
not return R8 for Y8_UNORM. But Y8_UNORM is only used by freedreno,
the intel drivers and virgl, none of which doesn't even call
pipe_format_to_chroma_format() in the first place, so this shouldn't
matter.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41151>
2026-04-28 12:44:32 +00:00
Nick Hamilton
b205c7d592 pvr: Enable shaderImageGatherExtended
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Enables the shaderImageGatherExtended feature and sets the
{min,max}TexelGatherOffset physical device properties.

The properties are queried via Zink and are expected to be non-zero.

Signed-off-by: Nick Hamilton <nick.hamilton@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40687>
2026-04-28 12:04:09 +01:00
Simon Perretta
57791c4a99 pco: track how many tg4/raw sample comps are needed
Rather than always emitting and swizzling 16 components for raw samples,
scale it by the number actually needed as defined by the selected tg4
channel/components.

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40687>
2026-04-28 12:04:03 +01:00
Nick Hamilton
b80a5f9b7d pco: fix clamping the array index when shaderImageGatherExtended is enabled
The array index value is a signed integer but the compiler was using
the unsigned version of the clamp helper function meaning the value
was not been clamped to 0 when its value was < 0.

Fix the following deqp test cases when shaderImageGatherExtended is enabled
dEQP-VK.glsl.texture_gather.basic.2d_array.*
dEQP-VK.glsl.texture_gather.offset.*.2d_array.*
dEQP-VK.glsl.texture_gather.offset_dynamic.*.2d_array.*
dEQP-VK.glsl.texture_gather.offsets.*.2d_array.*

Fixes: 854563f0f8 ("pco: fully switch over to common smp emission code")
Signed-off-by: Nick Hamilton <nick.hamilton@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40687>
2026-04-28 12:03:51 +01:00
Simon Perretta
56b8dc92a9 pco: amend tg4 lowering
Use lower_tg4_offsets to take care of explicit offsets, and just swizzle
the texels in the order defined by textureGather*

Fixes: 46c9239c11 ("pvr, pco: initial texture gather support with gather sampler")
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40687>
2026-04-28 12:03:30 +01:00
Arjob Mukherjee
35f57a2739 pvr: increase value of maxPerStageDescriptorStorageBuffers
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Increase past the minimum required by the Vulkan Spec to fix tests. This
was needed due to Zink requirements which splits
`maxPerStageDescriptorStorageBuffers` between atomic buffers and
`MaxShaderStorageBlocks`.

Fixes the following GLES conformance tests:
  KHR-GLES31.core.compute_shader.resources-max
  KHR-GLES31.core.draw_indirect.advanced-twoPass-Compute-arrays
  KHR-GLES31.core.shader_image_load_store.advanced-sync-vertexArray
  KHR-GLES31.core.shader_image_load_store.basic-allTargets-store-cs
  KHR-GLES31.core.shader_image_load_store.basic-allTargets-store-fs
  KHR-GLES31.core.shader_storage_buffer_object.advanced-unsizedArrayLength-cs-int
  KHR-GLES31.core.shader_storage_buffer_object.basic-stdLayout_UBO_SSBO-case1-cs
  KHR-GLES31.core.shader_storage_buffer_object.basic-stdLayout_UBO_SSBO-case2-cs
  dEQP-GLES31.functional.draw_indirect.compute_interop.combined.drawelements_compute_cmd_and_data_and_indices
  dEQP-GLES31.functional.synchronization.in_invocation.ssbo_alias_overwrite
  dEQP-GLES31.functional.synchronization.in_invocation.ssbo_alias_write
  dEQP-GLES31.functional.synchronization.in_invocation.ssbo_atomic_alias_overwrite
  dEQP-GLES31.functional.synchronization.in_invocation.ssbo_atomic_alias_write
  dEQP-GLES31.functional.synchronization.inter_call.with_memory_barrier.ssbo_atomic_multiple_write_read
  dEQP-GLES31.functional.synchronization.inter_call.with_memory_barrier.ssbo_multiple_write_read
  dEQP-GLES31.functional.synchronization.inter_invocation.ssbo_alias_overwrite
  dEQP-GLES31.functional.synchronization.inter_invocation.ssbo_alias_write
  dEQP-GLES31.functional.synchronization.inter_invocation.ssbo_atomic_alias_overwrite
  dEQP-GLES31.functional.synchronization.inter_invocation.ssbo_atomic_alias_write

Backport-to: 26.0
Signed-off-by: Arjob Mukherjee <arjob.mukherjee@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41156>
2026-04-28 08:36:48 +00:00
Christian Gmeiner
7d59c62fde panvk: Wire up VK_EXT_conservative_rasterization on v11+
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Mali >= v11 has a Conservative Rast Mode field in DCD Flags 0 with
values Disabled and Over Estimate. Wire it to vk_runtime's
rasterization state and expose the extension on PAN_ARCH >= 11, with
caps restricted to overestimate only — HW has no underestimate value
and no overestimation-size granularity.

On v11-v13, degenerate triangles produce a wrong fragment w when
overestimate is enabled, so cull_zero_area is forced on alongside
the mode bit and degenerateTrianglesRasterized is reported as false.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41189>
2026-04-28 09:34:28 +02:00
Samuel Pitoiset
df3de4acbb ac,radv,radeonsi: replace mesh_fast_launch_2 by gfx_level checks
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41204>
2026-04-28 06:50:43 +00:00
Samuel Pitoiset
94ae99f16f radv: replace use_ngg_streamout by gfx_level checks
There is no way to enable/disable via debug options or so, it's only
used on GFX11+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41204>
2026-04-28 06:50:43 +00:00