Corbin Simpson
c60bdcf8a8
r5xx: Fix magic offsets for output fifo write masks.
...
Well, this sure explains a lot.
2008-05-19 00:00:08 -07:00
Corbin Simpson
2708d7f700
r5xx: Swap sources for CMP.
...
Follows the same pattern as the op on r3xx/r4xx. Thanks airlied.
2008-05-18 23:52:54 -07:00
Corbin Simpson
a6c38f2f64
r5xx: Fix typo of epic proportions.
2008-05-18 23:35:07 -07:00
Corbin Simpson
2225b9bdb0
r5xx: ALU/OUT fixups.
...
Lots of small changes. Intentionally breaks some tex stuffs.
2008-05-18 22:38:28 -07:00
Dave Airlie
bdfd5d95c5
r300: fixup US_OUT_FMT bits
2008-05-18 17:58:29 +10:00
Dave Airlie
126673261d
r500: you can have a single texcoord
2008-05-18 15:25:08 +10:00
Corbin Simpson
0910d9d4d6
r5xx: Add OPCODE_KIL.
2008-05-17 13:38:35 -07:00
Corbin Simpson
c57b3b1d2c
r5xx: Added OPCODE_DPH.
...
Like DP4, but with one swizzle change.
2008-05-17 12:45:46 -07:00
Corbin Simpson
6dd3c0ed96
r5xx: Fix FRC.
...
This makes tri-frc work.
(Remind me again why I'm allowed near a compiler, lawl.)
2008-05-17 09:27:35 -07:00
Corbin Simpson
16cc362f0b
r5xx: Fix SCS.
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Output instructions need to be marked OUT so they can write to the fifo.
Also, negation doesn't work with SWZ yet.
2008-05-17 07:12:38 -07:00
Corbin Simpson
c11a33fe76
r5xx: Add OPCODE_SWZ.
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It's so easy!
2008-05-17 07:12:37 -07:00
Corbin Simpson
d5aa421661
r5xx: Add OPCODE_SCS.
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It's disabled, though, because it doesn't work. I'll figure it out later...
2008-05-17 07:12:37 -07:00
Corbin Simpson
405ee871c5
r5xx: Adding more opcodes.
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EX2, FRC, LG2, SIN, RCP, and RSQ, if you care.
All of these except FRC are like COS. This pretty much rounds out the set of
opcodes which can be done in one ALU inst.
2008-05-17 07:12:37 -07:00
Corbin Simpson
0de02f1716
r5xx: First swing at OPCODE_COS.
2008-05-17 07:12:37 -07:00
Corbin Simpson
d8529d9b00
r5xx: Unbreak MAX and MIN.
...
Both of them had faulty copypasta.
2008-05-17 07:12:37 -07:00
Dave Airlie
5e075fb809
r500: set fragprog end to correct place
2008-05-17 13:31:14 +10:00
Alex Deucher
ba50c3fed3
r300: SC register naming cleanup
2008-05-17 10:40:47 +10:00
Alex Deucher
791c95230c
r500: write out the correct FP registers
2008-05-17 10:29:52 +10:00
Dave Airlie
d6333af7e9
r500: default rsunit swizzle like fglrx
2008-05-15 20:38:41 +10:00
Dave Airlie
9aa62c7238
r500: shift tex src properly
2008-05-15 18:40:07 +10:00
Dave Airlie
76f32499d2
r500: fixup r500 rs unit texture coordinate counting
2008-05-15 18:40:07 +10:00
Dave Airlie
a0bc6d2fb2
r500: remove some debugging
2008-05-15 18:40:07 +10:00
Dave Airlie
73af48fff5
r500: split output/pixel masks and emit in the correct places
2008-05-15 18:40:07 +10:00
Dave Airlie
c9d5d11d2d
r3/500: emit RS state before VAP
2008-05-15 18:40:07 +10:00
Dave Airlie
412c850eab
r500: fixup the program allocations to be the correct sizes
2008-05-15 18:40:07 +10:00
Dave Airlie
350c80fa99
r300: set screen so that context init can find out chip ids
2008-05-15 18:40:07 +10:00
Dave Airlie
e1bffd0318
r500: add cmp support in theory
2008-05-15 18:40:07 +10:00
Dave Airlie
10e0a36a49
r500: some trivial fixups to get tri working.
...
the counter was being used one instruction over the end
2008-05-15 18:40:07 +10:00
Dave Airlie
375656440b
r500: we just need to emit a colour for clear drop tex instruction
2008-05-15 18:40:07 +10:00
Alex Deucher
f86baae1a7
R300: clean up GA registers
2008-05-13 16:12:57 -04:00
Alex Deucher
de3fc8b1c4
R3xx: clean up ZB registers
2008-05-13 15:46:23 -04:00
Alex Deucher
c5b7a1ee3c
R300: clean up CB registers
2008-05-13 14:32:30 -04:00
Alex Deucher
8d70181b03
R300: clean up Fog registers
2008-05-13 14:02:29 -04:00
Alex Deucher
d09aa2138b
R500: fixup r300EmitClearState() FP for r5xx
2008-05-13 13:38:30 -04:00
Alex Deucher
9ef4126d48
R300: cleanup FS code and fill in missing details
2008-05-13 08:37:58 -04:00
Alex Deucher
0cc8ed5ccc
R3xx: more PVS cleanup
2008-05-13 06:09:55 -04:00
Alex Deucher
e000f2ab6e
Merge branch 'r500-support' of git+ssh://agd5f@git.freedesktop.org/git/mesa/mesa into r500-support
2008-05-12 11:58:35 -04:00
Alex Deucher
2a4d1085cb
R500: add support for 4k textures
2008-05-12 11:57:08 -04:00
Dave Airlie
3d15280278
r500: cleanup r500 RS setup
2008-05-07 17:48:17 +10:00
Dave Airlie
53a7ccc08b
r500: for rectangular textures set to unscaled coordinates.
2008-05-07 17:48:17 +10:00
Corbin Simpson
1da094c9ad
r5xx: Fix FP inputs. (For good?)
...
FP inputs are now counted and mapped correctly, and temps
are allocated tightly and correctly.
2008-05-07 00:06:26 -07:00
Corbin Simpson
49c30ce958
r5xx: Fix false error with DP3/DP4.
...
DP3/DP4 only takes two arguments, but tried to load three, causing
a false fallback to the dumb shader.
2008-05-06 23:36:50 -07:00
Corbin Simpson
dc24fb51a3
r5xx: Index inputs and temps.
...
This is not the same as r3xx indexing. It only tries to protect inputs on
the pixel stack from getting clobbered by temps or texs.
Texs don't need special treatment since they read from special input regs
and write to the same temp regs as ALU/FC instructions.
2008-05-06 22:18:28 -07:00
Corbin Simpson
40db59038c
r5xx: FP: Add OPCODE_TXB.
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Tex lookup with biased LOD. Should magically work.
2008-05-06 18:14:21 -07:00
Corbin Simpson
20baf128ef
r5xx: FP: Make MOV/ABS look pretty.
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We can't really do anything like emit_alu, so we're doing emit_mov instead.
2008-05-06 17:21:30 -07:00
Corbin Simpson
1562dd2c26
r5xx: Emit an OUT instruction at the end of execution.
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This should make TEX/TXP work right. (Note: "Should" is not "does.")
2008-05-06 12:44:53 -07:00
Corbin Simpson
fa465fb2b1
r5xx: We update max_temp_idx now, so no need to hard-code it.
...
This roughly doubles the speed of glxgears (GINAB) by allowing
more pixels to run concurrently.
2008-05-06 12:42:40 -07:00
Corbin Simpson
171ba1d0d1
r5xx: Fix typo.
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Gotta be more careful with my cut'n'paste, lawl.
2008-05-06 12:18:07 -07:00
Corbin Simpson
06e2e1b87c
r5xx: Use max_temp_idx.
2008-05-06 12:03:28 -07:00
Dave Airlie
66a49df9cb
r500: consolidate tex instructions
...
you cannot change a tex into an output so this means we have to actually
do another instruction after this one to mov if its an output
2008-05-05 18:42:27 +10:00
