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r500: write out the correct FP registers

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This commit is contained in:
Alex Deucher 2008-05-17 10:27:11 +10:00 • committed by Dave Airlie
parent d6333af7e9
commit 791c95230c
6 changed files with 43 additions and 6 deletions
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10
src/mesa/drivers/dri/r300/r300_cmdbuf.c
View file

@ -321,6 +321,11 @@ void r300InitCmdBuf(r300ContextPtr r300)
r300->hw.vpt.cmd[R300_VPT_CMD_0] = cmdpacket0(R300_SE_VPORT_XSCALE, 6);
ALLOC_STATE(vap_cntl, always, 2, 0);
r300->hw.vap_cntl.cmd[0] = cmdpacket0(R300_VAP_CNTL, 1);
if (is_r500) {
ALLOC_STATE(vap_index_offset, always, 2, 0);
r300->hw.vap_index_offset.cmd[0] = cmdpacket0(R500_VAP_INDEX_OFFSET, 1);
r300->hw.vap_index_offset.cmd[1] = 0;
}
ALLOC_STATE(vte, always, 3, 0);
r300->hw.vte.cmd[0] = cmdpacket0(R300_SE_VTE_CNTL, 2);
ALLOC_STATE(vap_vf_max_vtx_indx, always, 3, 0);
@ -423,7 +428,10 @@ void r300InitCmdBuf(r300ContextPtr r300)
ALLOC_STATE(fp, always, R500_FP_CMDSIZE, 0);
r300->hw.fp.cmd[R500_FP_CMD_0] = cmdpacket0(R500_US_CONFIG, 2);
r300->hw.fp.cmd[R500_FP_CNTL] = R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO;
r300->hw.fp.cmd[R500_FP_CMD_1] = cmdpacket0(R500_US_CODE_ADDR, 3);
r300->hw.fp.cmd[R500_FP_CMD_2] = cmdpacket0(R500_US_FC_CTRL, 1);
r300->hw.fp.cmd[R500_FP_FC_CNTL] = 0; /* FIXME when we add flow control */
ALLOC_STATE(r500fp, r500fp, R300_FPI_CMDSIZE, 0);
r300->hw.r500fp.cmd[R300_FPI_CMD_0] = cmdr500fp(0, 0, 0, 0);
ALLOC_STATE(r500fp_const, r500fp_const, R300_FPP_CMDSIZE, 0);

14
src/mesa/drivers/dri/r300/r300_context.h
View file

@ -357,7 +357,13 @@ struct r300_state_atom {
#define R500_FP_CMD_0 0
#define R500_FP_CNTL 1
#define R500_FP_PIXSIZE 2
#define R500_FP_CMDSIZE 3
#define R500_FP_CMD_1 3
#define R500_FP_CODE_ADDR 4
#define R500_FP_CODE_RANGE 5
#define R500_FP_CODE_OFFSET 6
#define R500_FP_CMD_2 7
#define R500_FP_FC_CNTL 8
#define R500_FP_CMDSIZE 9
#define R300_FPT_CMD_0 0
#define R300_FPT_INSTR_0 1
@ -458,6 +464,7 @@ struct r300_hw_state {
struct r300_state_atom vpt; /* viewport (1D98) */
struct r300_state_atom vap_cntl;
struct r300_state_atom vap_index_offset; /* 0x208c r5xx only */
struct r300_state_atom vof; /* VAP output format register 0x2090 */
struct r300_state_atom vte; /* (20B0) */
struct r300_state_atom vap_vf_max_vtx_indx; /* Maximum Vertex Indx Clamp (2134) */
@ -480,7 +487,7 @@ struct r300_hw_state {
struct r300_state_atom shade;
struct r300_state_atom polygon_mode;
struct r300_state_atom fogp; /* fog parameters (4294) */
struct r300_state_atom unk429C; /* (429C) */
struct r300_state_atom ga_soft_reset; /* (429C) */
struct r300_state_atom zbias_cntl;
struct r300_state_atom zbs; /* zbias (42A4) */
struct r300_state_atom occlusion_cntl;
@ -809,6 +816,9 @@ struct r500_fragment_program {
int temp_reg_offset;
int inst_offset;
int inst_end;
/* Hardware constants.
* Contains a pointer to the value. The destination of the pointer
* is supposed to be updated when GL state changes.

11
src/mesa/drivers/dri/r300/r300_ioctl.c
View file

@ -357,9 +357,14 @@ static void r300EmitClearState(GLcontext * ctx)
reg_start(R300_US_ALU_ALPHA_ADDR_0, 0);
e32(FP_SELA(0, NO, W, FP_TMP(0), 0, 0));
} else {
R300_STATECHANGE(r300, fp);
reg_start(R500_US_PIXSIZE, 0);
e32(0x2);
R300_STATECHANGE(r300, fp);
reg_start(R500_US_CONFIG, 1);
e32(R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO);
e32(0x0);
reg_start(R500_US_CODE_ADDR, 2);
e32(R500_US_CODE_START_ADDR(0) | R500_US_CODE_END_ADDR(1));
e32(R500_US_CODE_RANGE_ADDR(0) | R500_US_CODE_RANGE_SIZE(1));
e32(R500_US_CODE_OFFSET_ADDR(0));
R300_STATECHANGE(r300, r500fp);
r500fp_start_fragment(0, 6);

2
src/mesa/drivers/dri/r300/r300_reg.h
View file

@ -113,6 +113,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
/* number of vertices */
# define R300_VAP_VF_CNTL__NUM_VERTICES__SHIFT 16
#define R500_VAP_INDEX_OFFSET 0x208c
#define R300_VAP_OUTPUT_VTX_FMT_0 0x2090
# define R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT (1<<0)
# define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT (1<<1)

9
src/mesa/drivers/dri/r300/r300_state.c
View file

@ -2467,6 +2467,15 @@ static void r500SetupPixelShader(r300ContextPtr rmesa)
R300_STATECHANGE(rmesa, fp);
rmesa->hw.fp.cmd[R500_FP_PIXSIZE] = fp->max_temp_idx;
rmesa->hw.fp.cmd[R500_FP_CODE_ADDR] =
R500_US_CODE_START_ADDR(fp->inst_offset) |
R500_US_CODE_END_ADDR(fp->inst_end);
rmesa->hw.fp.cmd[R500_FP_CODE_RANGE] =
R500_US_CODE_RANGE_ADDR(fp->inst_offset) |
R500_US_CODE_RANGE_SIZE(fp->inst_end);
rmesa->hw.fp.cmd[R500_FP_CODE_OFFSET] =
R500_US_CODE_OFFSET_ADDR(0); /* FIXME when we add flow control */
R300_STATECHANGE(rmesa, r500fp);
/* Emit our shader... */
for (i = 0; i < fp->cs->nrslots; i++) {

3
src/mesa/drivers/dri/r300/r500_fragprog.c
View file

@ -798,6 +798,9 @@ void r500TranslateFragmentShader(r300ContextPtr r300,
init_program(r300, fp);
cs = fp->cs;
fp->inst_offset = 0;
fp->inst_end = cs->nrslots - 1;
if (parse_program(fp) == GL_FALSE) {
ERROR("Huh. Couldn't parse program. There should be additional errors explaining why.\nUsing dumb shader...\n");
dumb_shader(fp);