Commit graph

5530 commits

Author SHA1 Message Date
Valentine Burley
c5d180a0bb tu: Streamline setting YCbCr feature bits
Use ycbcr_info instead of checking the layout or the format directly.
Swap the order of the if statement for clarity.
These should make the code significanntly easier to read.

Also document Chia-I's findings on SEPARATE_RECONSTRUCTION_FILTER_BIT.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31304>
2024-10-01 18:44:00 +00:00
Connor Abbott
5a42df669b ir3: Ban conversions with mismatching sizes
This prevents folding something like this:

add.u hrA, hrB, hrC
mov.u8u32 rD, hrA

When I wrote this I assumed that because the conversion source and ALU
destination were the same register that meant the types must have the
same size, but that's not the case with u8 which is an 8-bit type in a
16-bit register, so this could've been broken with 8-bit types.

Fixes: f58e1ef7ec ("tu: enable shaderInt8 support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31399>
2024-10-01 15:17:11 +00:00
Job Noorman
211616cc98 ir3: disallow immediates for shfl src1
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Fixes: d43f39678c ("ir3: make backend aware of shfl:")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31457>
2024-10-01 13:48:40 +00:00
Valentine Burley
1e623ad308 freedreno/ci: Document new flake
KHR-GL46.texture_view.view_classes started flaking after the CTS
uprev and is blocking merges.

Fixes: 3178170516 ("ci: bump gl cts versions")

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31456>
2024-10-01 06:17:13 +00:00
David Heidelberg
51f04dc804 freedreno/ir3: Do not allow 16-bit mad.x24
Doesn't work with half registers. For 16-bit operations, there is mad.x16.

Cc: mesa-stable
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31334>
2024-09-30 20:14:06 +00:00
David Heidelberg
c36cc1fdf2 freedreno/ir3: mad.x24 is not safe to lower
Fixes following piglit tests on Adreno 630:
program@execute@builtin@builtin-char-mad_sat-1.0.generated
program@execute@builtin@builtin-uchar-mad_sat-1.0.generated

Cc: mesa-stable
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31334>
2024-09-30 20:14:06 +00:00
Mike Blumenkrantz
3178170516 ci: bump gl cts versions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31118>
2024-09-29 12:18:49 +00:00
Connor Abbott
b24c340cee freedreno/a6xx+: Add CP_CONTEXT_SWITCH_CNTL bitfields
Add missing bitfields necessary for preemption, taken from kgsl.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31422>
2024-09-27 17:28:35 +00:00
Guilherme Gallo
f7d678a571 ci/freedreno: Add a618_gl_full
To cover up the new fraction in a618_gl job during nightly pipelines

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31414>
2024-09-27 16:38:26 +00:00
Guilherme Gallo
8786737c51 ci/freedreno: Rebalance jobs via fraction and parallel
job name	avg duration (min)
a618_vk		13
a660_gl		17
zink-tu-a618	18

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31414>
2024-09-27 16:38:26 +00:00
Guilherme Gallo
7a518a5bbf ci/freedreno: Replace 2 limozeen with kingoftown
By rebalancing the `a618_vk` job fraction from **2** to **3**, we have
freed up 2 `kingoftown` devices. These devices can now be reallocated to
the `a618_traces` and `a618_skqp` jobs to optimize resource utilization.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31414>
2024-09-27 16:38:26 +00:00
Guilherme Gallo
bee23535e1 ci/freedreno: Rebalance limozeen jobs
We lost another limozeen DUT, so reduce the parallelism.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31414>
2024-09-27 16:38:26 +00:00
Job Noorman
71080b0fa1 tu: advertise VK_KHR_shader_subgroup_rotate
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31358>
2024-09-26 16:36:36 +00:00
Job Noorman
6c7192ce24 ir3: add codegen for rotate
shfl.rdown is an exact match for subgroupRotate so codegen is
straightforward.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31358>
2024-09-26 16:36:36 +00:00
Job Noorman
d43f39678c ir3: make backend aware of shfl:
- Validation;
- Copy prop: src2 can be shared;
- Legalization: is (ss) producer.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31358>
2024-09-26 16:36:36 +00:00
Job Noorman
222b46f008 ir3/print: add support for shfl
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31358>
2024-09-26 16:36:36 +00:00
Job Noorman
a8661f1186 ir3: add ir3_compiler::has_shfl for shfl support on a6xx+
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31358>
2024-09-26 16:36:36 +00:00
Job Noorman
fb7b7401a5 ir3/isa: add isaspec definition for shfl
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31358>
2024-09-26 16:36:35 +00:00
Rob Clark
9ee75f9141 freedreno/register: A couple pm4 updates
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31349>
2024-09-26 01:06:24 +00:00
Rob Clark
0ae340bb0d freedreno/crashdec: Fix fault address handling
The "  - far:" pattern never landed upstream (yet) but was part of some
enhanced fault debugging we have in the CrOS kernel.  Update crashdec to
handle both cases.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31349>
2024-09-26 01:06:23 +00:00
Valentine Burley
61c7c8266d freedreno/devices: Document an alias for FD644
While the blob driver calls this GPU A644, in kgsl (and internally) it is known as A662.
The chip_id also reflects this name.

A662 is a closer match to reality as we're talking about an A660-based GPU, but keep the name
we expose as FD644 to match the blob.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31328>
2024-09-25 15:50:55 +00:00
Valentine Burley
dde6acceb5 freedreno/devices: Unify magic_regs for A740 and A32
The only difference was RB_UNKNOWN_8E01 being set to 0x0 or 0x00000000.
Their raw_magic_regs however are different.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31328>
2024-09-25 15:50:55 +00:00
Valentine Burley
7968b356f8 freedreno/devices: Fix A740v3 from Quest 3
Based on a patch by weab chan.

The chip_id wasn't getting picked up with the capital B, so use lowercase hex values
like everywhere else.

Move it as a separate entry and turn on enable_tp_ubwc_flag_hint as the Quest 3 ships
with blob version 7xx, and expose the name as FD740v3 for clarity.

Unify the raw_magic_regs with a740, but as noted by Danylo in the initial enablement, set
RB_DBG_ECO_CNTL to 1 on a740v3 in magic_regs.

Fixes image corruption issues on this device.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10316
Fixes: 0b5097081a ("freedreno/devices: Add A740v3 from Quest 3")
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31328>
2024-09-25 15:50:55 +00:00
Timothy Arceri
c1b97415fa ci: disable gimark trace
gimark requires a mesa environment variable to be set to work around
a shader bug, disable it for now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31353>
2024-09-25 09:25:52 +10:00
Connor Abbott
dbc4a2e30b tu: Initial support for VK_KHR_calibrated_timestamps on a750
Starting with a750, the ALWAYS_ON counter is initialized from a loadable
counter in CX power domain, which is never turned off except during a
GPU reset. This means that timestamps should always be monotonic except
if the GPU resets, in which case subsequent submits should return
DEVICE_LOST anyway. Thus it should be good enough to satisfy the Vulkan
requirement that vkCmdWriteTimestamp is monotonic.

kgsl tries to synchronize the CX counter to the CPU counter, and
additionally adds a synchronization ioctl to improve the accuracy. I'm
not sure whether the former is really useful for us, but the latter
should eventually be implemented in drm/msm. However for now we can
expose the extension without any kernel support.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31100>
2024-09-23 07:17:01 -04:00
Valentine Burley
1494b2143d freedreno/ci: Document some a630 EGL flakes
Not related to the kernel uprev, unkown when they started appearing.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31286>
2024-09-23 08:55:37 +00:00
Valentine Burley
4b51a2c9da turnip/ci: Remove fixed test from a660 xfails
It appears this was missed due to fractional runs, but the fix for this issue has already been merged.
While the test hasn't run in the full runs yet, it should now be considered fixed, just like on other GPUs.

Fixes: 812c8f6abe ("tu: Treat partially-bound depth/stencil attachments as passthrough")
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31286>
2024-09-23 08:55:37 +00:00
Valentine Burley
28168d0971 freedreno/ci: Update expectations after Piglit uprev
The expectations for the manual runs were missed during the uprev, update them now.

Fixes: 213f5e9152 ("Uprev Piglit to e9ab30aeaed97b69868cf4d6d6a3f70f3b53c362")
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31286>
2024-09-23 08:55:36 +00:00
Valentine Burley
5b8f27d3d7 freedreno/ci: Uprev kernel to 6.11
The new kernel brings improved stability.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31286>
2024-09-23 08:55:36 +00:00
Valentine Burley
b20983f9a8 freedreno/ci: Skip timing out test on a630
KHR-GL46.texture_swizzle.functional usually takes 50+ seconds and can
time out on occasion. This isn't caused by the new kernel, it always
took this long. Skip it for pre-merge jobs on a630.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31286>
2024-09-23 08:55:36 +00:00
Job Noorman
757d38a682 ir3/legalize: resolve WAR hazards for stc
Just like scalar ALU, stc writes to the local buffer and needs (ss) to
resolve WAR hazards on its sources.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31257>
2024-09-19 19:30:05 +00:00
Sergi Blanch Torne
213f5e9152 Uprev Piglit to e9ab30aeaed97b69868cf4d6d6a3f70f3b53c362
93b4bd2e0a...e9ab30aeae

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Reviewed-by: David Heidelberg <david@ixit.cz>
Acked-by: Daniel Stone <daniels@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31058>
2024-09-19 15:41:32 +00:00
Valentine Burley
6485a2d1fa freedreno/ci: Uprev kernel for a630 runner
Uprev the kernel for the a630_vk_full manual job to avoid some hangs.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31237>
2024-09-19 06:34:46 +00:00
David Heidelberg
f044756732 ci/freedreno: mark a530_piglit as postmerge job
Fixes: dfc4a68b0a ("ci/freedreno: re-enable piglit tests for Adreno 530 in nightly runs")
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31244>
2024-09-19 12:35:47 +09:00
David Heidelberg
dfc4a68b0a ci/freedreno: re-enable piglit tests for Adreno 530 in nightly runs
Also, document recent Adreno 530 improvements and failures.

Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31183>
2024-09-16 16:30:33 +00:00
Rohan Garg
a03b307eea tu: enable VK_KHR_shader_relaxed_extended_instruction
The extension only affects non semantic instructions that need no
handling in the backend compiler.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Connor Abbott <cwabbott0@gmail.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30791>
2024-09-16 15:58:35 +00:00
David Heidelberg
c5ee7ca4d6 ci/freedreno: mark jobs to be retested with patched 6.11 kernel
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31177>
2024-09-14 15:24:04 +09:00
David Heidelberg
52c014a453 ci/freedreno: move disabled a530 entries back to main gitlab-ci.yml
Fixes: 9442571664 ("ci: separate hiden jobs to -inc.yml files")
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31177>
2024-09-14 15:20:47 +09:00
Martin Roukala (né Peres)
82946dc152 freedreno/ci: fix the stage of the a750 jobs
We were accidentally overriding the job stage in .b2c-freedreno-vk-test,
which ended up moving the a750 jobs to the `freedreno` stage instead of
`freedreno-postmerge`.

Fixes: 25c70888a5 ("ci/broadcom: Move manual/nightly jobs to postmerge stage")
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31142>
2024-09-13 01:51:45 +00:00
David Heidelberg
78a121b8cf freedreno/ir3: Use nir_lower_mem_access_bit_sizes instead custom lowering
- More robust.
 - Handles properly UBO cases, needed for proper OpenCL support (rusticl).
 - Resolved KHR-GL46.gpu_shader_fp64.fp64.max_uniform_components failure.

Fixes: f5ce806ed7 ("freedreno/ir3: Add wide load/store lowering")
Reviewed-by: Rob Clark <robdclark@freedesktop.org>
Co-authored-by: Rob Clark <robclark@freedesktop.org>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30961>
2024-09-12 01:04:58 +09:00
Danylo Piliaiev
127f67a66a ir3: Respect aligment of required consts when allocating ubo,preamble
Optional const allocations (preamble, UBO, etc.) may shift the required
consts (e.g. driver params) more than they expect.
The free space for optional allocations should respect the aligment of
required consts that come after them.

Example: there are maximum 100 vec4 consts, driver params take 4 units,
something else takes 1 unit. Now premable thinks that there is 95 free
units, however driver params cannot start at offset=95 it has higher
aligment.

Fixes some d3d12 games.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31027>
2024-09-09 19:11:40 +00:00
Alyssa Rosenzweig
1753bf599c ci: update traces
🤕

thanks Mike

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
2024-09-07 00:54:35 +00:00
Danylo Piliaiev
3886a3014d tu: Fix ZPASS_DONE having stale value with generic clear+early frag test
If the next renderpass uses the same depth attachment, clears it
with generic clear - ZPASS_DONE may somehow read stale values that
are apparently invalidated by CCU_INVALIDATE_DEPTH.

Fixes:
 dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_alpha_to_coverage_samples_2_maintenance5
 dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_alpha_to_coverage_samples_4_maintenance5
 dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_samples_2_maintenance5
 dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_samples_4_maintenance5

When running them with TU_DEBUG=sysmem

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30858>
2024-09-06 10:01:49 +00:00
Rob Clark
0adaf92014 freedreno/drm: Fix ring_heap flags
RING_FLAGS has FD_BO_HINT_COMMAND so we can't mask out the _FD_BO_HINTS.

Fixes: a3fb2b07aa ("freedreno: Add bo usage hints")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31050>
2024-09-05 21:25:34 +00:00
David Heidelberg
aaa332a751 ci/freedreno: add Adreno 306/307 occasional timeout
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31037>
2024-09-05 17:13:58 +09:00
Zan Dobersek
4c359eae01 tu: use instance indices in RD dump filenames
Until now the RD dumps were stored in files on a per-device basis, using
the device index but assuming only one Vulkan instance is active. With
multiple active instances, different devices separated across those
instances could end up storing RD dumps into files with the same name.

tu_instance struct now has an index member variable that's assigned upon
creation with an incrementally-increasing global counter value. RD dump
output name now also contains this instance index, avoiding the described
naming collisions.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Fixes: f9c4e25483 ("freedreno: add fd_rd_output facilities for gzip-compressed RD dumps")
Reviewed-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30977>
2024-09-05 08:47:27 +02:00
Daniel Stone
2ff28dae94 ci/fdno: Add some flaky tests for a618
It looks like unvanquished is flaky on all freedreno, so just ignore it
for now. One of the SKQP tests equally seems to be pretty enthusiastic
about flipping its status.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30993>
2024-09-03 18:41:49 +00:00
Connor Abbott
5879eaac18 ir3: Increase compute const size on a7xx
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30995>
2024-09-03 14:44:04 +00:00
Connor Abbott
46ad5a01a8 freedreno: Rename CP_SET_CTXSWITCH_IB to CP_SET_AMBLE
To match kgsl. Also make KMD_AMBLE_TYPE match the kgsl name, and invent
some names for the other types to be consistent.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30942>
2024-09-02 18:36:47 +00:00
Eric Engestrom
6c1d0b82fb turnip/ci: add vkd3d job on the a750
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29845>
2024-08-30 05:10:53 +00:00