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ir3: Ban conversions with mismatching sizes

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This prevents folding something like this:

add.u hrA, hrB, hrC
mov.u8u32 rD, hrA

When I wrote this I assumed that because the conversion source and ALU
destination were the same register that meant the types must have the
same size, but that's not the case with u8 which is an 8-bit type in a
16-bit register, so this could've been broken with 8-bit types.

Fixes: f58e1ef7ec ("tu: enable shaderInt8 support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31399>
This commit is contained in:
Connor Abbott 2024-09-26 10:51:57 -04:00 • committed by Marge Bot
parent 084f87915b
commit 5a42df669b
1 changed files with 4 additions and 2 deletions
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6
src/freedreno/ir3/ir3_cf.c
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@ -52,9 +52,11 @@ is_safe_conv(struct ir3_instruction *instr, type_t src_type, opc_t *src_opc)
return true;
/* We can handle mismatches with integer types by converting the opcode
* but not when an integer is reinterpreted as a float or vice-versa.
* but not when an integer is reinterpreted as a float or vice-versa. We
* can't handle types with different sizes.
*/
if (type_float(src_type) != type_float(instr->cat1.src_type))
if (type_float(src_type) != type_float(instr->cat1.src_type) ||
type_size(src_type) != type_size(instr->cat1.src_type))
return false;
/* We have types with mismatched signedness. Mismatches on the signedness