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freedreno/a6xx+: Add CP_CONTEXT_SWITCH_CNTL bitfields

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Add missing bitfields necessary for preemption, taken from kgsl.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31422>
This commit is contained in:
Connor Abbott 2024-09-27 07:43:47 -04:00 • committed by Marge Bot
parent d801c1101d
commit b24c340cee
4 changed files with 9 additions and 4 deletions
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2
src/freedreno/.gitlab-ci/reference/crash.log
View file

@ -683,7 +683,7 @@ registers:
00000000 CP_SCRATCH[0x5].REG: 0
00000000 CP_SCRATCH[0x6].REG: 0
00000002 CP_SCRATCH[0x7].REG: 2
00000000 CP_CONTEXT_SWITCH_CNTL: 0
00000000 CP_CONTEXT_SWITCH_CNTL: { LEVEL = 0 }
00000000 CP_CONTEXT_SWITCH_SMMU_INFO: 0
00000000 CP_CONTEXT_SWITCH_PRIV_NON_SECURE_RESTORE_ADDR: 0
00000000 CP_CONTEXT_SWITCH_PRIV_SECURE_RESTORE_ADDR: 0

2
src/freedreno/.gitlab-ci/reference/crash_prefetch.log
View file

@ -898,7 +898,7 @@ registers:
00000000 CP_SCRATCH[0x5].REG: 0
00000000 CP_SCRATCH[0x6].REG: 0
00000001 CP_SCRATCH[0x7].REG: 1
00000000 CP_CONTEXT_SWITCH_CNTL: 0
00000000 CP_CONTEXT_SWITCH_CNTL: { LEVEL = 0 }
00000000 CP_CONTEXT_SWITCH_SMMU_INFO: 0
00000000 CP_CONTEXT_SWITCH_PRIV_NON_SECURE_RESTORE_ADDR: 0
00000000 CP_CONTEXT_SWITCH_PRIV_SECURE_RESTORE_ADDR: 0

2
src/freedreno/.gitlab-ci/reference/prefetch-test.log
View file

@ -1477,7 +1477,7 @@ registers:
00000000 CP_SCRATCH[0x5].REG: 0
00000000 CP_SCRATCH[0x6].REG: 0
00000002 CP_SCRATCH[0x7].REG: 2
00000000 CP_CONTEXT_SWITCH_CNTL: 0
00000000 CP_CONTEXT_SWITCH_CNTL: { LEVEL = 0 }
00000000 CP_CONTEXT_SWITCH_SMMU_INFO: 0
00000000 CP_CONTEXT_SWITCH_PRIV_NON_SECURE_RESTORE_ADDR: 0
00000000 CP_CONTEXT_SWITCH_PRIV_SECURE_RESTORE_ADDR: 0

7
src/freedreno/registers/adreno/a6xx.xml
View file

@ -2358,7 +2358,12 @@ to upconvert to 32b float internally?
<reg32 offset="0x0" name="REG" type="a6x_cp_protect"/>
</array>
<reg32 offset="0x08A0" name="CP_CONTEXT_SWITCH_CNTL"/>
<reg32 offset="0x08A0" name="CP_CONTEXT_SWITCH_CNTL">
<bitfield name="STOP" pos="0" type="boolean"/>
<bitfield name="LEVEL" low="6" high="7"/>
<bitfield name="USES_GMEM" pos="8" type="boolean"/>
<bitfield name="SKIP_SAVE_RESTORE" pos="9" type="boolean"/>
</reg32>
<reg64 offset="0x08A1" name="CP_CONTEXT_SWITCH_SMMU_INFO"/>
<reg64 offset="0x08A3" name="CP_CONTEXT_SWITCH_PRIV_NON_SECURE_RESTORE_ADDR"/>
<reg64 offset="0x08A5" name="CP_CONTEXT_SWITCH_PRIV_SECURE_RESTORE_ADDR"/>