Commit graph

42697 commits

Author SHA1 Message Date
Jerome Glisse
c33e091d17 r600g: indentation fixes
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2011-02-28 13:33:13 -05:00
Marek Olšák
ab824a0722 r300g: initialize SC_SCREENDOOR 2011-02-28 12:43:26 +01:00
Marek Olšák
d1dbbf7bf4 r300g: disable hyper-z on rs6xx+
It doesn't work.
2011-02-28 12:28:07 +01:00
Vinson Lee
93893139a4 mesa: Add texcompress_rgtc.c to SConscript. 2011-02-27 23:17:49 -08:00
Dave Airlie
e107a3aa08 rgtc: update docs 2011-02-28 13:43:32 +10:00
Dave Airlie
83ebc01c1d mesa/st: add RGTC format support.
this just adds a format check + format conversion.
2011-02-28 13:35:35 +10:00
Dave Airlie
903726d285 swrast: add RGTC support 2011-02-28 13:35:35 +10:00
Dave Airlie
8d47c91985 mesa: Add RGTC texture store/fetch support.
This adds support for the RGTC unsigned and signed
texture storage and fetch methods.

the code is a port of the DXT5 alpha compression code.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-28 13:35:34 +10:00
Dave Airlie
e792e79f5a mesa: make_float_temp_image non-static
We need this to do signed stuff for RGTC.
2011-02-28 13:34:25 +10:00
Dave Airlie
e3709c26a6 rgtc: llvmpipe/softpipe refuse RGTC until u_format has support.
So far I haven't implemented the u_format code for these.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-28 13:34:25 +10:00
Dave Airlie
0495425dc3 r300g: force swizzles for RGTC
still can't get signed to work
2011-02-28 13:21:44 +10:00
Christian König
96bbc627f3 r600g: implement instanced drawing support 2011-02-28 02:19:39 +01:00
Christian König
bce4f9ac39 st/mesa & v_bug_mgr: two small instanced drawing fixes 2011-02-28 02:19:39 +01:00
Dave Airlie
0a17444133 Revert "r600g: Don't negate result of ABS instruction"
This reverts commit b6d4021393.

This actually breaks gears here on my rv670.
2011-02-28 11:10:35 +10:00
Fabian Bieler
0ab7dcddb3 r600g: Process TRUNC with tgis_op2
TRUNC is neither a scalar instruction nor exclusive to the Trans unit.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-28 09:22:16 +10:00
Fabian Bieler
b6d4021393 r600g: Don't negate result of ABS instruction
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-28 09:21:41 +10:00
Daniel Vetter
d42c9433b0 i915g: implement cache flushing
With an extremely dumb strategy. But it's the same i915c employs.

Also improve the hw_atom code slightly by statically specifying the
required batch space. For extremely variably stuff (shaders, constants)
it would probably be better to add a new parameter to the hw_atom->validate
function.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-02-27 22:10:46 +01:00
Daniel Vetter
f90fa55347 i915g: buffer validation for blitter
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-02-27 22:03:51 +01:00
Daniel Vetter
342016010a i915g: buffer validation for render state
Also contains the first few bits for hw state atoms.

v2: Implement suggestion by Jakob Bornecrantz.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-02-27 21:57:31 +01:00
Daniel Vetter
3c59b3eb4b i915g/winsys: buffer validation support
v2: Add the batch bo to the libdrm validation lost, for otherwise
libdrm won't take previously used buffers into account.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-02-27 18:49:56 +01:00
Daniel Vetter
e20c3255e2 i915g: add raw batchbuffer dumping in drm winsys
These files can be decoded with intel_dump_decode from the intel-gpu-tools
available at:

http://cgit.freedesktop.org/xorg/app/intel-gpu-tools/

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-02-27 16:32:38 +01:00
Daniel Vetter
f58c11af72 i915g: cleanup static state calculation, part 2
Now also for the DRAW_RECT command

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-02-27 15:58:13 +01:00
Daniel Vetter
beaf039f97 i915g: cleanup static state calculation, part 1
Move it to i915_state_static.c This way i915_emit_state.c only emits
state and doesn't (re)calculate it.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-02-27 15:58:03 +01:00
Kenneth Graunke
a385ac6207 glsl/builtins: Fix return type for textureSize sampler2DArray variants.
A copy and paste error.
2011-02-27 00:44:47 -08:00
Eric Anholt
5f889c5bf5 glx: Adjust the MESA_multithread_makecurrent spec to match implementation.
This came out of discussion at the office today, and we agreed that
solving this for indirect wasn't really interesting, though the
server-side change would be of a similar level of difficulty.
2011-02-26 12:43:15 -08:00
Eric Anholt
dea5e57861 intel: Use the current context rather than last bound context for a drawable.
If another thread bound a context to the drawable then unbound it, the
driContextPriv would end up NULL.

With the previous two fixes, this fixes glx-multithread-makecurrent-2,
despite the issue not being about the multithreaded makecurrent.
2011-02-26 12:43:15 -08:00
Eric Anholt
74cde6505c dri2: Don't call the dri2 flush hook for swapbuffers unless we have a context.
The driver only has one reasonable place to look for its context to
flush anything, which is the current context.  Don't bother it with
having to check.
2011-02-26 12:43:15 -08:00
Eric Anholt
4d01bea808 glx: Don't do the implicit glFlush in SwapBuffers if it's the wrong drawable.
The GLX Spec says you only implicitly glFlush if the drawable being
swapped is the current context's drawable.
2011-02-26 12:43:15 -08:00
Eric Anholt
49d7e48b33 mesa: Add new MESA_multithread_makecurrent extension.
This extension allows a client to bind one context in multiple threads
simultaneously.  It is then up to the client to manage synchronization of
access to the GL, just as normal multithreaded GL from multiple contexts
requires synchronization management to shared objects.
2011-02-26 12:43:15 -08:00
Daniel Vetter
132dc0b6d2 i915g: make dynamic state emission actually lazy
Premature semicolon.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-02-26 21:20:03 +01:00
Jakob Bornecrantz
11f9ec5422 gallivm: Initialize stack values
valgrind gives me a warning with llvmpipe with profile builds but
not debug builds, this seems to fix the issue at least.
2011-02-26 20:13:08 +01:00
Arkadiusz Miskiewicz
99b9019716 glsl/Makefile: Remove builtin_function.cpp if generation fails.
Fixes bug #34346.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2011-02-26 10:28:00 -08:00
Jakob Bornecrantz
052122a8cd i915g: Handle null constants properly 2011-02-26 15:45:47 +01:00
Daniel Vetter
b8e44f648e i915g: fix null deref in draw_rect emission
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-02-26 15:35:24 +01:00
Daniel Vetter
1df1e0841d i915g: simplify math in constants emission
The old code even falls apart for nr == 0 (which is caught earlier, but)!

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-02-26 15:35:24 +01:00
Jakob Bornecrantz
acc290aff0 i915g: Use the same debug env vars in drm and sw winsys 2011-02-26 15:35:13 +01:00
Jakob Bornecrantz
9a371b938c i915g: Use unchecked writes in sw winsys batchbuffer 2011-02-26 15:29:21 +01:00
Alan Hourihane
53fe5b334e Check for out of memory when creating fence 2011-02-26 10:30:19 +00:00
Jakob Bornecrantz
ca8a91ff7e util: Don't destroy shaders null shaders
Fixes regression from a08e612fd8
2011-02-26 02:32:22 +01:00
Jakob Bornecrantz
a08e612fd8 util: Don't create array texture shaders if the driver doesn't support it 2011-02-26 00:50:52 +01:00
Kenneth Graunke
58f7c9c72e i965/fs: Initial plumbing to support TXD.
This adds the opcode and the code to convert ir_txd to OPCODE_TXD;
it doesn't actually add support yet.
2011-02-25 15:30:45 -08:00
Kenneth Graunke
2830b1ae90 i965/fs: Complete TXL support on gen5+.
Initial plumbing existed to turn the ir_txl into OPCODE_TXL, but it was
never handled.
2011-02-25 15:30:45 -08:00
Kenneth Graunke
4ddd11aad6 i965/fs: Complete TXL support on gen4.
Initial plumbing existed to turn the ir_txl into OPCODE_TXL, but it was
never handled.
2011-02-25 15:30:45 -08:00
Kenneth Graunke
e54d62b896 i965/fs: Use a properly named constant in TXB handling.
The old value, BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE makes it sound like we're
doing a non-bias texture lookup.  It has the same value as the new constant
BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_BIAS_COMPARE, so there should be no
functional changes.
2011-02-25 15:30:45 -08:00
Kenneth Graunke
a3cd542894 i965: Add #defines for gen4 SIMD8 TXB/TXL with shadow comparison.
From volume 4, page 161 of the public i965 documentation.
2011-02-25 15:30:45 -08:00
Jerome Glisse
b0e8aec5ab gallium/tgsi: shuffle ureg_src structure to work around gcc4.6.0 issue
There is an issue with gcc 4.6.0 that leads to segfault/assert with mesa
due to ureg_src size, reshuffling the structure member to better better
alignment work around the issue.

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47893

7.9 + 7.10 candidate

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2011-02-25 12:44:07 -05:00
Jerome Glisse
8e17adfdbd gallium/st: place value check before value is use
7.9 & 7.10 candidate

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2011-02-25 11:49:23 -05:00
Dave Airlie
179ff0551c gallium/util: add 1d/2d mipmap generation support
so far only hw mipmap generation is testing on softpipe,
passes test added to piglit.

this requires another patch to mesa to let array textures mipmaps
even start to happen.
2011-02-25 16:06:15 +10:00
Vinson Lee
eb17802386 scons: Reduce all Cygwin platform names to 'cygwin'.
platform.system in SCons on Cygwin includes the OS version number.
Windows XP - CYGWIN_NT-5.1
Windows Vista - CYGWIN_NT-6.0
Windows 7 - CYGWIN_NT-6.1

Reduce all Cygwin platform variants to just 'cygwin' so anything
downstream can simply use 'cygwin' instead of the different full
platform names.
2011-02-24 19:49:37 -08:00
Dave Airlie
b2413de916 r600g: explicity set sign bits for RGTC 2011-02-25 09:18:42 +10:00