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90093 commits

Author SHA1 Message Date
Chad Versace
c2b706f8af isl: Drop misplaced comment about padding
isl has a giant comment that explains the hardware's padding
requirements. (Hint: Cache lines and page faults). But the comment is in
the wrong place, in isl_calc_linear_row_pitch(), which is unrelated to
padding.

The important parts of that comment were copied to
isl_apply_surface_padding() long ago. So drop the misplaced comment.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-03-21 15:56:13 -07:00
Ben Widawsky
0e55e46540 i965/dri: Turn on support for image modifiers
All the plumbing is in place so the extension just needs to be
advertised.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-03-21 14:48:12 -07:00
Ben Widawsky
cd6bd7f123 i965/dri: Handle X-tiled modifier
This doesn't really "do" anything because the default tiling for the
winsys buffer is X tiled. We do however want the X tiled modifier to
work correctly from the API perspective, which would imply that if you
set this modifier, and later do a get_modifier, you get back at least X
tiled.

Running with a modified kmscube, here are the bandwidth measurements.

Linear:
Read bandwidth: 1039.31 MiB/s
Write bandwidth: 1453.56 MiB/s

Y-tiled:
Read bandwidth: 458.29 MiB/s
Write bandwidth: 542.12 MiB/s

X-tiled:
Read bandwidth: 575.01 MiB/s
Write bandwidth: 606.25 MiB/s

Cc: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-03-21 14:48:12 -07:00
Ben Widawsky
7ce0405826 i965/dri: Handle Y-tiled modifier
This patch begins introducing how we'll actually handle the potentially
many modifiers coming in from the API, how we'll store them, and the
structure in the code to support it.

Prior to this patch, the Y-tiled modifier would be entirely ignored. It
shouldn't actually be used until this point because we've not bumped the
DRIimage extension version (which is a requirement to use modifiers).

Measuring later in the series with kmscube:
Linear:
Read bandwidth: 1048.44 MiB/s
Write bandwidth: 1483.17 MiB/s

Y-tiled:
Read bandwidth: 471.13 MiB/s
Write bandwidth: 589.10 MiB/s

Similar functionality was introduced and then reverted here:

commit 6a0d036483
Author: Ben Widawsky <ben@bwidawsk.net>
Date:   Thu Apr 21 20:14:58 2016 -0700

    i965: Always use Y-tiled buffers on SKL+

v2: Use last set bit instead of first set bit in modifiers to address
bug found by Daniel Stone.

v3: Use the new priority modifier selection thing. This nullifies the
bug fixed by v2 also.

v4: Get rid of modifier compaction which originally served another
purpose and now serves none (Jason)

Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-03-21 14:48:12 -07:00
Ben Widawsky
d78a36ea62 i965/dri: Handle the linear fb modifier
At image creation create a path for dealing with the linear modifier.
This works exactly like the old usage flags where __DRI_IMAGE_USE_LINEAR
was specified.

During development of this patch series, it was decided that a lack of
modifier was an insufficient way to express the required modifiers. As a
result, 0 was repurposed to mean a modifier for a LINEAR layout.

NOTE: This patch was added for v3 of the patch series.

v2: Rework the algorithm for modifier selection to go from a bitmask
based selection to this priority value.

v3: Make DRM_FORMAT_MOD_INVALID allowed at selection as a way of
identifying no modifiers found (because 0 is LINEAR) (Jason)

v4: Remove the logic to prune unknown modifiers (like those from other
vendors) and simply handle is in select_best_modifier (Jason)

Requested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-03-21 14:48:12 -07:00
Ben Widawsky
79f619ca70 i965/dri: Enable modifier queries
New to the patch series after reordering things for landing smaller
chunks.

This will essentially enable modifiers from clients that were just
enabled in previous patches. A client could use the modifiers by
setting all of them at create, but had no way to actually query them
after creating the surface (ie. stupid clients could be broken before
this patch, but in more ways than this).

Obviously, there are no modifiers being actually stored yet - so this
patch shouldn't do anything other than allow the API to get back 0 (or
the LINEAR modifier).

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-03-21 14:48:12 -07:00
Ben Widawsky
fc1e9f0cb2 i965/dri: Store the screen associated with the image
I intend to need to get to the devinfo structure, and storing the screen
is an easy way to do that.

It seems to be the consensus that you cannot share an image between
multiple screens.

Scape-goat: Rob Clark <robdclark@gmail.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-03-21 14:48:11 -07:00
Ben Widawsky
2a16de9e4b gbm: Disallow INVALID modifiers returned upon image creation
v2: Add a TODO about modifier validation (Jason)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-03-21 14:48:11 -07:00
Ben Widawsky
962b31da95 i965/dri: Disallow image with INVALID modifier
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-03-21 14:48:03 -07:00
Kenneth Graunke
b15038a289 i965: Shut up major()/minor() warnings.
Recent glibc generates this warning:

brw_performance_query.c:1648:13: warning: In the GNU C Library, "minor" is defined
 by <sys/sysmacros.h>. For historical compatibility, it is
 currently defined by <sys/types.h> as well, but we plan to
 remove this soon. To use "minor", include <sys/sysmacros.h>
 directly. If you did not intend to use a system-defined macro
 "minor", you should undefine it after including <sys/types.h>.

    min = minor(sb.st_rdev);

So, include sys/sysmacros.h to shut up the warning.

v2: Use the AC_HEADER_MAJOR defines to figure out the right header
    (thanks to Jonathan Gray for helping me not break non-glibc systems)

Reviewed-by: Matt Turner <mattst88@gmail.com> [v1]
Reviewed-by: Emil Velikov <emli.velikov@collabora.com>
2017-03-21 14:10:17 -07:00
Kenneth Graunke
0c3fbf8028 i965: Drop AUB_TRACE_* stuff.
This was used for aubdumping (deleted a while ago) and INTEL_DEBUG=bat
decoding (deleted recently).

While we're changing parameters, delete the wrapper macro and make the
actual function brw_state_batch instead of __brw_state_batch.

This subsumes a patch by Emil Velikov to drop this from BLORP.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-03-21 13:49:18 -07:00
Kenneth Graunke
705c38e96f i965: Use aubinator/genxml for INTEL_DEBUG=bat state decoding.
This deletes all of our handwritten code in favor of autogenerated
genxml-based decoding.  This should be much more usable, as the old
code isn't entirely accurate - we updated some things for new
generations, but not everything.

Aubinator has one annoying limitation: it has no idea how many entries
to print when encountering e.g. 3DSTATE_BINDING_TABLE_POINTERS_VS.  It
picks an arbitrary number, which may skip decoding valid data, and may
print extra garbage entries.

We do a better job here by making brw_state_batch track the size of the
data stored at a particular batchbuffer offset.  Then, we can divide by
the structure size to obtain the exact number of entries.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-03-21 13:49:15 -07:00
Kenneth Graunke
5fab46572f i965: Use aubinator/genxml for INTEL_DEBUG=bat commands.
This should give substantially better decoding, as the public libdrm
decoder hasn't been properly maintained in years.

For now, we reuse the existing state dumping mechanism.  We'll improve
that in the next patch.

To avoid increasing the size of the driver, we restrict this feature
to debug builds of Mesa.  There's probably very little use for it in
release builds anyway.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-03-21 13:49:13 -07:00
Kenneth Graunke
7d84bb32aa intel: Move tools/decoder.[ch] to common/gen_decoder.[ch].
This way they become part of libintel_common.la so I can use them in
the i965 driver.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-03-21 13:49:10 -07:00
Kenneth Graunke
2b074bb7e5 intel: Add a INTEL_DEBUG=color option.
This will be used for color output in debug messages.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-03-21 13:48:53 -07:00
Vinson Lee
1fa432741c nir: Add positional argument specifiers.
Fix build with Python < 2.7.

  File "src/compiler/nir/nir_builder_opcodes_h.py", line 46, in <module>
    from nir_opcodes import opcodes
  File "src/compiler/nir/nir_opcodes.py", line 178, in <module>
    unop_convert("{}2{}{}".format(src_t[0], dst_t[0], bit_size),
ValueError: zero length field name in format

Fixes: 762a6333f2 ("nir: Rework conversion opcodes")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
2017-03-21 13:38:00 -07:00
Julien Isorce
ad13bd2e51 r600_shader.c: check returned value of eg_get_interpolator_index
Like done in another place in that same file.

CID 1250588

Signed-off-by: Julien Isorce <jisorce@oblong.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-03-21 18:14:26 +00:00
Timothy Arceri
020b3f0c46 util/disk_cache: fix build on platforms where shader cache is disabled 2017-03-21 11:51:03 +11:00
Grazvydas Ignotas
b9a370f2b4 util/disk_cache: add a write helper
Simplifies the write code a bit and handles EINTR.

V2: (Timothy Arceri) Drop EINTR handling. To do it
    properly we would need a retry limit but it's
    probably best to just avoid trying to write if
    we hit EINTR and try again next time we see
    the program.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-03-21 11:51:03 +11:00
Grazvydas Ignotas
af73acca2b tests/cache_test: use the blob key's actual first byte
There is no need to hardcode it, we can just use blob_key[0].
This is needed because the next patches are going to change how cache
keys are computed.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-03-21 11:15:52 +11:00
Grazvydas Ignotas
529a767041 util/disk_cache: use a helper to compute cache keys
This will allow to hash additional data into the cache keys or even
change the hashing algorithm easily, should we decide to do so.

v2: don't try to compute key (and crash) if cache is disabled

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-03-21 11:15:52 +11:00
Dave Airlie
021c87fa24 radv: move KHR_get_physical_device_properties2 to instance props.
This is an instance property not a device one.

Fixes:
dEQP-VK.api.info.device.extensions

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-03-21 10:05:49 +10:00
Dave Airlie
93e62898cc radv: drop illegal DB format error.
We'll get this if we have a stencil only setup.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-03-21 10:05:49 +10:00
Kenneth Graunke
72c89522c2 i965: Add autogenerated OA files to .gitignore. 2017-03-20 16:28:04 -07:00
Tim Rowley
fe325e6423 swr: [rasterizer] Cleanup naming of codegen files
All template files and generated files are prefixed with gen_.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:05:54 -05:00
Tim Rowley
cf8fa67364 swr: [rasterizer codegen] Remove BOM from knob_defs.py
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:05:54 -05:00
Tim Rowley
8a5069e81f swr: [rasterizer codegen] Rewrite gen_llvm_types.py to use mako
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:05:54 -05:00
Tim Rowley
5d0b3b05a2 swr: [rasterizer codegen] Fix generation of knobs
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:05:54 -05:00
Tim Rowley
4ed72758db swr: [rasterizer codegen] Change backend template comment style
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:05:54 -05:00
Tim Rowley
2776d94545 swr: [rasterizer codegen] Rewrite gen_llvm_ir_macros.py to use mako
Don't create/use cpp files, header only now.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:05:54 -05:00
Tim Rowley
9538ba9bd1 swr: [rasterizer codegen] Quiet gen_backends.py execution
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:05:54 -05:00
Tim Rowley
97cbabc8fb swr: [rasterizer scripts] Put codegen scripts into a separate directory
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:05:54 -05:00
Tim Rowley
7046695a0e swr: [rasterizer core] Fix trifan regression from 9d3442575f
Fixes piglit triangle-rasterization-overdraw.

SIMD16 path not working.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:05:22 -05:00
Tim Rowley
4cb69e817c swr: [rasterizer core] SIMD16 Frontend WIP - fix tesselation crashes
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
ab3f4449c3 swr: [rasterizer jitter] Fix LogicOp blend jit after assert changes
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
8cd8240cfc swr: [rasterizer] Convert more SWR_ASSERT(false, ...) to SWR_INVALID(...)
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
ab032fb436 swr: [rasterizer core] Fix typo in SIMD16 code path
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
d011ba74ee swr: [rasterizer core/common] Fix the native AVX512 build under ICC
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
2f513d8d83 swr: [rasterizer core] Allow no arguments to SWR_INVALID macro
Turns out this is somewhat tricky with gcc/g++.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
0b066b2bf3 swr: [rasterizer] Slight assert refactoring
Make asserts more robust.

Add SWR_INVALID(...) as a replacement for SWR_ASSERT(0, ...)

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
f445b6de9c swr: [rasterizer] Backend code adjustments
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
e4d1294afb swr: [rasterizer archrast] Fix the early and late depthstencil events
The coverage and stencil mask arguments were reversed.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
a508c2c2ac swr: [rasterizer core] Implement double pumped SIMD16 TESS
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
2cbac00221 swr: [rasterizer archrast/core/scripts] Fix archrast multithreading issue
Per pixel stats are cached but were not always being flushed as threads
moved from one draw context to the next.  Added an explicit flush to allow
all archrast objects to flush any cached events.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
0a36a7cf04 swr: [rasterizer archrast] Remove redundant data from archrast files
If count can be derived from other counts then this can be done in
post processing scripts.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
1cc885d1d1 swr: [rasterizer archrast/scripts] Further archrast cleanups
Removed redundant data being written out to file

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
1399fbd6fd swr: [rasterizer core] Fix RECT_LIST primitive assembly
The bug would make the 3rd component of attributes on the second
triangle of a RECT be invalid.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
ade5351900 swr: [rasterizer common] Add InterpolateComponentFlat utility
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
ab04221bf1 swr: [rasterizer archrast] Fix performance issue with archrast stats
Performance is now 50x faster with archrast now that we're properly
filtering out all of the rdtsc begin/end.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00
Tim Rowley
b228d2db18 swr: [rasterizer core] Implement SIMD16 GS and STREAMOUT
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-03-20 18:04:53 -05:00