Commit graph

6358 commits

Author SHA1 Message Date
Lionel Landwerlin
bfee389f0c anv: only use compressed memory types on Xe2+
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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 252cac1e5c ("anv: avoid memory type changes with INTEL_DEBUG=noccs")
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35615>
2025-06-19 19:55:59 +00:00
Mel Henning
f7aa6ba906 vulkan: Specify library_arch in ICD files
This should help vk-icd-loader skip libraries of the wrong bit width.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35567>
2025-06-19 17:30:24 +00:00
Yiwei Zhang
4efaa64159 vulkan/treewide: add and use common Android HMI hal implementation
There's no need for a per driver HMI implementation since the
vk_icdGetInstanceProcAddr implementation can well populate the required
entrypoints for Android icd.

Changes have to be done in this single commit for simplicity. Otherwise,
I would have to create a separate android shared library in the runtime
like how vk_instance is handled today, so that the target is able to
check per driver enablement def. However, after all drivers have
migrated over within this MR, we still have to clean those up. So I
decided to just do those in a single commit instead.

v2: avoid preloading u_gralloc in vulkan hal open

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:53 +00:00
Yiwei Zhang
710282f83c anv: adopt common Android gralloc helpers
u_gralloc will be initialized upon the initial vk_android_get_ugralloc.

v2: drop explicit gralloc init

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:49 +00:00
Yiwei Zhang
896bda5143 anv: free up hwvulkan_device_t upon driver unloading
Per <hardware/hwvulkan.h>, the hw_device_t::close() function is called
upon driver unloading. The behavior has been like this since Android 10.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:49 +00:00
Sagar Ghuge
a676ba9294 anv: Apply flush during WriteAccelerationStructures
We are reading accel header parameter those are updated by CS, so we
need to apply flushes to make L3 coherent with CS.

This fixes ray query tests on MTL:
- dEQP-VK.ray_query.*.serialization.*

Cc: mesa-stable

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35590>
2025-06-18 20:56:56 +00:00
José Roberto de Souza
37f4182ac3 Revert "anv: Enable preemption due 3DPRIMITIVE in GFX 12"
Enabling preemption in 3DPRIMITIVE is causing glitches on Dota 2,
so reverting this until the issue with preemption is fixed.

This reverts commit 3cd972a2d3.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13289
Fixes: 12ddaa6b8b ("anv: Enable preemption due 3DPRIMITIVE in GFX 12")
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35586>
2025-06-18 18:52:19 +00:00
Yiwei Zhang
c169ad60c1 anv: use narrow range to match up with mesa EGL
This matches up with the native gl drivers as well as the media stack.

- VK_SAMPLER_YCBCR_RANGE_ITU_NARROW <=> EGL_YUV_NARROW_RANGE_EXT

Cc: mesa-stable
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35597>
2025-06-17 22:51:30 -07:00
Calder Young
03cdb3078a anv: Support multi-planar formats in anv_formats_are_compatible
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35358>
2025-06-17 11:23:46 +00:00
Lionel Landwerlin
f4c1753c1a anv: report color/storage features on YCbCr images with EXTENDED_USAGE
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13219
Cc: mesa-stable
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35358>
2025-06-17 11:23:46 +00:00
Lionel Landwerlin
bd959ea48f anv: pass image usage/flags to anv_get_image_format_features2
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35358>
2025-06-17 11:23:46 +00:00
Lionel Landwerlin
befc2a2f62 anv: fix R64 format support reporting
We only want the atomic bit to be conditional to non sparse.

Also take the opportunity to fix buffer features and report the same
supported atomic formats as images.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ed77f67e44 ("anv: add emulated 64bit integer storage support")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35358>
2025-06-17 11:23:45 +00:00
Lionel Landwerlin
4dad9d443b anv: fix valgrind warning
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Found when running
KHR-Single-GL46.arrays_of_arrays_gl.InteractionArgumentAliasing2_var_type_index_4
with zink/anv :

Test case 'KHR-Single-GL46.arrays_of_arrays_gl.InteractionArgumentAliasing2_var_type_index_4'..
==22722== Thread 3 glcts:zfq0:
==22722== Uninitialised byte(s) found during client check request
==22722==    at 0x134A8D51: anv_batch_bo_finish (anv_batch_chain.c:350)
==22722==    by 0x134ACD3E: anv_cmd_buffer_end_batch_buffer (anv_batch_chain.c:1114)
==22722==    by 0x13CECB30: end_command_buffer (genX_cmd_buffer.c:3467)
==22722==    by 0x13CECB7B: gfx12_EndCommandBuffer (genX_cmd_buffer.c:3478)
==22722==    by 0x6FFA343: submit_queue (zink_batch.c:739)
==22722==    by 0x672684B: util_queue_thread_func (u_queue.c:294)
==22722==    by 0x6790976: impl_thrd_routine (threads_posix.c:43)
==22722==    by 0x579BAA3: start_thread (pthread_create.c:447)
==22722==    by 0x5828A33: clone (clone.S:100)
==22722==  Address 0x94ac840 is 2,112 bytes inside a block of size 8,192 client-defined
==22722==    at 0x134A04C7: anv_bo_pool_alloc (anv_allocator.c:1311)
==22722==    by 0x134A8772: anv_batch_bo_create (anv_batch_chain.c:262)
==22722==    by 0x134AB6BC: anv_cmd_buffer_init_batch_bo_chain (anv_batch_chain.c:877)
==22722==    by 0x134BCC4C: anv_create_cmd_buffer (anv_cmd_buffer.c:146)
==22722==    by 0x152FEBE4: vk_common_AllocateCommandBuffers (vk_command_pool.c:218)
==22722==    by 0x133FEA1D: vkAllocateCommandBuffers (trampoline.c:1950)
==22722==    by 0x6FF8AE4: create_batch_state (zink_batch.c:367)
==22722==    by 0x6FF91B5: get_batch_state (zink_batch.c:495)
==22722==    by 0x6FF91DB: zink_reset_batch (zink_batch.c:504)
==22722==    by 0x6FF9424: zink_start_batch (zink_batch.c:537)
==22722==    by 0x706C01D: zink_context_create (zink_context.c:5647)
==22722==    by 0x60403A6: st_api_create_context (st_manager.c:978)
==22722==

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d21e7e5a9f ("anv: Query sampler offset in set_image_clear_color()")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35549>
2025-06-16 18:26:30 +00:00
Sagar Ghuge
3696f85b63 anv: Drop unused helper cmd_buffer_dispatch_kernel
Drop some more unused fields: (Lionel)
- kernel_args_size, kernel_arg_count & kernel_args
- anv_kernel_arg
- anv_kernel
- max_grl_scratch_size

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35530>
2025-06-16 15:22:09 +00:00
Lucas Fryzek
49f5cc48cf anv: Add format conversion for AHARDWAREBUFFER_FORMAT_YCbCr_P010
Reviewed-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35161>
2025-06-16 10:52:25 +00:00
Derek Foreman
07881b085e vulkan: Enable PresentWait2 on many physical devices
PresentWait2 should be possible on any physical device, as it adds a
surface capability query that depends on common wsi code.

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35414>
2025-06-13 15:52:02 +00:00
Hyunjun Ko
0d3ffd8275 anv: enable the KHR_video_decode_vp9 extension
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Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35485>
2025-06-13 04:51:51 +00:00
Hyunjun Ko
314de7af06 anv: Initial support for VP9 decoding
Helped from: Stéphane Cerveau <scerveau@igalia.com>
- Fix crash when segmentation is unavailable
- Set 8x8 to minCodedExtent
- Fix typo for GOLDEN and ALTREF scale factor

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35485>
2025-06-13 04:51:51 +00:00
Hyunjun Ko
0689e3d873 anv: add default vp9 tables from FFMpeg and intel-vaapi-driver
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35485>
2025-06-13 04:51:51 +00:00
Lionel Landwerlin
d0608425f4 anv: handle REMAINING_LAYERS with 3D images & maintenance9
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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9a1485ec5c ("anv: missing bit from maintenance9")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35487>
2025-06-12 11:34:33 +00:00
Tapani Pälli
58c4b31d31 anv: small cleanup, remove unused helper function
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35450>
2025-06-12 11:15:21 +00:00
Lionel Landwerlin
9a1485ec5c anv: missing bit from maintenance9
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 595889018a ("anv: implement VK_KHR_maintenance9")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35467>
2025-06-12 09:14:20 +03:00
Jianxun Zhang
a9aad4565f anv: Enable compression on CCS modifiers (xe2)
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Don't report compressed memory type in the case of Xe2 modifiers
as the Vulkan spec requires identical memory types behind the
VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT.

Instead, we require dedicated allocation to get the right
compressed memory in allocation stage. The BMG modifier also
requires scanout flag to set. Refer to comments.

Thanks for the help from:
Nanley Chery <nanley.g.chery@intel.com>
Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Kenneth Graunke <kenneth@whitecape.org>
and other people not listed.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34567>
2025-06-12 04:07:12 +00:00
Jianxun Zhang
a45143e04c anv: Don't choose compression modifier when aux is disabled
When aux has to be disabled (ISL_SURF_USAGE_DISABLE_AUX_BIT)
for some reasons like VK_SHARING_MODE_CONCURRENT, we simply
cannot implicitly choose any modifier with compression.

Otherwise, we run into a situation that an image is created
with a modifier but without the aux support that modifier
requires. It will fail a CTS test once Xe2 modifiers are
enabled:

dEQP-VK.wsi.wayland.swapchain.private_data.image_sharing_mode

MESA: warning: ../src/intel/vulkan/anv_image.c:1198: image with
modifier unexpectedly has wrong aux usage (VK_ERROR_UNKNOWN)

GFX12.x (MTL) does not show this failure because only one queue
family is present. But they will face the same issue when aux is
disabled for any other reasons:

NotSupported (Only 1 queue families available for
VK_SHARING_MODE_CONCURRENT at vktWsiSwapchainTests.cpp:715)

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34567>
2025-06-12 04:07:12 +00:00
Jianxun Zhang
7c2f340d37 anv: Align size of compressed scanout buffers to 64KB on BMG (xe2)
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34567>
2025-06-12 04:07:11 +00:00
Jianxun Zhang
b7f7f1c74f anv: Treat imported compressed buffers as displayable (xe2)
As a part of the effort to unify the displayable attribute
on dmabuf sharing across drivers, we set scanout flag on
imported bos on Xe2+.

Refer to the comment in the change.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34567>
2025-06-12 04:07:11 +00:00
Lionel Landwerlin
595889018a anv: implement VK_KHR_maintenance9
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35381>
2025-06-11 14:09:56 +00:00
Lionel Landwerlin
884df891d7 anv: allow device creation with no queue
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35381>
2025-06-11 14:09:56 +00:00
Nanley Chery
b2ad1333d0 anv: Use genX(set_fast_clear_state)() in transition_depth_buffer()
Simplify transition_depth_buffer() by reusing a function to update the
fast-clear value instead of open-coding that logic.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35329>
2025-06-09 17:40:21 +00:00
Nanley Chery
e0bce5650c anv: Move the gfx9 sRGB sampling clear color code
Simplify set_image_clear_color() by restricting the gfx9-specific code
to the gfx9 #ifdef.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35329>
2025-06-09 17:40:21 +00:00
Nanley Chery
d21e7e5a9f anv: Query sampler offset in set_image_clear_color()
Enables set_image_clear_color() to be used in transition_depth_buffer()
in a future commit.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35329>
2025-06-09 17:40:21 +00:00
Nanley Chery
1820db80d6 anv: Fix an assert for ISL_FORMAT_RAW clear color update
We meant to count the number of bits, not bytes.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35329>
2025-06-09 17:40:21 +00:00
Nanley Chery
27a5d84632 intel/isl: Fix isl_get_sampler_clear_field_offset()
Through testing, I've found that the sampler will fetch the clear color
pixel from the converted clear color field in more cases. So, stop
reporting the raw dword offset for them:

* On gfx12.5, for 32-bpc color images.
* On gfx11-12.0, for 64-bpp color images.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35329>
2025-06-09 17:40:20 +00:00
Caleb Callaway
111005066d anv: Increase max VBs to 33 on Gen11+
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Prior to Gen 11, we had to upload a bunch of SGVs
(FirstVertex, BaseVertex, BaseInstance, DrawID) via
3DSTATE_VERTEX_BUFFERS.

For Gen11+, we upload via 3DSTATE_SGVS_2 instead.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35376>
2025-06-06 19:32:35 +00:00
Lionel Landwerlin
c9ccb9568f anv: simplify RENDER_SURFACE_STATE parsing
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22524>
2025-06-06 12:28:42 +00:00
Lionel Landwerlin
1f5a9a5a73 anv: add support for shaderStorageImageReadWithoutFormat through emulation
Using in shader lowering, only relevant for Gfx9,11,12.0 platforms.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5117
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22524>
2025-06-06 12:28:42 +00:00
Lionel Landwerlin
52f73db5b7 brw: implement read without format lowering
Load the format enum and then just go through a series of :

   if format == R16G16B16A16_UNORM
      color = lower_r32g32_uint_tor_r16g16b16a16_unorm(color)
   else if format == R16G16B16A16_SNORM
      ...

For Gfx12.5, there is no in-shader conversion.

For Gfx12/11, the in-shader conversion covers the following formats :
    - ISL_FORMAT_R10G10B10A2_UNORM
    - ISL_FORMAT_R10G10B10A2_UINT
    - ISL_FORMAT_R11G11B10_FLOAT

For Gfx9, the following formats :
    - ISL_FORMAT_R16G16B16A16_UNORM
    - ISL_FORMAT_R16G16B16A16_SNORM
    - ISL_FORMAT_R10G10B10A2_UNORM
    - ISL_FORMAT_R10G10B10A2_UINT
    - ISL_FORMAT_R8G8B8A8_UNORM
    - ISL_FORMAT_R8G8B8A8_SNORM
    - ISL_FORMAT_R16G16_UNORM
    - ISL_FORMAT_R16G16_SNORM
    - ISL_FORMAT_R11G11B10_FLOAT
    - ISL_FORMAT_R8G8_UNORM
    - ISL_FORMAT_R8G8_SNORM
    - ISL_FORMAT_R16_UNORM
    - ISL_FORMAT_R16_SNORM
    - ISL_FORMAT_R8_UNORM
    - ISL_FORMAT_R8_SNORM

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22524>
2025-06-06 12:28:42 +00:00
Caleb Callaway
f64dbfd08a anv: ANV_DEBUG_WAIT_FOR_ATTACH
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35324>
2025-06-06 07:02:07 +00:00
Rohan Garg
248b8cb8c5 anv: drop anv_can_hiz_clear_ds_view in favor of anv_can_hiz_clear_image
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34824>
2025-06-05 20:27:33 +02:00
Rohan Garg
658b89ac86 anv: Support fast-clears in vkCmdClearDepthStencilImage
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Closes: #11897
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34824>
2025-06-05 20:27:30 +02:00
Rohan Garg
db8b07f88d anv: use the float qualifier to denote the right value
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34824>
2025-06-05 20:26:54 +02:00
Lionel Landwerlin
426ddb4fc9 anv: fix pool allocation failure reporting
When resetting the pool, also reset the allocated size so that failure
to allocation correctly reports VK_ERROR_OUT_OF_POOL_MEMORY instead of
VK_ERROR_FRAGMENTED_POOL.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12690
Tested-by: David Gow <david@ingeniumdigital.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35360>
2025-06-05 09:39:07 +00:00
Calder Young
57c5419bbd anv: Support render to aspect other than IMAGE_ASPECT_COLOR_BIT
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On ANV the vkCmdBeginRendering function was hard coded to use
VK_IMAGE_ASPECT_COLOR_BIT for all color attachments, instead of using
the aspect bit specified when the vkImageView was initialized, which
made it impossible for applications to render to views of multi-planar
formats like VK_FORMAT_G8_B8R8_2PLANE_420_UNORM correctly.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13221
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35340>
2025-06-05 09:22:16 +00:00
Lionel Landwerlin
79498a0849 brw: fix brw_nir_fs_needs_null_rt helper
In 9b42215e0d ("iris: ensure null render target for specific cases") I
wrongly assumed that writing gl_SampleMask would only happen in
multisampled cases.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9b42215e0d ("iris: ensure null render target for specific cases")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13292
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35313>
2025-06-04 10:10:38 +00:00
Lionel Landwerlin
f0e18c475b intel: remove GRL/intel-clc
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35227>
2025-05-29 20:17:13 +00:00
Lionel Landwerlin
828173d79a anv: add support for lower_terminate_to_discard workaround
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35111>
2025-05-26 05:52:30 +00:00
Caleb Callaway
e7454f5318 intel/debug: shader dump filter
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v2: Fixes filtering for various brw shader dump logic

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35061>
2025-05-23 19:57:02 +00:00
Lionel Landwerlin
39f55541a3 anv: don't use pipeline layout at descriptor bind
An application is allowed to bind an empty descriptor set in a place
where a pipeline layout has no descriptor set layout. For example :

  pipeline_layout_A :
     set0 : NULL
     set1 : descriptor_set_layout_A

  vkCmdBindDescriptor :
     set0 : descriptor_set_B (with layout bindingCount=0)
     set1 : descriptor_set_C (compatible with descriptor_set_layout_A)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13227
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35125>
2025-05-23 12:56:31 +00:00
Lionel Landwerlin
2418525b2e anv: avoid 64bit atomics emulation on Xe2+
Xe2+ still requires lowering 64bit image load/store to 2x32bit for the
message format. But atomics work without lowering.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34876>
2025-05-23 10:04:29 +00:00
Paulo Zanoni
d77b49eb0a anv/trtt: don't avoid the TR-TT submission when there is stuff to signal
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When an application issues a sparse binding operation, it may be the
case that the state the app is setting is the state that is already
there. In that case, both n_l3l2_binds and n_l1_binds are zero, so the
batch doesn't contain anything and, since 0802bbd486, we just skip
the batch submission and return.

The problem is that skipping the batch submission and returning
ignores the synchronization: there may be syncobjs that we have to
wait and, more importantly, there may be syncobjs that we have to
signal.

This case is exercised by vkd3d-proton's test suite, but I'm not aware
of any other workload that triggers it. This commit only affects
Meteor Lake and older, as TR-TT is only the default behavior for the
platforms running i915.ko.

Testcase: vkd3d-proton/d3d12/test_sparse_buffer_memory_lifetime
Fixes: 0802bbd486 ("anv/trtt: don't submit empty batches when there are no binds to do")
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35078>
2025-05-23 00:17:18 +00:00