Commit graph

46733 commits

Author SHA1 Message Date
José Fonseca
b8d1242c0b llvmpipe: Prevent segfault during fs variant cache shrinking. 2011-09-29 17:43:38 +01:00
José Fonseca
47ff3f7cc5 tools/trace: Dump NULL literally.
Instead of None.
2011-09-29 17:43:36 +01:00
Brian Paul
1a867385d5 st/mesa: remove some old GetTexImage() code
We can use the core Mesa code for glGetTexImage() since it handles the
image mapping/unmapping now.  We'll keep the decompress_with_blit() path
in the hope that it's faster than core Mesa's software decompression code.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=41312
2011-09-29 09:18:24 -06:00
Marek Olšák
a3cd2c6c9b winsys/radeon: remove redundant member radeon_bo::size
It's part of pb_buffer already.
2011-09-29 01:10:18 +02:00
Marek Olšák
798ebc91eb winsys/radeon: simplify updating GEM domains for relocations 2011-09-29 01:10:12 +02:00
Marek Olšák
bfa51dfeac winsys/radeon: simplify passing GEM domains through to GEM_CREATE 2011-09-29 01:10:07 +02:00
Marek Olšák
7b42ed6eb5 r300g: remove useless variables in some structures 2011-09-29 01:09:58 +02:00
Marek Olšák
b2e6ca8ec7 r300g: simplify the immd_is_good_idea function 2011-09-29 01:09:53 +02:00
Marek Olšák
3c79962378 configure.ac: unduplicate gallium directories
It may happen when two drivers share one winsys.
2011-09-29 01:09:35 +02:00
Marek Olšák
4b1e7cf5d9 r600g: convert if (query->type) into switch statements 2011-09-29 01:07:30 +02:00
Marek Olšák
f9ed713158 gallium/docs: update d3d11ddi.txt 2011-09-29 01:06:43 +02:00
Marek Olšák
163761f128 st/mesa: don't compute index buffer bounds for per-instance data 2011-09-29 01:03:36 +02:00
Paul Berry
9c75527299 glsl 1.30: Fix numerical instabilities in asinh
The formula we were previously using for asinh:

    asinh x = ln(x + sqrt(x * x + 1))

is numerically unstable: when x is a large negative value, the quantity

    x + sqrt(x * x + 1)

is a small positive value (on the order of 1/(2|x|)).  Since the
logarithm function is very sensitive in this range, any error in the
computation of the square root manifests as a large error in the
result.

This patch changes to the equivalent formula:

    asinh x = sign(x) * ln(abs(x) + sqrt(x * x + 1))

which is only slightly more expensive to compute, and is numerically
stable for all x.

Fixes piglit tests
spec/glsl-1.30/execution/built-in-functions/[fv]s-asinh-*.

Reviewed-by: Chad Versace <chad@chad-versace.us>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-09-28 12:20:25 -07:00
Brian Paul
b79782cbed mesa: fix signed/unsigned sscanf() warning in _mesa_override_glsl_version() 2011-09-28 13:17:11 -06:00
Brian Paul
3bb41e7b2d st/mesa: include version.h and fix _mesa_override_glsl_version() call 2011-09-28 13:17:11 -06:00
Eric Anholt
9f220bd135 glsl: Add support for constant expression evaluation on trunc().
Fixes the glsl-1.30/compiler/built-in-functions/trunc-* tests under 1.30.

Reviewed-by: Chad Versace <chad@chad-versace.us>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-28 12:09:09 -07:00
Eric Anholt
158a585450 i965/vs: Add support for bit-shift operations.
Reviewed-by: Chad Versace <chad@chad-versace.us>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-28 12:09:09 -07:00
Eric Anholt
0045a67418 mesa: Add missing _mesa_sizeof_glsl_type() for UNSIGNED_INT.
Somehow we managed to get the unsigned int vectors, but not scalar.
Fixes _mesa_problem complaints in piglit's uint tests.

Reviewed-by: Chad Versace <chad@chad-versace.us>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-28 12:09:09 -07:00
Eric Anholt
7de6e749df i965/fs: Add support for bit-shift operations.
Reviewed-by: Chad Versace <chad@chad-versace.us>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-28 12:09:09 -07:00
Eric Anholt
344f94bb00 glsl: Fix assertion checking types of constant bitshift expressions.
Bitshifts are one of the rare places that GLSL allows mixed base types
without an implicit conversion occurring.

Reviewed-by: Chad Versace <chad@chad-versace.us>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-28 12:09:09 -07:00
Eric Anholt
1d59de1456 ir_to_mesa: Don't assertion fail on remaining GLSL 1.30 ops.
For hardware drivers, we only have ir_to_mesa called for the purposes
of potential swrast fallbacks (basically never on a 1.30 driver),
which we don't really care about.  This will allow 1.30 to be
implemented without rewriting swrast for it.

Reviewed-by: Chad Versace <chad@chad-versace.us>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-28 12:09:09 -07:00
Paul Berry
f02ed012c9 i965: don't intepolate clip distances on pre-GEN6.
On pre-GEN6 chips, the VUE slots set aside for clip distance aren't
actually used, so there is no reason for the clipper to waste time
interpolating them.

When commit 62bad54727 changed the enum
value used to represent these VUE slots, that caused the clipper to
start interpolating them as an accidental side effect.  This patch
reverts to the old clipper behavior.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-28 11:38:04 -07:00
Paul Berry
64ce64a3f8 i965 new VS: Fix bugs in pre-GEN6 psiz/flags computation
This patch corrects two errors in the computation of the psiz/flags
VUE slot on pre-GEN5 when using the new VS backend:

- The clip flags (which should be stored in the w component of the
  first VUE slot) were being accidentally duplicated in all other
  components of that VUE slot, causing partially clipped triangles to
  sometimes disappear completely.

- The OR instruction wasn't being stored in "inst", causing the
  BRW_PREDICATE_NORMAL flag to be applied to the wrong instruction.

This patch fixes regressions in clipping behavior when using shaders
on GEN4-5.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-28 11:38:04 -07:00
Paul Berry
cc3a699e32 i965 new VS: Fix src_reg(uint32_t) constructor.
This constructor was storing its argument in the wrong field of the
"imm" enum, resulting in it being converted to a float when it should
have remained an unsigned integer.  This was preventing clipping from
working properly on pre-GEN6.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-28 11:38:04 -07:00
Paul Berry
e7da40afe8 i965 new VS: don't share clip plane constants in pre-GEN6
In pre-GEN6, when using clip planes, both the vertex shader and the
clipper need access to the client-supplied clip planes, since the
vertex shader needs them to set the clip flags, and the clipper needs
them to determine where to insert new vertices.

With the old VS backend, we used a clever optimization to avoid
placing duplicate copies of these planes in the CURBE: we used the
same block of memory for both the clipper and vertex shader constants,
with the clip planes at the front of it, and then we instructed the
clipper to read just the initial part of this block containing the
clip planes.

This optimization was tricky, of dubious value, and not completely
working in the new VS backend, so I've removed it.  Now, when using
the new VS backend, separate parts of the CURBE are used for the
clipper and the vertex shader.  Note that this doesn't affect the
number of push constants available to the vertex shader, it simply
causes the CURBE to occupy a few more bytes of URB memory.

The old VS backend is unaffected.  GEN6+, which does clipping entirely
in hardware, is also unaffected.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-28 11:38:03 -07:00
Paul Berry
7e2b23ba85 i965: Fix a hardcoded user clip plane count.
Now that i965 supports 8 clip planes instead of 6, the size of the
brw_vs_compile::userplane array needs to be increased to 8.  Changed
the array size to MAX_CLIP_PLANES so that if the number changes again
in the future, this array size won't be missed.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-28 11:38:03 -07:00
Paul Berry
a864b82a04 i965: allow for nonconsecutive elements of gl_ClipDistance to be enabled.
When using user-defined clipping planes, the i965 driver compacts the
array of clipping planes so that disabled clipping planes do not
appear in it--this saves precious push constant space and makes it
easier to generate the pre-GEN6 clip program.  As a result, when
enabling clipping planes in GEN6+ hardware, we always enable clipping
planes 0 through n-1 (where n is the number of clipping planes
enabled), regardless of which clipping planes the user actually
requested.

However, we can't do this when using gl_ClipDistance, because it would
be prohibitively complex to compact the gl_ClipDistance array inside
the user-supplied vertex shader.  So, when enabling clipping planes in
GEN6+ hardware, if gl_ClipDistance is in use, we need to pass the
user-supplied enable flags directly through to the hardware rather
than just enabling the first n planes.

Fixes Piglit test vs-clip-distance-enables.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-28 11:38:03 -07:00
Paul Berry
e6c8027ccb i965: Use 4 bits to store nr_userclip in brw_clip.h.
Since the i965 driver supports 8 clipping planes now, we need 4 bits
to store the number of user clipping planes, not 3.

In theory this isn't strictly necessary, since brw_clip.h is only used
on pre-GEN6, and pre-GEN6 only advertises support for 6 clipping
planes, but it seems wise to err on the safe side.

In the process I removed the pad0 element of struct
brw_clip_prog_key--it doesn't seem necessary because the compiler
automatically inserts padding if needed.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-28 11:38:03 -07:00
Chad Versace
bb3e75d9a5 intel: Remove unused function get_glsl_version()
It was replaced by _mesa_override_glsl_version().

Reviewed-by: Dave Airlie <airlied@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-09-28 11:29:53 -07:00
Chad Versace
a1eff5570f mesa: Allow overriding GLSL version with environment variable
Override the context's GLSL version if the environment variable
MESA_GLSL_VERSION_OVERRIDE is set. Valid values for
MESA_GLSL_VERSION_OVERRIDE are integers, such as "130".

MESA_GLSL_VERSION_OVERRIDE has the same behavior as INTEL_GLSL_VERSION,
except that it applies to all drivers, not just Intel's. Since the former
supercedes the latter, this patch disables the latter.

Reviewed-by: Dave Airlie <airlied@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-09-28 11:29:52 -07:00
Brian Paul
124fc96ddf st/mesa: substitute argument to guess_base_level_size() call
stObj->base.BaseLevel and firstImage->base.Level have the same value
but the later looks more consistent in the function call.
2011-09-28 10:39:10 -06:00
Brian Paul
d1e567fb00 mesa: fix signed/unsigned warning in sscanf() 2011-09-28 10:39:10 -06:00
Brian Paul
d487cc23a1 scons: insert 'git-' into MESA_GIT_SHA1 string
To match makefile build.
2011-09-28 09:51:45 -06:00
Brian Paul
e112287474 scons: fix write_git_sha1_h_file() issue on Windows
Unlike on Unix, os.rename(src, dst) will fail on Windows if the dst file
already exists.  Remove it first.
2011-09-28 09:05:58 -06:00
Christoph Bumiller
ddb5cd0a7b d3d1x: propagate DepthBiasClamp to rasterizer cso 2011-09-28 16:28:58 +02:00
Christoph Bumiller
5def3b7be1 d3d1x: fix uninitialized const color union black
Broken by 6dd284f7c8.
2011-09-28 16:28:58 +02:00
Christoph Bumiller
b3fa0d311e nv50,nvc0: support polygon offset clamp state 2011-09-28 16:28:58 +02:00
Christoph Bumiller
e92348b7f5 r600: support polygon offset clamp state 2011-09-28 16:28:17 +02:00
Christoph Bumiller
16f8308c3d gallium: add polygon offset clamp state
This is required for D3D1x and supported by hardware.
2011-09-28 16:28:17 +02:00
Brian Paul
f83af361a4 scons: generate git_sha1.h file as with Makefile build
So that GL_VERSION includes the git head hash id when building with scons.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2011-09-28 08:15:22 -06:00
Kenneth Graunke
83df7fbe62 i965: Allow SIMD16 color writes on Ivybridge.
Again, the check was needlessly specific: this works fine on Gen7.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-09-28 00:52:43 -07:00
Kenneth Graunke
79cba4c2b1 i965/fs: Allow SIMD16 with control flow on Ivybridge.
The check was designed to forbid it on old generations (Gen5/Ironlake),
not on new ones.  It just works on Gen7/Ivybridge.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-09-28 00:52:36 -07:00
Eric Anholt
b095b683f8 intel: Fix compiler warnings from the depth stall flush commit. 2011-09-27 15:17:50 -07:00
Eric Anholt
d1fda903ec radeon: Drop mapping we were doing around glGetTexImage().
It's handled by MapTextureImage() now.
2011-09-27 12:12:07 -07:00
Eric Anholt
6731c6cfb1 nouveau: Drop mapping we were doing around glGetTexImage().
It's handled by MapTextureImage() now.
2011-09-27 12:12:07 -07:00
Eric Anholt
019c9ee220 intel: Drop our custom glGetTexImage() code.
The mesa core code uses MapTextureImage() like we need now.

v2: Drop mapping around _mesa_generate_mipmap for compressed, since
    the whole path ends up going through MapTextureImage(), and the
    meta decompression code ended up causing us to lose track of the
    region that was originally mapped and assertion fail.
2011-09-27 12:12:07 -07:00
Brian Paul
ce62473408 mesa: Finally, convert RGBA glGetTexImage() to using MapTextureImage().
v2: Changes by Brian to MapTexImage in the decompression path.
v3: Changes by anholt to fix srcRowStride for decompression of NPOT.

Tested-by: Brian Paul <brianp@vmware.com> (v2)
2011-09-27 12:12:07 -07:00
Brian Paul
429b45e7c0 mesa: Convert depth glGetTexImage() to using MapTextureImage().
Tested-by: Brian Paul <brianp@vmware.com>
2011-09-27 12:12:07 -07:00
Brian Paul
59348722b7 mesa: Convert depth/stencil glGetTexImage() to using MapTextureImage().
Note that the implementation before and after appears to be broken in
its handling of Z24_S8 vs S8_Z24.

Tested-by: Brian Paul <brianp@vmware.com>
2011-09-27 12:12:07 -07:00
Brian Paul
0c513a9c1b mesa: Switch ycbcr glGetTexImage() to using MapTextureImage().
Tested-by: Brian Paul <brianp@vmware.com>
2011-09-27 12:12:07 -07:00