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i965: Allow SIMD16 color writes on Ivybridge.

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Again, the check was needlessly specific: this works fine on Gen7.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Kenneth Graunke 2011-09-26 23:57:40 -07:00
parent 79cba4c2b1
commit 83df7fbe62
1 changed files with 1 additions and 1 deletions
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2
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
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@ -1803,7 +1803,7 @@ fs_visitor::emit_color_write(int index, int first_color_mrf, fs_reg color)
int reg_width = c->dispatch_width / 8;
fs_inst *inst;
if (c->dispatch_width == 8 || intel->gen == 6) {
if (c->dispatch_width == 8 || intel->gen >= 6) {
/* SIMD8 write looks like:
* m + 0: r0
* m + 1: r1