Commit graph

670 commits

Author SHA1 Message Date
James Park
c4a516ca70 radv: Replace VLAs with alloca
MSVC does not support VLAs.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7866>
2020-12-02 11:27:01 +00:00
Samuel Pitoiset
d1768b23b5 radv: save and dump vertex descriptors during GPU hang detection
It might be useful to know if the VA is valid and if other info
like the stride seems correct.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7753>
2020-11-30 08:31:02 +01:00
Bas Nieuwenhuizen
aed8d30b50 radv: Deal with unused attachments in mip flush
Fixes: 4cce4d22a7 ("radv: Fix a hang on CB change by adding flushes.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7813>
2020-11-27 18:33:51 +00:00
Bas Nieuwenhuizen
4cce4d22a7 radv: Fix a hang on CB change by adding flushes.
This workaround fixes a hang while loading a renderdoc trace for me.

Since the workload does 1 mip per cmdbuffer it is quite hard to confirm
what exactly the conditions for the hang are but this is the most
restrictive set I found and it corresponds to a workaround in AMDVLK as
well.

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7210>
2020-11-27 00:31:47 +00:00
Samuel Pitoiset
bb9b7d0a68 radv: fix missing initialization of the predication value
It's expected to be 0.

Fixes: 62d9ca696e ("radv: use 32-bit predication for conditional rendering on GFX10.3+")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7789>
2020-11-26 12:30:27 +01:00
Samuel Pitoiset
8da98beb5d radv: always use 32-bit predication on compute queues
It seems that only gfx queue doesn't support it, except on GFX10.3
which supports all queues.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7732>
2020-11-25 08:13:43 +00:00
Samuel Pitoiset
62d9ca696e radv: use 32-bit predication for conditional rendering on GFX10.3+
It's now supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7732>
2020-11-25 08:13:43 +00:00
Bas Nieuwenhuizen
025cb90042 radv: Fix RB+ blending for VK_FORMAT_E5B9G9R9_UFLOAT_PACK32.
Fixes: e893102bcf ("radv: Add VK_FORMAT_E5B9G9R9_UFLOAT_PACK32 rendering support.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7716>
2020-11-24 21:25:57 +00:00
Tony Wasserka
cba6ec309a radv: Fix -Wshadow warnings
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7430>
2020-11-20 09:29:19 +00:00
Marek Olšák
603b5340b9 ac: rename num_render_backends -> max_render_backends
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7542>
2020-11-18 06:19:59 +00:00
Samuel Pitoiset
0790105f2f radv: do VGT_FLUSH when switching NGG -> legacy on Sienna Cichlid
Ported from RadeonSI.

Cc: 20.2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7566>
2020-11-17 10:34:28 +00:00
Bas Nieuwenhuizen
8943c80c9b radv: Fix variable name collision.
idx was aliased, and eb104e949e started
using the outer var in the inner scope ...

Fixes: eb104e949e
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3701
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7388>
2020-10-30 23:44:48 +01:00
Bas Nieuwenhuizen
eb104e949e radv: Do not access set layout during vkCmdBindDescriptorSets.
The spec says:

"
VkDescriptorSetLayout objects may be accessed by commands that operate on descriptor sets allocated using that layout
"

So our behavior is valid here, but this is a temporary workaround for an issue with Baldur's Gate 3.

CC: mesa-stable
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3607
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7207>
2020-10-28 03:06:20 +00:00
Samuel Pitoiset
48e83f7665 radv: do not perform a FMASK expand for non-writeable MSAA images
It should only be required for writeable MSAA images.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7292>
2020-10-27 13:16:50 +01:00
James Park
28d02b9d3e ac,amd/llvm,radv: Initialize structs with {0}
Necessary to compile with MSVC.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7123>
2020-10-14 12:15:23 +00:00
Bas Nieuwenhuizen
ea778693bf radv: Fix event write cmdbuffer allocation when tracing.
The trace emit is another 7 words.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7091>
2020-10-12 10:55:08 +00:00
Bas Nieuwenhuizen
da132d802b radv: Set fce metadata correctly on DCC initialization.
The fce metadata can always be set to false as we don't care about
the compressed clear color.

Avoiding useless fast clear eliminates improves basemark performance by
1%-1.5%.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7005>
2020-10-09 13:46:49 +00:00
Rhys Perry
19561f31a8 radv: remove trailing whitespace
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7043>
2020-10-07 11:53:23 +00:00
Bas Nieuwenhuizen
24f19f409d radv: Write correct dispatch size for RGP.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6875>
2020-09-29 20:14:40 +00:00
Bas Nieuwenhuizen
78165ea3e2 radv: Record cache flushes for RGP.
Not doing the EOP TS cacheflush event because that break wave counting
in RGP for some reason. But the rest looks to be all there.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6550>
2020-09-28 15:46:08 +00:00
Bas Nieuwenhuizen
cc73182152 radv: Include flushes in the barrier.
Since the flushes really happen on the next draw delay the barrier
end to include the flushes.

This fixes the barrier duration in RGP.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6550>
2020-09-28 15:46:08 +00:00
Bas Nieuwenhuizen
e893102bcf radv: Add VK_FORMAT_E5B9G9R9_UFLOAT_PACK32 rendering support.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6831>
2020-09-23 09:22:03 +00:00
Samuel Pitoiset
2b99e15d0a radv: fix transform feedback crashes if pCounterBufferOffsets is NULL
From the Vulkan 1.2.154 spec:
    "If pCounterBufferOffsets is NULL, then it is assumed the
     offsets are zero."

Fix new CTS
dEQP-VK.transform_feedback.simple.backward_dependency_no_offset_array.

CC: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6798>
2020-09-21 15:02:02 +00:00
Bas Nieuwenhuizen
8ae4cec95f Revert "radv: emit {CB,DB}_RMI_L2_CACHE_CONTROL at framebuffer time"
This reverts commit d6bc0f26c9.

These registers are now constant.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6726>
2020-09-21 10:34:46 +00:00
Bas Nieuwenhuizen
0a84c595c2 Revert "radv: set BIG_PAGE to improve performance on GFX10.3"
This reverts commit f4d861696d.

Turns out we cannot use BIG_PAGE with GTT and we can't tell
when a buffer is spilled to GTT.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6726>
2020-09-21 10:34:46 +00:00
Pierre-Loup A. Griffais
7b4eaac6a9 radv: fix vertex buffer null descriptors
Fixes: 0f1ead7b53 "radv: handle NULL vertex bindings"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6773>
2020-09-18 17:12:40 +00:00
Pierre-Loup A. Griffais
ec13622ff4 radv: fix null descriptor for dynamic buffers
Fixes: c1ef225d18 "radv: handle NULL descriptors"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6772>
2020-09-18 16:30:17 +00:00
Rhys Perry
85cc2950a0 radv: initialize with expanded cmask if the destination layout needs it
If radv_layout_can_fast_clear() is false, 028C70_COMPRESSION is unset when
the image is rendered to and CMASK isn't updated. This appears to cause
FMASK to be ignored and the 0th sample to always be used.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3449
Fixes: 7b21ce401f
   ('radv: disable FMASK compression when drawing with GENERAL layout')

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6745>
2020-09-17 10:28:29 +00:00
Marek Olšák
b7a6333ee4 amd/registers: switch to new generated register definitions
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>
2020-09-01 08:45:54 -04:00
Samuel Pitoiset
aa675cdc91 radv: improve reporting faulty pipelines when a GPU hang is detected
Because the driver now waits for idle after every draw/dispatch
calls, we shouldn't report gfx pipelines when the GPU hang happens
after a dispatch (or the opposite).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by:  Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6471>
2020-09-01 08:27:48 +02:00
Samuel Pitoiset
f4d861696d radv: set BIG_PAGE to improve performance on GFX10.3
It reduces traffic between CB, DB and TCP blocks if buffers
respect a certain alignment.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6482>
2020-08-28 05:53:41 +00:00
Samuel Pitoiset
d6bc0f26c9 radv: emit {CB,DB}_RMI_L2_CACHE_CONTROL at framebuffer time
The upcoming patch will set BIG_PAGE if needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6482>
2020-08-28 05:53:41 +00:00
Bas Nieuwenhuizen
18fe130ec9 radv: Fix uninitialized variable in renderpass.
Fixes some dEQP-VK.renderpass2.* flakes. Valgrind:

Test case 'dEQP-VK.renderpass2.dedicated_allocation.attachment.8.724'..
==754520== Conditional jump or move depends on uninitialised value(s)
==754520==    at 0x575B21C: radv_layout_is_htile_compressed (radv_image.c:1690)
==754520==    by 0x572F470: radv_handle_depth_image_transition (radv_cmd_buffer.c:5855)
==754520==    by 0x572F2F2: radv_handle_image_transition (radv_cmd_buffer.c:6123)
==754520==    by 0x572EEC6: radv_handle_subpass_image_transition (radv_cmd_buffer.c:3385)
==754520==    by 0x572A104: radv_cmd_buffer_begin_subpass (radv_cmd_buffer.c:4843)
==754520==    by 0x572A007: radv_CmdBeginRenderPass (radv_cmd_buffer.c:4913)
==754520==    by 0x572A197: radv_CmdBeginRenderPass2 (radv_cmd_buffer.c:4921)

Why false?

A renderloop happens when the same attachment is both used as input
attachment and output (color, ds) attachment in a subpass. Of course
this doesn't happen outside of a renderpass and hence we can initialize
it to false at the start of the renderpass.

Fixes: 66131ceb8b "radv: Pass through render loop detection to internal layout decisions."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3074
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6068>
2020-07-26 13:35:16 +00:00
Samuel Pitoiset
6ced98c94e radv: disable CPU caching for the upload BO to reduce fetch latency
AMDGPU_GEM_CREATE_CPU_GTT_USWC should be faster when CPU reads
are unexpected (because they aren't cached).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5978>
2020-07-21 11:54:39 +00:00
Samuel Pitoiset
b3eae4e037 radv: do not perform read-modify-write with the upload BO
To disable CPU caching.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5978>
2020-07-21 11:54:39 +00:00
Samuel Pitoiset
50fdefc025 radv: destroy the base object if VkAllocateCommandBuffers() failed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5868>
2020-07-15 13:53:35 +02:00
Samuel Pitoiset
b262284300 radv: add support for dynamic vertex input binding stride
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
9cc99baa4a radv: add support for dynamic depth/stencil states
Out-of-order rasterization is disabled if a pipeline uses an
extended dynamic depth/stencil state because the driver doesn't
support enabling/disabling out-of-order dynamically.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
e8a69b782d radv: add support for dynamic and scissor count
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
d6c1e5051e radv: add support for dynamic primitive topology
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
52bf1035a6 radv: add support for dynamic cull mode and front face
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
ac575f4215 radv: rework dynamic viewports/scissors support
The number of viewports/scissors is currently static because it can
only be specified at pipeline creation, but it doesn't hurt to
assume it's dynamic. Will help for supporting setting the number
of viewports/scissors dynamically.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5718>
2020-07-13 08:31:54 +00:00
Samuel Pitoiset
9f561feecc radv: store the primitive topology hardware value in the pipeline
Will help for upcoming changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>
2020-07-09 06:31:39 +00:00
Samuel Pitoiset
6f734324a5 radv: implement missing VK_ACCESS_MEMORY_{READ,WRITE}_BIT
From the Vulkan spec 1.2.146:
    "VK_ACCESS_MEMORY_READ_BIT specifies all read accesses. It is
     always valid in any access mask, and is treated as equivalent
     to setting all READ access flags that are valid where it is
     used."

    "VK_ACCESS_MEMORY_WRITE_BIT specifies all write accesses.
     It is always valid in any access mask, and is treated as
     equivalent to setting all WRITE access flags that are valid
     where it is used."

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3241
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5807>
2020-07-09 08:05:20 +02:00
Bas Nieuwenhuizen
ad913a18b1 radv: Always enable PERFECT_ZPASS_COUNTS.
We have an issue with early depth testing and discard, where
non-perfect counts count the tile if the early depth test succeeds.

We could spend a lot of effort to set this conditionally based
on the presence of the two conditions, but in the presence of
inherited queries let's try this first.

Changing PERFECT_ZPASS_COUNTS since I'm pretty sure this has a lower
performance impact than always using late depth testing.

CC: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3218
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5757>
2020-07-06 13:54:38 +00:00
Samuel Pitoiset
7b21ce401f radv: disable FMASK compression when drawing with GENERAL layout
Fixes: 96063100 "radv: enable shaderStorageImageMultisample feature on GFX8+"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3219
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/855
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3165>
2020-07-06 13:26:58 +00:00
Samuel Pitoiset
53372175c9 radv: fix wide points and lines
The maximum value for both points and lines is 65536. This doesn't
fix anything known (just found this while looking in that area).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5696>
2020-07-02 08:26:03 +02:00
Daniel Schürmann
db0afb3800 radv: change use_aco -> use_llvm
We are about to make ACO the default backend.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5445>
2020-06-25 15:16:28 +02:00
Bas Nieuwenhuizen
64a92ef7a2 radv/winsys: Distinguish device/host memory errors.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5578>
2020-06-24 13:00:02 +00:00
Rhys Perry
841fdfcd45 radv/aco,aco: allow SMEM SSBO loads on GFX6/7
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
2020-06-24 10:52:28 +00:00