radv: store the primitive topology hardware value in the pipeline

Will help for upcoming changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>
This commit is contained in:
Samuel Pitoiset 2020-07-08 09:36:00 +02:00 committed by Marge Bot
parent 6f734324a5
commit 9f561feecc
2 changed files with 2 additions and 2 deletions

View file

@ -1332,7 +1332,7 @@ radv_emit_line_stipple(struct radv_cmd_buffer *cmd_buffer)
struct radv_pipeline *pipeline = cmd_buffer->state.pipeline;
uint32_t auto_reset_cntl = 1;
if (pipeline->graphics.topology == VK_PRIMITIVE_TOPOLOGY_LINE_STRIP)
if (pipeline->graphics.topology == V_008958_DI_PT_LINESTRIP)
auto_reset_cntl = 2;
radeon_set_context_reg(cmd_buffer->cs, R_028A0C_PA_SC_LINE_STIPPLE,

View file

@ -5063,7 +5063,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
uint32_t gs_out;
uint32_t prim = si_translate_prim(pCreateInfo->pInputAssemblyState->topology);
pipeline->graphics.topology = pCreateInfo->pInputAssemblyState->topology;
pipeline->graphics.topology = si_translate_prim(pCreateInfo->pInputAssemblyState->topology);
pipeline->graphics.can_use_guardband = radv_prim_can_use_guardband(pCreateInfo->pInputAssemblyState->topology);
if (radv_pipeline_has_gs(pipeline)) {